blob: 2799a8538b53e13983312091d1650d7893153417 [file] [log] [blame]
Angel Pons381c4eb2020-04-03 01:22:06 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Bill XIEee8da1c2017-12-16 10:15:18 +08002
Arthur Heymansfa5d0f82019-11-12 19:11:50 +01003#include <bootblock_common.h>
Keith Hui45e4ab42023-07-22 12:49:05 -04004#include <northbridge/intel/sandybridge/raminit.h>
Bill XIEee8da1c2017-12-16 10:15:18 +08005#include <southbridge/intel/bd82x6x/pch.h>
6#include <ec/hp/kbc1126/ec.h>
7
Bill XIEee8da1c2017-12-16 10:15:18 +08008const struct southbridge_usb_port mainboard_usb_ports[] = {
9 { 1, 1, 0 },
10 { 1, 0, 0 },
11 { 1, 1, 1 },
12 { 0, 1, 1 },
13 { 0, 0, 2 },
14 { 1, 0, 2 },
15 { 0, 0, 3 },
16 { 0, 0, 3 },
17 { 1, 0, 4 }, /* B1P1: Digitizer */
18 { 1, 0, 4 }, /* B1P2: wlan USB, EHCI debug */
19 { 1, 1, 5 }, /* B1P3: Camera */
20 { 0, 0, 5 }, /* B1P4 */
21 { 1, 0, 6 }, /* B1P5: wwan USB */
22 { 0, 0, 6 }, /* B1P6 */
23};
24
Arthur Heymansfa5d0f82019-11-12 19:11:50 +010025void bootblock_mainboard_early_init(void)
Bill XIEee8da1c2017-12-16 10:15:18 +080026{
27 kbc1126_enter_conf();
28 kbc1126_mailbox_init();
29 kbc1126_kbc_init();
30 kbc1126_ec_init();
31 kbc1126_pm1_init();
32 kbc1126_exit_conf();
33}
34
Keith Hui45e4ab42023-07-22 12:49:05 -040035void mb_get_spd_map(struct spd_info *spdi)
Bill XIEee8da1c2017-12-16 10:15:18 +080036{
Keith Hui45e4ab42023-07-22 12:49:05 -040037 spdi->addresses[0] = 0x50;
Bill XIEee8da1c2017-12-16 10:15:18 +080038 /* C1S0 is a soldered RAM with no real SPD. Use stored SPD. */
Keith Hui45e4ab42023-07-22 12:49:05 -040039 spdi->addresses[2] = SPD_MEMORY_DOWN;
40 spdi->spd_index = 0;
Bill XIEee8da1c2017-12-16 10:15:18 +080041}