blob: eb62a9f48535ce1b58b3ce5ce6c7041658303509 [file] [log] [blame]
Angel Pons381c4eb2020-04-03 01:22:06 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Bill XIEee8da1c2017-12-16 10:15:18 +08003
Arthur Heymansfa5d0f82019-11-12 19:11:50 +01004#include <bootblock_common.h>
Bill XIEee8da1c2017-12-16 10:15:18 +08005#include <string.h>
6#include <cbfs.h>
7#include <console/console.h>
Bill XIEee8da1c2017-12-16 10:15:18 +08008#include <northbridge/intel/sandybridge/sandybridge.h>
9#include <northbridge/intel/sandybridge/raminit_native.h>
10#include <southbridge/intel/bd82x6x/pch.h>
11#include <ec/hp/kbc1126/ec.h>
12
Bill XIEee8da1c2017-12-16 10:15:18 +080013const struct southbridge_usb_port mainboard_usb_ports[] = {
14 { 1, 1, 0 },
15 { 1, 0, 0 },
16 { 1, 1, 1 },
17 { 0, 1, 1 },
18 { 0, 0, 2 },
19 { 1, 0, 2 },
20 { 0, 0, 3 },
21 { 0, 0, 3 },
22 { 1, 0, 4 }, /* B1P1: Digitizer */
23 { 1, 0, 4 }, /* B1P2: wlan USB, EHCI debug */
24 { 1, 1, 5 }, /* B1P3: Camera */
25 { 0, 0, 5 }, /* B1P4 */
26 { 1, 0, 6 }, /* B1P5: wwan USB */
27 { 0, 0, 6 }, /* B1P6 */
28};
29
Arthur Heymansfa5d0f82019-11-12 19:11:50 +010030void bootblock_mainboard_early_init(void)
Bill XIEee8da1c2017-12-16 10:15:18 +080031{
32 kbc1126_enter_conf();
33 kbc1126_mailbox_init();
34 kbc1126_kbc_init();
35 kbc1126_ec_init();
36 kbc1126_pm1_init();
37 kbc1126_exit_conf();
38}
39
40void mainboard_get_spd(spd_raw_data *spd, bool id_only)
41{
42 /* C1S0 is a soldered RAM with no real SPD. Use stored SPD. */
43 size_t spd_file_len = 0;
44 void *spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
45 &spd_file_len);
46
47 if (!spd_file || spd_file_len < sizeof(spd_raw_data))
48 die("SPD data for C1S0 not found.");
49
50 read_spd(&spd[0], 0x50, id_only);
51 memcpy(&spd[2], spd_file, spd_file_len);
52}