Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
Iru Cai | 3364203 | 2019-06-11 14:24:43 +0800 | [diff] [blame] | 4 | #include <console/usb.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 5 | #include <string.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 6 | #include <cbmem.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 7 | #include <cbfs.h> |
Elyes HAOUAS | 82d4642 | 2019-04-28 18:01:48 +0200 | [diff] [blame] | 8 | #include <cf9_reset.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 9 | #include <ip_checksum.h> |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 10 | #include <memory_info.h> |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 11 | #include <mrc_cache.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 12 | #include <device/pci_def.h> |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 13 | #include <device/dram/ddr3.h> |
| 14 | #include <smbios.h> |
| 15 | #include <spd.h> |
Philipp Deppenwiese | fea2429 | 2017-10-17 17:02:29 +0200 | [diff] [blame] | 16 | #include <security/vboot/vboot_common.h> |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 17 | #include <commonlib/region.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 18 | #include "raminit.h" |
| 19 | #include "pei_data.h" |
| 20 | #include "haswell.h" |
| 21 | |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 22 | #define MRC_CACHE_VERSION 1 |
| 23 | |
Aaron Durbin | 2ad1dba | 2013-02-07 00:51:18 -0600 | [diff] [blame] | 24 | void save_mrc_data(struct pei_data *pei_data) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 25 | { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 26 | /* Save the MRC S3 restore data to cbmem */ |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 27 | mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, pei_data->mrc_output, |
| 28 | pei_data->mrc_output_len); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 29 | } |
| 30 | |
| 31 | static void prepare_mrc_cache(struct pei_data *pei_data) |
| 32 | { |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 33 | struct region_device rdev; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 34 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 35 | /* Preset just in case there is an error */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 36 | pei_data->mrc_input = NULL; |
| 37 | pei_data->mrc_input_len = 0; |
| 38 | |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 39 | if (mrc_cache_get_current(MRC_TRAINING_DATA, MRC_CACHE_VERSION, &rdev)) |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 40 | /* Error message printed in find_current_mrc_cache */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 41 | return; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 42 | |
Arthur Heymans | f300f36 | 2018-01-27 13:39:12 +0100 | [diff] [blame] | 43 | pei_data->mrc_input = rdev_mmap_full(&rdev); |
| 44 | pei_data->mrc_input_len = region_device_sz(&rdev); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 45 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 46 | printk(BIOS_DEBUG, "%s: at %p, size %x\n", __func__, pei_data->mrc_input, |
| 47 | pei_data->mrc_input_len); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 48 | } |
| 49 | |
Elyes HAOUAS | 448d9fb | 2018-05-22 12:51:27 +0200 | [diff] [blame] | 50 | static const char *ecc_decoder[] = { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 51 | "inactive", |
| 52 | "active on IO", |
| 53 | "disabled on IO", |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 54 | "active", |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 55 | }; |
| 56 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 57 | /* Print out the memory controller configuration, as per the values in its registers. */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 58 | static void report_memory_config(void) |
| 59 | { |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 60 | u32 addr_decoder_common, addr_decode_chan[2]; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 61 | int i; |
| 62 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 63 | addr_decoder_common = MCHBAR32(MAD_CHNL); |
| 64 | addr_decode_chan[0] = MCHBAR32(MAD_DIMM_CH0); |
| 65 | addr_decode_chan[1] = MCHBAR32(MAD_DIMM_CH1); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 66 | |
| 67 | printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 68 | (MCHBAR32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100); |
| 69 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 70 | printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n", |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 71 | (addr_decoder_common >> 0) & 3, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 72 | (addr_decoder_common >> 2) & 3, |
| 73 | (addr_decoder_common >> 4) & 3); |
| 74 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 75 | for (i = 0; i < ARRAY_SIZE(addr_decode_chan); i++) { |
| 76 | u32 ch_conf = addr_decode_chan[i]; |
| 77 | |
| 78 | printk(BIOS_DEBUG, "memcfg channel[%d] config (%8.8x):\n", i, ch_conf); |
| 79 | printk(BIOS_DEBUG, " ECC %s\n", ecc_decoder[(ch_conf >> 24) & 3]); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 80 | printk(BIOS_DEBUG, " enhanced interleave mode %s\n", |
| 81 | ((ch_conf >> 22) & 1) ? "on" : "off"); |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 82 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 83 | printk(BIOS_DEBUG, " rank interleave %s\n", |
| 84 | ((ch_conf >> 21) & 1) ? "on" : "off"); |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 85 | |
Duncan Laurie | 8d77402 | 2013-10-22 16:32:49 -0700 | [diff] [blame] | 86 | printk(BIOS_DEBUG, " DIMMA %d MB width %s %s rank%s\n", |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 87 | ((ch_conf >> 0) & 0xff) * 256, |
Duncan Laurie | 8d77402 | 2013-10-22 16:32:49 -0700 | [diff] [blame] | 88 | ((ch_conf >> 19) & 1) ? "x16" : "x8 or x32", |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 89 | ((ch_conf >> 17) & 1) ? "dual" : "single", |
| 90 | ((ch_conf >> 16) & 1) ? "" : ", selected"); |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 91 | |
Duncan Laurie | 8d77402 | 2013-10-22 16:32:49 -0700 | [diff] [blame] | 92 | printk(BIOS_DEBUG, " DIMMB %d MB width %s %s rank%s\n", |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 93 | ((ch_conf >> 8) & 0xff) * 256, |
Ryan Salsamendi | dab81a4 | 2017-06-30 17:36:41 -0700 | [diff] [blame] | 94 | ((ch_conf >> 20) & 1) ? "x16" : "x8 or x32", |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 95 | ((ch_conf >> 18) & 1) ? "dual" : "single", |
| 96 | ((ch_conf >> 16) & 1) ? ", selected" : ""); |
| 97 | } |
| 98 | } |
| 99 | |
| 100 | /** |
| 101 | * Find PEI executable in coreboot filesystem and execute it. |
| 102 | * |
| 103 | * @param pei_data: configuration data for UEFI PEI reference code |
| 104 | */ |
| 105 | void sdram_initialize(struct pei_data *pei_data) |
| 106 | { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 107 | unsigned long entry; |
Arthur Heymans | 8da2fa0 | 2018-06-06 10:35:45 +0200 | [diff] [blame] | 108 | uint32_t type = CBFS_TYPE_MRC; |
| 109 | struct cbfsf f; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 110 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 111 | printk(BIOS_DEBUG, "Starting UEFI PEI System Agent\n"); |
| 112 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 113 | /* Do not pass MRC data in for recovery mode boot, always pass it in for S3 resume */ |
Julius Werner | 29fbfcc | 2020-03-02 15:54:43 -0800 | [diff] [blame] | 114 | if (!(CONFIG(HASWELL_VBOOT_IN_BOOTBLOCK) && vboot_recovery_mode_enabled()) |
| 115 | || pei_data->boot_mode == 2) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 116 | prepare_mrc_cache(pei_data); |
| 117 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 118 | /* If MRC data is not found, we cannot continue S3 resume */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 119 | if (pei_data->boot_mode == 2 && !pei_data->mrc_input) { |
Duncan Laurie | 727b545 | 2013-08-08 16:28:41 -0700 | [diff] [blame] | 120 | post_code(POST_RESUME_FAILURE); |
Elyes HAOUAS | 3cd4327 | 2020-03-05 22:01:17 +0100 | [diff] [blame] | 121 | printk(BIOS_DEBUG, "Giving up in %s: No MRC data\n", __func__); |
Elyes HAOUAS | 82d4642 | 2019-04-28 18:01:48 +0200 | [diff] [blame] | 122 | system_reset(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 123 | } |
| 124 | |
| 125 | /* Pass console handler in pei_data */ |
Kyösti Mälkki | 657e0be | 2014-02-04 19:03:57 +0200 | [diff] [blame] | 126 | pei_data->tx_byte = do_putchar; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 127 | |
Arthur Heymans | 8da2fa0 | 2018-06-06 10:35:45 +0200 | [diff] [blame] | 128 | /* |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 129 | * Locate and call UEFI System Agent binary. The binary needs to be at a fixed offset |
| 130 | * in the flash and can therefore only reside in the COREBOOT fmap region. |
Arthur Heymans | 8da2fa0 | 2018-06-06 10:35:45 +0200 | [diff] [blame] | 131 | */ |
| 132 | if (cbfs_locate_file_in_region(&f, "COREBOOT", "mrc.bin", &type) < 0) |
| 133 | die("mrc.bin not found!"); |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 134 | |
Arthur Heymans | 8da2fa0 | 2018-06-06 10:35:45 +0200 | [diff] [blame] | 135 | /* We don't care about leaking the mapping */ |
| 136 | entry = (unsigned long)rdev_mmap_full(&f.data); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 137 | if (entry) { |
| 138 | int rv; |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 139 | asm volatile ("call *%%ecx\n\t" |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 140 | :"=a" (rv) : "c" (entry), "a" (pei_data)); |
Iru Cai | 3364203 | 2019-06-11 14:24:43 +0800 | [diff] [blame] | 141 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 142 | /* The mrc.bin reconfigures USB, so usbdebug needs to be reinitialized */ |
Iru Cai | 3364203 | 2019-06-11 14:24:43 +0800 | [diff] [blame] | 143 | if (CONFIG(USBDEBUG_IN_PRE_RAM)) |
| 144 | usbdebug_hw_init(true); |
| 145 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 146 | if (rv) { |
| 147 | switch (rv) { |
| 148 | case -1: |
| 149 | printk(BIOS_ERR, "PEI version mismatch.\n"); |
| 150 | break; |
| 151 | case -2: |
| 152 | printk(BIOS_ERR, "Invalid memory frequency.\n"); |
| 153 | break; |
| 154 | default: |
| 155 | printk(BIOS_ERR, "MRC returned %x.\n", rv); |
| 156 | } |
Keith Short | bb41aba | 2019-05-16 14:07:43 -0600 | [diff] [blame] | 157 | die_with_post_code(POST_INVALID_VENDOR_BINARY, |
| 158 | "Nonzero MRC return value.\n"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 159 | } |
| 160 | } else { |
| 161 | die("UEFI PEI System Agent not found.\n"); |
| 162 | } |
| 163 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 164 | /* For reference, print the System Agent version after executing the UEFI PEI stage */ |
| 165 | u32 version = MCHBAR32(MRC_REVISION); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 166 | printk(BIOS_DEBUG, "System Agent Version %d.%d.%d Build %d\n", |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 167 | (version >> 24) & 0xff, (version >> 16) & 0xff, |
| 168 | (version >> 8) & 0xff, (version >> 0) & 0xff); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 169 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 170 | report_memory_config(); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 171 | } |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 172 | |
| 173 | void setup_sdram_meminfo(struct pei_data *pei_data) |
| 174 | { |
Elyes HAOUAS | ce83f31 | 2019-05-20 18:31:38 +0200 | [diff] [blame] | 175 | u32 addr_decode_ch[2]; |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 176 | struct memory_info *mem_info; |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 177 | struct dimm_info *dimm; |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 178 | int ddr_frequency, dimm_size, ch, d_num; |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 179 | int dimm_cnt = 0; |
| 180 | |
| 181 | mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(struct memory_info)); |
Nico Huber | acac02d | 2017-06-20 14:49:04 +0200 | [diff] [blame] | 182 | if (!mem_info) |
| 183 | die("Failed to add memory info to CBMEM.\n"); |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 184 | |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 185 | memset(mem_info, 0, sizeof(struct memory_info)); |
| 186 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 187 | /* FIXME: Do we need to read MCHBAR32(MAD_CHNL) ? (Answer: Nope) */ |
| 188 | MCHBAR32(MAD_CHNL); |
| 189 | addr_decode_ch[0] = MCHBAR32(MAD_DIMM_CH0); |
| 190 | addr_decode_ch[1] = MCHBAR32(MAD_DIMM_CH1); |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 191 | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 192 | ddr_frequency = (MCHBAR32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100; |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 193 | |
| 194 | for (ch = 0; ch < ARRAY_SIZE(addr_decode_ch); ch++) { |
| 195 | u32 ch_conf = addr_decode_ch[ch]; |
| 196 | /* DIMMs A/B */ |
| 197 | for (d_num = 0; d_num < 2; d_num++) { |
| 198 | dimm_size = ((ch_conf >> (d_num * 8)) & 0xff) * 256; |
| 199 | if (dimm_size) { |
| 200 | dimm = &mem_info->dimm[dimm_cnt]; |
| 201 | dimm->dimm_size = dimm_size; |
| 202 | dimm->ddr_type = MEMORY_TYPE_DDR3; |
| 203 | dimm->ddr_frequency = ddr_frequency; |
| 204 | dimm->rank_per_dimm = 1 + ((ch_conf >> (17 + d_num)) & 1); |
| 205 | dimm->channel_num = ch; |
| 206 | dimm->dimm_num = d_num; |
| 207 | dimm->bank_locator = ch * 2; |
| 208 | memcpy(dimm->serial, |
| 209 | &pei_data->spd_data[dimm_cnt][SPD_DIMM_SERIAL_NUM], |
| 210 | SPD_DIMM_SERIAL_LEN); |
| 211 | memcpy(dimm->module_part_number, |
| 212 | &pei_data->spd_data[dimm_cnt][SPD_DIMM_PART_NUM], |
| 213 | SPD_DIMM_PART_LEN); |
| 214 | dimm->mod_id = |
| 215 | (pei_data->spd_data[dimm_cnt][SPD_DIMM_MOD_ID2] << 8) | |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 216 | (pei_data->spd_data[dimm_cnt][SPD_DIMM_MOD_ID1] & 0xff); |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 217 | dimm->mod_type = SPD_SODIMM; |
Elyes HAOUAS | 7d964ae | 2020-07-19 09:19:59 +0200 | [diff] [blame] | 218 | dimm->bus_width = MEMORY_BUS_WIDTH_64; |
Matt DeVillier | 5aaa8ce | 2016-09-02 13:29:17 -0500 | [diff] [blame] | 219 | dimm_cnt++; |
| 220 | } |
| 221 | } |
| 222 | } |
| 223 | mem_info->dimm_cnt = dimm_cnt; |
| 224 | } |