Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; version 2 of the License. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #include <arch/cpu.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 16 | #include <device/pci_ops.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 17 | #include <console/console.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 18 | #include <cpu/x86/msr.h> |
Usha P | 65a8c2e | 2019-11-14 11:58:53 +0530 | [diff] [blame] | 19 | #include <cpu/x86/name.h> |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 20 | #include <device/pci.h> |
Subrata Banik | c216567 | 2017-06-02 17:52:44 +0530 | [diff] [blame] | 21 | #include <device/pci_ids.h> |
Barnali Sarkar | 7327386 | 2017-06-13 20:22:33 +0530 | [diff] [blame] | 22 | #include <intelblocks/mp_init.h> |
Naresh G Solanki | ecd9a94 | 2016-08-11 14:56:28 +0530 | [diff] [blame] | 23 | #include <soc/bootblock.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 24 | #include <soc/cpu.h> |
| 25 | #include <soc/pch.h> |
| 26 | #include <soc/pci_devs.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 27 | #include <soc/systemagent.h> |
| 28 | |
| 29 | static struct { |
| 30 | u32 cpuid; |
| 31 | const char *name; |
| 32 | } cpu_table[] = { |
Subrata Banik | c216567 | 2017-06-02 17:52:44 +0530 | [diff] [blame] | 33 | { CPUID_SKYLAKE_C0, "Skylake C0" }, |
| 34 | { CPUID_SKYLAKE_D0, "Skylake D0" }, |
| 35 | { CPUID_SKYLAKE_HQ0, "Skylake H Q0" }, |
| 36 | { CPUID_SKYLAKE_HR0, "Skylake H R0" }, |
| 37 | { CPUID_KABYLAKE_G0, "Kabylake G0" }, |
| 38 | { CPUID_KABYLAKE_H0, "Kabylake H0" }, |
| 39 | { CPUID_KABYLAKE_Y0, "Kabylake Y0" }, |
| 40 | { CPUID_KABYLAKE_HA0, "Kabylake H A0" }, |
| 41 | { CPUID_KABYLAKE_HB0, "Kabylake H B0" }, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 42 | }; |
| 43 | |
| 44 | static struct { |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 45 | u16 mchid; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 46 | const char *name; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 47 | } mch_table[] = { |
Subrata Banik | c216567 | 2017-06-02 17:52:44 +0530 | [diff] [blame] | 48 | { PCI_DEVICE_ID_INTEL_SKL_ID_U, "Skylake-U" }, |
| 49 | { PCI_DEVICE_ID_INTEL_SKL_ID_Y, "Skylake-Y" }, |
| 50 | { PCI_DEVICE_ID_INTEL_SKL_ID_ULX, "Skylake-ULX" }, |
Maxim Polyakov | dde937c | 2019-09-09 15:50:03 +0300 | [diff] [blame] | 51 | { PCI_DEVICE_ID_INTEL_SKL_ID_H_4, "Skylake-H (4 Core)" }, |
Subrata Banik | c216567 | 2017-06-02 17:52:44 +0530 | [diff] [blame] | 52 | { PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" }, |
Keno Fischer | 1044eba | 2019-06-07 01:55:56 -0400 | [diff] [blame] | 53 | { PCI_DEVICE_ID_INTEL_SKL_ID_H_2, "Skylake-H (2 Core)" }, |
| 54 | { PCI_DEVICE_ID_INTEL_SKL_ID_S_2, "Skylake-S (2 Core)" }, |
Maxim Polyakov | a0cd4b1 | 2019-08-27 15:58:04 +0300 | [diff] [blame] | 55 | { PCI_DEVICE_ID_INTEL_SKL_ID_S_4, "Skylake-S (4 Core) / Skylake-DT" }, |
Subrata Banik | c216567 | 2017-06-02 17:52:44 +0530 | [diff] [blame] | 56 | { PCI_DEVICE_ID_INTEL_KBL_ID_U, "Kabylake-U" }, |
| 57 | { PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"}, |
| 58 | { PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" }, |
| 59 | { PCI_DEVICE_ID_INTEL_KBL_ID_H, "Kabylake-H" }, |
Gaggery Tsai | e415a4c | 2018-03-21 22:36:18 +0800 | [diff] [blame] | 60 | { PCI_DEVICE_ID_INTEL_KBL_ID_S, "Kabylake-S" }, |
V Sowmya | acc2a48 | 2018-01-23 15:27:23 +0530 | [diff] [blame] | 61 | { PCI_DEVICE_ID_INTEL_KBL_ID_DT, "Kabylake DT" }, |
Christian Walter | 3d84038 | 2019-05-17 19:37:16 +0200 | [diff] [blame] | 62 | { PCI_DEVICE_ID_INTEL_KBL_ID_DT_2, "Kabylake DT 2" }, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 63 | }; |
| 64 | |
| 65 | static struct { |
| 66 | u16 lpcid; |
| 67 | const char *name; |
| 68 | } pch_table[] = { |
Subrata Banik | c216567 | 2017-06-02 17:52:44 +0530 | [diff] [blame] | 69 | { PCI_DEVICE_ID_INTEL_SPT_LP_SAMPLE, "Skylake LP Sample" }, |
| 70 | { PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE, "Skylake-U Base" }, |
| 71 | { PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM, "Skylake-U Premium" }, |
| 72 | { PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM, "Skylake-Y Premium" }, |
Maxim Polyakov | 7a732b4 | 2019-02-25 10:48:39 +0300 | [diff] [blame] | 73 | { PCI_DEVICE_ID_INTEL_SPT_H_H110, "Skylake PCH-H H110" }, |
Marius Genheimer | 4998bec | 2019-04-30 00:04:32 +0200 | [diff] [blame] | 74 | { PCI_DEVICE_ID_INTEL_SPT_H_H170, "Skylake PCH-H H170" }, |
| 75 | { PCI_DEVICE_ID_INTEL_SPT_H_Z170, "Skylake PCH-H Z170" }, |
| 76 | { PCI_DEVICE_ID_INTEL_SPT_H_Q170, "Skylake PCH-H Q170" }, |
| 77 | { PCI_DEVICE_ID_INTEL_SPT_H_Q150, "Skylake PCH-H Q150" }, |
| 78 | { PCI_DEVICE_ID_INTEL_SPT_H_B150, "Skylake PCH-H B150" }, |
V Sowmya | 7c15047 | 2018-01-23 14:44:45 +0530 | [diff] [blame] | 79 | { PCI_DEVICE_ID_INTEL_SPT_H_C236, "Skylake PCH-H C236" }, |
Felix Singer | c3244cc | 2019-07-29 22:54:09 +0200 | [diff] [blame] | 80 | { PCI_DEVICE_ID_INTEL_SPT_H_C232, "Skylake PCH-H C232" }, |
V Sowmya | 7c15047 | 2018-01-23 14:44:45 +0530 | [diff] [blame] | 81 | { PCI_DEVICE_ID_INTEL_SPT_H_QM170, "Skylake PCH-H QM170" }, |
Felix Singer | c3244cc | 2019-07-29 22:54:09 +0200 | [diff] [blame] | 82 | { PCI_DEVICE_ID_INTEL_SPT_H_HM170, "Skylake PCH-H HM170" }, |
| 83 | { PCI_DEVICE_ID_INTEL_SPT_H_CM236, "Skylake PCH-H CM236" }, |
Praveen hodagatta pranesh | 523d669 | 2018-11-03 01:21:14 +0800 | [diff] [blame] | 84 | { PCI_DEVICE_ID_INTEL_SPT_H_HM175, "Skylake PCH-H HM175" }, |
| 85 | { PCI_DEVICE_ID_INTEL_SPT_H_QM175, "Skylake PCH-H QM175" }, |
| 86 | { PCI_DEVICE_ID_INTEL_SPT_H_CM238, "Skylake PCH-H CM238" }, |
Maxim Polyakov | 571d07d | 2019-08-22 13:11:32 +0300 | [diff] [blame] | 87 | { PCI_DEVICE_ID_INTEL_LWB_C621, "Lewisburg PCH C621" }, |
| 88 | { PCI_DEVICE_ID_INTEL_LWB_C622, "Lewisburg PCH C622" }, |
| 89 | { PCI_DEVICE_ID_INTEL_LWB_C624, "Lewisburg PCH C624" }, |
| 90 | { PCI_DEVICE_ID_INTEL_LWB_C625, "Lewisburg PCH C625" }, |
| 91 | { PCI_DEVICE_ID_INTEL_LWB_C626, "Lewisburg PCH C626" }, |
| 92 | { PCI_DEVICE_ID_INTEL_LWB_C627, "Lewisburg PCH C627" }, |
| 93 | { PCI_DEVICE_ID_INTEL_LWB_C628, "Lewisburg PCH C628" }, |
| 94 | { PCI_DEVICE_ID_INTEL_LWB_C629, "Lewisburg PCH C629" }, |
| 95 | { PCI_DEVICE_ID_INTEL_LWB_C624_SUPER, "Lewisburg PCH C624 Super SKU" }, |
| 96 | { PCI_DEVICE_ID_INTEL_LWB_C627_SUPER_1, "Lewisburg PCH C627 Super SKU" }, |
| 97 | { PCI_DEVICE_ID_INTEL_LWB_C621_SUPER, "Lewisburg PCH C621 Super SKU" }, |
| 98 | { PCI_DEVICE_ID_INTEL_LWB_C627_SUPER_2, "Lewisburg PCH C627 Super SKU" }, |
| 99 | { PCI_DEVICE_ID_INTEL_LWB_C628_SUPER, "Lewisburg PCH C628 Super SKU" }, |
V Sowmya | acc2a48 | 2018-01-23 15:27:23 +0530 | [diff] [blame] | 100 | { PCI_DEVICE_ID_INTEL_KBP_H_Q270, "Kabylake-H Q270" }, |
Gaggery Tsai | e415a4c | 2018-03-21 22:36:18 +0800 | [diff] [blame] | 101 | { PCI_DEVICE_ID_INTEL_KBP_H_H270, "Kabylake-H H270" }, |
| 102 | { PCI_DEVICE_ID_INTEL_KBP_H_Z270, "Kabylake-H Z270" }, |
| 103 | { PCI_DEVICE_ID_INTEL_KBP_H_B250, "Kabylake-H B250" }, |
| 104 | { PCI_DEVICE_ID_INTEL_KBP_H_Q250, "Kabylake-H Q250" }, |
Subrata Banik | c216567 | 2017-06-02 17:52:44 +0530 | [diff] [blame] | 105 | { PCI_DEVICE_ID_INTEL_KBP_LP_U_PREMIUM, "Kabylake-U Premium" }, |
| 106 | { PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM, "Kabylake-Y Premium" }, |
| 107 | { PCI_DEVICE_ID_INTEL_KBP_LP_SUPER_SKU, "Kabylake Super Sku" }, |
| 108 | { PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, |
| 109 | "Kabylake-Y iHDCP 2.2 Premium" }, |
| 110 | { PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22, |
| 111 | "Kabylake-U iHDCP 2.2 Premium" }, |
Gaggery Tsai | e2592be | 2017-09-20 22:46:39 +0800 | [diff] [blame] | 112 | { PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22, |
| 113 | "Kabylake-U iHDCP 2.2 Base" }, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 114 | }; |
| 115 | |
| 116 | static struct { |
| 117 | u16 igdid; |
| 118 | const char *name; |
| 119 | } igd_table[] = { |
Maxim Polyakov | 9563681 | 2019-09-20 22:06:57 +0300 | [diff] [blame] | 120 | { PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2, "Skylake DT GT1F" }, |
| 121 | { PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1" }, |
| 122 | { PCI_DEVICE_ID_INTEL_SKL_GT1F_SHALM, "Skylake HALO GT1F" }, |
Maxim Polyakov | 46e6852 | 2019-02-25 10:46:18 +0300 | [diff] [blame] | 123 | { PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, "Skylake DT GT2" }, |
Subrata Banik | c216567 | 2017-06-02 17:52:44 +0530 | [diff] [blame] | 124 | { PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2" }, |
| 125 | { PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2" }, |
Maxim Polyakov | 9563681 | 2019-09-20 22:06:57 +0300 | [diff] [blame] | 126 | { PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM, "Skylake Mobile Xeon GT2"}, |
| 127 | { PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" }, |
| 128 | { PCI_DEVICE_ID_INTEL_SKL_GT3_SULTM, "Skylake ULT GT3" }, |
| 129 | { PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1, "Skylake ULT (15W) GT3E" }, |
| 130 | { PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2, "Skylake ULT (28W) GT3E" }, |
| 131 | { PCI_DEVICE_ID_INTEL_SKL_GT3FE_SSRVM, "Skylake Media Server GT3FE" }, |
Subrata Banik | c216567 | 2017-06-02 17:52:44 +0530 | [diff] [blame] | 132 | { PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, "Skylake HALO GT4" }, |
Maxim Polyakov | 9563681 | 2019-09-20 22:06:57 +0300 | [diff] [blame] | 133 | { PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM, "Skylake Workstation GT4E" }, |
Maxim Polyakov | 8595469 | 2019-09-23 16:08:41 +0300 | [diff] [blame] | 134 | { PCI_DEVICE_ID_INTEL_KBL_GT1F_DT2, "Kaby Lake DT GT1F" }, |
| 135 | { PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM, "Kaby Lake ULT GT1" }, |
| 136 | { PCI_DEVICE_ID_INTEL_KBL_GT1_SHALM_1, "Kaby Lake HALO GT1" }, |
| 137 | { PCI_DEVICE_ID_INTEL_KBL_GT1_SHALM_2, "Kaby Lake HALO GT1" }, |
| 138 | { PCI_DEVICE_ID_INTEL_KBL_GT1_SSRVM, "Kaby Lake SRV GT1" }, |
| 139 | { PCI_DEVICE_ID_INTEL_KBL_GT2_SSRVM, "Kaby Lake Media Server GT2" }, |
| 140 | { PCI_DEVICE_ID_INTEL_KBL_GT2_SWSTM, "Kaby Lake Workstation GT2" }, |
| 141 | { PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM, "Kaby Lake ULX GT2" }, |
| 142 | { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM, "Kaby Lake ULT GT2" }, |
| 143 | { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR, "Kaby Lake-R ULT GT2" }, |
| 144 | { PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, "Kaby Lake HALO GT2" }, |
| 145 | { PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, "Kaby Lake DT GT2" }, |
| 146 | { PCI_DEVICE_ID_INTEL_KBL_GT2F_SULTM, "Kaby Lake ULT GT2F" }, |
| 147 | { PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1, "Kaby Lake ULT (15W) GT3E" }, |
| 148 | { PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2, "Kaby Lake ULT (28W) GT3E" }, |
| 149 | { PCI_DEVICE_ID_INTEL_KBL_GT4_SHALM, "Kaby Lake HALO GT4" }, |
Gaggery Tsai | 8aee7f7 | 2018-08-03 11:40:55 -0700 | [diff] [blame] | 150 | { PCI_DEVICE_ID_INTEL_AML_GT2_ULX, "Amberlake ULX GT2" }, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 151 | }; |
| 152 | |
Elyes HAOUAS | 68c851b | 2018-06-12 22:06:09 +0200 | [diff] [blame] | 153 | static uint8_t get_dev_revision(pci_devfn_t dev) |
Subrata Banik | df5ae9c | 2017-12-06 19:10:15 +0530 | [diff] [blame] | 154 | { |
| 155 | return pci_read_config8(dev, PCI_REVISION_ID); |
| 156 | } |
| 157 | |
Elyes HAOUAS | 68c851b | 2018-06-12 22:06:09 +0200 | [diff] [blame] | 158 | static uint16_t get_dev_id(pci_devfn_t dev) |
Subrata Banik | df5ae9c | 2017-12-06 19:10:15 +0530 | [diff] [blame] | 159 | { |
| 160 | return pci_read_config16(dev, PCI_DEVICE_ID); |
| 161 | } |
| 162 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 163 | static void report_cpu_info(void) |
| 164 | { |
Usha P | 65a8c2e | 2019-11-14 11:58:53 +0530 | [diff] [blame] | 165 | u32 i, cpu_id, cpu_feature_flag; |
| 166 | char cpu_name[49]; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 167 | int vt, txt, aes; |
| 168 | msr_t microcode_ver; |
Elyes HAOUAS | 39303d5 | 2018-07-08 12:40:45 +0200 | [diff] [blame] | 169 | static const char *const mode[] = {"NOT ", ""}; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 170 | const char *cpu_type = "Unknown"; |
| 171 | |
Usha P | 65a8c2e | 2019-11-14 11:58:53 +0530 | [diff] [blame] | 172 | fill_processor_name(cpu_name); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 173 | |
| 174 | microcode_ver.lo = 0; |
| 175 | microcode_ver.hi = 0; |
Elyes HAOUAS | 603963e | 2018-09-28 09:06:43 +0200 | [diff] [blame] | 176 | wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); |
Subrata Banik | 53b08c3 | 2018-12-10 14:11:35 +0530 | [diff] [blame] | 177 | cpu_id = cpu_get_cpuid(); |
Elyes HAOUAS | 603963e | 2018-09-28 09:06:43 +0200 | [diff] [blame] | 178 | microcode_ver = rdmsr(IA32_BIOS_SIGN_ID); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 179 | |
| 180 | /* Look for string to match the name */ |
| 181 | for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { |
Subrata Banik | 53b08c3 | 2018-12-10 14:11:35 +0530 | [diff] [blame] | 182 | if (cpu_table[i].cpuid == cpu_id) { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 183 | cpu_type = cpu_table[i].name; |
| 184 | break; |
| 185 | } |
| 186 | } |
| 187 | |
| 188 | printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); |
| 189 | printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", |
Subrata Banik | 53b08c3 | 2018-12-10 14:11:35 +0530 | [diff] [blame] | 190 | cpu_id, cpu_type, microcode_ver.hi); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 191 | |
Subrata Banik | 53b08c3 | 2018-12-10 14:11:35 +0530 | [diff] [blame] | 192 | cpu_feature_flag = cpu_get_feature_flags_ecx(); |
| 193 | aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; |
| 194 | txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0; |
| 195 | vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 196 | printk(BIOS_DEBUG, |
| 197 | "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n", |
| 198 | mode[aes], mode[txt], mode[vt]); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 199 | } |
| 200 | |
| 201 | static void report_mch_info(void) |
| 202 | { |
| 203 | int i; |
Elyes HAOUAS | 68c851b | 2018-06-12 22:06:09 +0200 | [diff] [blame] | 204 | pci_devfn_t dev = SA_DEV_ROOT; |
Subrata Banik | df5ae9c | 2017-12-06 19:10:15 +0530 | [diff] [blame] | 205 | uint16_t mchid = get_dev_id(dev); |
| 206 | uint8_t mch_revision = get_dev_revision(dev); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 207 | const char *mch_type = "Unknown"; |
| 208 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 209 | for (i = 0; i < ARRAY_SIZE(mch_table); i++) { |
| 210 | if (mch_table[i].mchid == mchid) { |
| 211 | mch_type = mch_table[i].name; |
| 212 | break; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 213 | } |
| 214 | } |
| 215 | |
| 216 | printk(BIOS_DEBUG, "MCH: device id %04x (rev %02x) is %s\n", |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 217 | mchid, mch_revision, mch_type); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 218 | } |
| 219 | |
| 220 | static void report_pch_info(void) |
| 221 | { |
| 222 | int i; |
Elyes HAOUAS | 68c851b | 2018-06-12 22:06:09 +0200 | [diff] [blame] | 223 | pci_devfn_t dev = PCH_DEV_LPC; |
Subrata Banik | df5ae9c | 2017-12-06 19:10:15 +0530 | [diff] [blame] | 224 | uint16_t lpcid = get_dev_id(dev); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 225 | const char *pch_type = "Unknown"; |
| 226 | |
| 227 | for (i = 0; i < ARRAY_SIZE(pch_table); i++) { |
| 228 | if (pch_table[i].lpcid == lpcid) { |
| 229 | pch_type = pch_table[i].name; |
| 230 | break; |
| 231 | } |
| 232 | } |
| 233 | printk(BIOS_DEBUG, "PCH: device id %04x (rev %02x) is %s\n", |
Subrata Banik | df5ae9c | 2017-12-06 19:10:15 +0530 | [diff] [blame] | 234 | lpcid, get_dev_revision(dev), pch_type); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 235 | } |
| 236 | |
| 237 | static void report_igd_info(void) |
| 238 | { |
| 239 | int i; |
Elyes HAOUAS | 68c851b | 2018-06-12 22:06:09 +0200 | [diff] [blame] | 240 | pci_devfn_t dev = SA_DEV_IGD; |
Subrata Banik | df5ae9c | 2017-12-06 19:10:15 +0530 | [diff] [blame] | 241 | uint16_t igdid = get_dev_id(dev); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 242 | const char *igd_type = "Unknown"; |
| 243 | |
| 244 | for (i = 0; i < ARRAY_SIZE(igd_table); i++) { |
| 245 | if (igd_table[i].igdid == igdid) { |
| 246 | igd_type = igd_table[i].name; |
| 247 | break; |
| 248 | } |
| 249 | } |
| 250 | printk(BIOS_DEBUG, "IGD: device id %04x (rev %02x) is %s\n", |
Subrata Banik | df5ae9c | 2017-12-06 19:10:15 +0530 | [diff] [blame] | 251 | igdid, get_dev_revision(dev), igd_type); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 252 | } |
| 253 | |
| 254 | void report_platform_info(void) |
| 255 | { |
| 256 | report_cpu_info(); |
| 257 | report_mch_info(); |
| 258 | report_pch_info(); |
| 259 | report_igd_info(); |
| 260 | } |
| 261 | |
| 262 | /* |
| 263 | * Dump in the log memory controller configuration as read from the memory |
| 264 | * controller registers. |
| 265 | */ |
| 266 | void report_memory_config(void) |
| 267 | { |
| 268 | u32 addr_decoder_common, addr_decode_ch[2]; |
| 269 | int i; |
| 270 | |
| 271 | addr_decoder_common = MCHBAR32(0x5000); |
| 272 | addr_decode_ch[0] = MCHBAR32(0x5004); |
| 273 | addr_decode_ch[1] = MCHBAR32(0x5008); |
| 274 | |
| 275 | printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", |
| 276 | (MCHBAR32(0x5e04) * 13333 * 2 + 50)/100); |
| 277 | printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n", |
| 278 | addr_decoder_common & 3, |
| 279 | (addr_decoder_common >> 2) & 3, |
| 280 | (addr_decoder_common >> 4) & 3); |
| 281 | |
| 282 | for (i = 0; i < ARRAY_SIZE(addr_decode_ch); i++) { |
| 283 | u32 ch_conf = addr_decode_ch[i]; |
| 284 | printk(BIOS_DEBUG, "memcfg channel[%d] config (%8.8x):\n", |
| 285 | i, ch_conf); |
| 286 | printk(BIOS_DEBUG, " enhanced interleave mode %s\n", |
| 287 | ((ch_conf >> 22) & 1) ? "on" : "off"); |
| 288 | printk(BIOS_DEBUG, " rank interleave %s\n", |
| 289 | ((ch_conf >> 21) & 1) ? "on" : "off"); |
| 290 | printk(BIOS_DEBUG, " DIMMA %d MB width %s %s rank%s\n", |
| 291 | ((ch_conf >> 0) & 0xff) * 256, |
| 292 | ((ch_conf >> 19) & 1) ? "x16" : "x8 or x32", |
| 293 | ((ch_conf >> 17) & 1) ? "dual" : "single", |
| 294 | ((ch_conf >> 16) & 1) ? "" : ", selected"); |
| 295 | printk(BIOS_DEBUG, " DIMMB %d MB width %s %s rank%s\n", |
| 296 | ((ch_conf >> 8) & 0xff) * 256, |
| 297 | ((ch_conf >> 19) & 1) ? "x16" : "x8 or x32", |
| 298 | ((ch_conf >> 18) & 1) ? "dual" : "single", |
| 299 | ((ch_conf >> 16) & 1) ? ", selected" : ""); |
| 300 | } |
| 301 | } |