blob: 0b219e006d52f2a6ed7ca9e9240ca0609c0de843 [file] [log] [blame]
Angel Ponsae593872020-04-04 18:50:57 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Marc Jones24484842017-05-04 21:17:45 -06002
Kyösti Mälkkid7865202020-07-01 13:15:27 +03003#include <amdblocks/acpimmio.h>
Marc Jones24484842017-05-04 21:17:45 -06004#include <device/device.h>
5#include <device/pci.h>
6#include <device/pci_ids.h>
Marc Jones24484842017-05-04 21:17:45 -06007#include <device/smbus.h>
Aaron Durbin178d6442020-01-28 11:10:23 -07008#include <device/smbus_host.h>
Marc Jones24484842017-05-04 21:17:45 -06009#include <arch/ioapic.h>
Marc Jonesdfeb1c42017-08-07 19:08:24 -060010#include <soc/southbridge.h>
Marc Jones24484842017-05-04 21:17:45 -060011
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020012static void sm_init(struct device *dev)
Marc Jones24484842017-05-04 21:17:45 -060013{
Felix Held1b332052021-02-11 03:01:18 +010014 fch_enable_ioapic_decode();
Marc Jones24484842017-05-04 21:17:45 -060015 setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS);
16}
17
Richard Spiegelb40e1932018-10-24 12:51:21 -070018static u32 get_sm_mmio(struct device *dev)
Marc Jones24484842017-05-04 21:17:45 -060019{
Felix Held8199b882021-01-05 00:03:20 +010020 /*
21 * Since SMBus and ASF controller are behind the same PCIe device, we don't know behind
22 * which controller a device is. We assume here that the devices are behind the SMBus
23 * controller. The proper solution would be to handle those as MMIO devices instead of
24 * PCI ones.
25 */
26 return (uintptr_t)acpimmio_smbus;
Richard Spiegelb40e1932018-10-24 12:51:21 -070027}
28
29static int lsmbus_recv_byte(struct device *dev)
30{
31 u8 device;
32
33 device = dev->path.i2c.device;
34 return do_smbus_recv_byte(get_sm_mmio(dev), device);
Marc Jones24484842017-05-04 21:17:45 -060035}
36
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020037static int lsmbus_send_byte(struct device *dev, u8 val)
Marc Jones24484842017-05-04 21:17:45 -060038{
Richard Spiegelcd04e312017-11-08 14:58:30 -070039 u8 device;
Marc Jones24484842017-05-04 21:17:45 -060040
41 device = dev->path.i2c.device;
Richard Spiegelb40e1932018-10-24 12:51:21 -070042 return do_smbus_send_byte(get_sm_mmio(dev), device, val);
Marc Jones24484842017-05-04 21:17:45 -060043}
44
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020045static int lsmbus_read_byte(struct device *dev, u8 address)
Marc Jones24484842017-05-04 21:17:45 -060046{
Richard Spiegelcd04e312017-11-08 14:58:30 -070047 u8 device;
Marc Jones24484842017-05-04 21:17:45 -060048
49 device = dev->path.i2c.device;
Richard Spiegelb40e1932018-10-24 12:51:21 -070050 return do_smbus_read_byte(get_sm_mmio(dev), device, address);
Marc Jones24484842017-05-04 21:17:45 -060051}
52
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020053static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
Marc Jones24484842017-05-04 21:17:45 -060054{
Richard Spiegelcd04e312017-11-08 14:58:30 -070055 u8 device;
Marc Jones24484842017-05-04 21:17:45 -060056
57 device = dev->path.i2c.device;
Richard Spiegelb40e1932018-10-24 12:51:21 -070058 return do_smbus_write_byte(get_sm_mmio(dev), device, address, val);
Marc Jones24484842017-05-04 21:17:45 -060059}
60static struct smbus_bus_operations lops_smbus_bus = {
61 .recv_byte = lsmbus_recv_byte,
62 .send_byte = lsmbus_send_byte,
63 .read_byte = lsmbus_read_byte,
64 .write_byte = lsmbus_write_byte,
65};
66
Marc Jones24484842017-05-04 21:17:45 -060067static struct device_operations smbus_ops = {
Nico Huber2f8ba692020-04-05 14:05:24 +020068 .read_resources = noop_read_resources,
69 .set_resources = noop_set_resources,
Marc Jones24484842017-05-04 21:17:45 -060070 .enable_resources = pci_dev_enable_resources,
71 .init = sm_init,
72 .scan_bus = scan_smbus,
Angel Pons1fc0edd2020-05-31 00:03:28 +020073 .ops_pci = &pci_dev_ops_pci,
Marc Jones24484842017-05-04 21:17:45 -060074 .ops_smbus_bus = &lops_smbus_bus,
75};
76static const struct pci_driver smbus_driver __pci_driver = {
77 .ops = &smbus_ops,
78 .vendor = PCI_VENDOR_ID_AMD,
Martin Roth069ca662018-03-01 11:26:18 -070079 .device = PCI_DEVICE_ID_AMD_CZ_SMBUS,
Marc Jones24484842017-05-04 21:17:45 -060080};