commit 777ccd43961c002baebd52d986f5e49b0d7bc7f8
author Elyes HAOUAS <ehaouas@noos.fr> Tue May 22 10:52:05 2018 +0200
committer Kyösti Mälkki <kyosti.malkki@gmail.com> Wed May 23 09:56:59 2018 +0000
tree 3042c3cb2c4c5663b2e6c5fe5b10c9915abe4844
parent 532001ae73529d23878021129484c5bc3f24fed5

soc/amd/stoneyridge/: Get rid of device_t

Use of device_t has been abandoned in ramstage.

Change-Id: I84fbc90b2a81fe5476d659716f0d6e4f0d7e1de2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26458
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>

src/soc/amd/stoneyridge/sm.c

diff --git a/src/soc/amd/stoneyridge/sm.c b/src/soc/amd/stoneyridge/sm.c
index d4f428f3..278f8a8 100644
--- a/src/soc/amd/stoneyridge/sm.c
+++ b/src/soc/amd/stoneyridge/sm.c
@@ -32,12 +32,12 @@
 * The southbridge enables SATA by default in SMBUS Control.
 */
 
-static void sm_init(device_t dev)
+static void sm_init(struct device *dev)
 {
 	setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS);
 }
 
-static int lsmbus_recv_byte(device_t dev)
+static int lsmbus_recv_byte(struct device *dev)
 {
 	u8 device;
 	struct resource *res;
@@ -51,7 +51,7 @@
 	return do_smbus_recv_byte(res->base, device);
 }
 
-static int lsmbus_send_byte(device_t dev, u8 val)
+static int lsmbus_send_byte(struct device *dev, u8 val)
 {
 	u8 device;
 	struct resource *res;
@@ -65,7 +65,7 @@
 	return do_smbus_send_byte(res->base, device, val);
 }
 
-static int lsmbus_read_byte(device_t dev, u8 address)
+static int lsmbus_read_byte(struct device *dev, u8 address)
 {
 	u8 device;
 	struct resource *res;
@@ -79,7 +79,7 @@
 	return do_smbus_read_byte(res->base, device, address);
 }
 
-static int lsmbus_write_byte(device_t dev, u8 address, u8 val)
+static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
 {
 	u8 device;
 	struct resource *res;