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Marc Jones24484842017-05-04 21:17:45 -06001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
Marc Jones24484842017-05-04 21:17:45 -060016#include <device/device.h>
17#include <device/pci.h>
18#include <device/pci_ids.h>
Marc Jones24484842017-05-04 21:17:45 -060019#include <device/smbus.h>
Aaron Durbin178d6442020-01-28 11:10:23 -070020#include <device/smbus_host.h>
Marc Jones24484842017-05-04 21:17:45 -060021#include <cpu/x86/lapic.h>
22#include <arch/ioapic.h>
Marc Jonesdfeb1c42017-08-07 19:08:24 -060023#include <soc/southbridge.h>
Marc Jones24484842017-05-04 21:17:45 -060024
Marc Jones24484842017-05-04 21:17:45 -060025/*
Marc Jonesdfeb1c42017-08-07 19:08:24 -060026* The southbridge enables all USB controllers by default in SMBUS Control.
27* The southbridge enables SATA by default in SMBUS Control.
Marc Jones24484842017-05-04 21:17:45 -060028*/
29
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020030static void sm_init(struct device *dev)
Marc Jones24484842017-05-04 21:17:45 -060031{
32 setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS);
33}
34
Richard Spiegelb40e1932018-10-24 12:51:21 -070035static u32 get_sm_mmio(struct device *dev)
Marc Jones24484842017-05-04 21:17:45 -060036{
Marc Jones24484842017-05-04 21:17:45 -060037 struct resource *res;
38 struct bus *pbus;
39
Marc Jones24484842017-05-04 21:17:45 -060040 pbus = get_pbus_smbus(dev);
Marc Jones24484842017-05-04 21:17:45 -060041 res = find_resource(pbus->dev, 0x90);
Richard Spiegelb40e1932018-10-24 12:51:21 -070042 if (res->base == SMB_BASE_ADDR)
Marshall Dawson5de47712019-05-01 16:14:42 -060043 return ACPIMMIO_SMBUS_BASE;
Marc Jones24484842017-05-04 21:17:45 -060044
Marshall Dawson5de47712019-05-01 16:14:42 -060045 return ACPIMMIO_ASF_BASE;
Richard Spiegelb40e1932018-10-24 12:51:21 -070046}
47
48static int lsmbus_recv_byte(struct device *dev)
49{
50 u8 device;
51
52 device = dev->path.i2c.device;
53 return do_smbus_recv_byte(get_sm_mmio(dev), device);
Marc Jones24484842017-05-04 21:17:45 -060054}
55
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020056static int lsmbus_send_byte(struct device *dev, u8 val)
Marc Jones24484842017-05-04 21:17:45 -060057{
Richard Spiegelcd04e312017-11-08 14:58:30 -070058 u8 device;
Marc Jones24484842017-05-04 21:17:45 -060059
60 device = dev->path.i2c.device;
Richard Spiegelb40e1932018-10-24 12:51:21 -070061 return do_smbus_send_byte(get_sm_mmio(dev), device, val);
Marc Jones24484842017-05-04 21:17:45 -060062}
63
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020064static int lsmbus_read_byte(struct device *dev, u8 address)
Marc Jones24484842017-05-04 21:17:45 -060065{
Richard Spiegelcd04e312017-11-08 14:58:30 -070066 u8 device;
Marc Jones24484842017-05-04 21:17:45 -060067
68 device = dev->path.i2c.device;
Richard Spiegelb40e1932018-10-24 12:51:21 -070069 return do_smbus_read_byte(get_sm_mmio(dev), device, address);
Marc Jones24484842017-05-04 21:17:45 -060070}
71
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020072static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
Marc Jones24484842017-05-04 21:17:45 -060073{
Richard Spiegelcd04e312017-11-08 14:58:30 -070074 u8 device;
Marc Jones24484842017-05-04 21:17:45 -060075
76 device = dev->path.i2c.device;
Richard Spiegelb40e1932018-10-24 12:51:21 -070077 return do_smbus_write_byte(get_sm_mmio(dev), device, address, val);
Marc Jones24484842017-05-04 21:17:45 -060078}
79static struct smbus_bus_operations lops_smbus_bus = {
80 .recv_byte = lsmbus_recv_byte,
81 .send_byte = lsmbus_send_byte,
82 .read_byte = lsmbus_read_byte,
83 .write_byte = lsmbus_write_byte,
84};
85
Marc Jones24484842017-05-04 21:17:45 -060086static struct pci_operations lops_pci = {
87 .set_subsystem = pci_dev_set_subsystem,
88};
89static struct device_operations smbus_ops = {
Richard Spiegelcd04e312017-11-08 14:58:30 -070090 .read_resources = DEVICE_NOOP,
91 .set_resources = DEVICE_NOOP,
Marc Jones24484842017-05-04 21:17:45 -060092 .enable_resources = pci_dev_enable_resources,
93 .init = sm_init,
94 .scan_bus = scan_smbus,
95 .ops_pci = &lops_pci,
96 .ops_smbus_bus = &lops_smbus_bus,
97};
98static const struct pci_driver smbus_driver __pci_driver = {
99 .ops = &smbus_ops,
100 .vendor = PCI_VENDOR_ID_AMD,
Martin Roth069ca662018-03-01 11:26:18 -0700101 .device = PCI_DEVICE_ID_AMD_CZ_SMBUS,
Marc Jones24484842017-05-04 21:17:45 -0600102};