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Angel Ponsae593872020-04-04 18:50:57 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Martin Roth5c354b92019-04-22 14:55:16 -06002
Raul E Rangel34fb9392020-06-11 16:57:23 -06003#include <acpi/acpigen.h>
Martin Roth5c354b92019-04-22 14:55:16 -06004#include <console/uart.h>
Raul E Rangel34fb9392020-06-11 16:57:23 -06005#include <console/console.h>
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -06006#include <commonlib/helpers.h>
Julius Werner55009af2019-12-02 22:03:27 -08007#include <device/mmio.h>
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -06008#include <amdblocks/gpio_banks.h>
9#include <amdblocks/acpimmio.h>
Martin Roth5c354b92019-04-22 14:55:16 -060010#include <soc/southbridge.h>
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -060011#include <soc/gpio.h>
12
13static const struct _uart_info {
14 uintptr_t base;
15 struct soc_amd_gpio mux[2];
16} uart_info[] = {
17 [0] = { APU_UART0_BASE, {
18 PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
19 PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
20 } },
21 [1] = { APU_UART1_BASE, {
22 PAD_NF(GPIO_143, UART1_TXD, PULL_NONE),
23 PAD_NF(GPIO_141, UART1_RXD, PULL_NONE),
24 } },
25 [2] = { APU_UART2_BASE, {
26 PAD_NF(GPIO_137, UART2_TXD, PULL_NONE),
27 PAD_NF(GPIO_135, UART2_RXD, PULL_NONE),
28 } },
29 [3] = { APU_UART3_BASE, {
30 PAD_NF(GPIO_140, UART3_TXD, PULL_NONE),
31 PAD_NF(GPIO_142, UART3_RXD, PULL_NONE),
32 } },
33};
Martin Roth5c354b92019-04-22 14:55:16 -060034
Furquan Shaikhca481ee2020-06-13 00:16:26 -070035/*
Felix Held097e4492020-06-16 15:35:20 +020036 * Don't provide uart_platform_base and uart_platform_refclk functions if PICASSO_CONSOLE_UART
Furquan Shaikhca481ee2020-06-13 00:16:26 -070037 * isn't selected. Those two functions are used by the console UART driver and need to be
38 * provided exactly once and only by the UART that is used for console.
39 *
40 * TODO: Replace the #if block by factoring out the two functions into a different compilation
41 * unit.
42 */
Felix Held097e4492020-06-16 15:35:20 +020043#if CONFIG(PICASSO_CONSOLE_UART)
Furquan Shaikhca481ee2020-06-13 00:16:26 -070044
Martin Roth5c354b92019-04-22 14:55:16 -060045uintptr_t uart_platform_base(int idx)
46{
Felix Heldefd23d92020-06-10 19:39:51 +020047 if (idx < 0 || idx >= ARRAY_SIZE(uart_info))
Martin Roth5c354b92019-04-22 14:55:16 -060048 return 0;
49
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -060050 return uart_info[idx].base;
51}
52
Furquan Shaikhca481ee2020-06-13 00:16:26 -070053unsigned int uart_platform_refclk(void)
54{
55 return CONFIG(PICASSO_UART_48MZ) ? 48000000 : 115200 * 16;
56}
57
Felix Held097e4492020-06-16 15:35:20 +020058#endif /* PICASSO_CONSOLE_UART */
Furquan Shaikhca481ee2020-06-13 00:16:26 -070059
Raul E Rangel4f5936b2020-06-11 16:27:49 -060060void clear_uart_legacy_config(void)
61{
62 write16((void *)FCH_UART_LEGACY_DECODE, 0);
63}
64
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -060065void set_uart_config(int idx)
66{
67 uint32_t uart_ctrl;
68 uint16_t uart_leg;
69
Felix Heldefd23d92020-06-10 19:39:51 +020070 if (idx < 0 || idx >= ARRAY_SIZE(uart_info))
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -060071 return;
72
73 program_gpios(uart_info[idx].mux, 2);
74
75 if (CONFIG(PICASSO_UART_1_8MZ)) {
76 uart_ctrl = sm_pci_read32(SMB_UART_CONFIG);
77 uart_ctrl |= 1 << (SMB_UART_1_8M_SHIFT + idx);
78 sm_pci_write32(SMB_UART_CONFIG, uart_ctrl);
79 }
80
81 if (CONFIG(PICASSO_UART_LEGACY) && idx != 3) {
82 /* Force 3F8 if idx=0, 2F8 if idx=1, 3E8 if idx=2 */
83
84 /* TODO: make clearer once PPR is updated */
85 uart_leg = (idx << 8) | (idx << 10) | (idx << 12) | (idx << 14);
86 if (idx == 0)
87 uart_leg |= 1 << FCH_LEGACY_3F8_SH;
88 else if (idx == 1)
89 uart_leg |= 1 << FCH_LEGACY_2F8_SH;
90 else if (idx == 2)
91 uart_leg |= 1 << FCH_LEGACY_3E8_SH;
92
93 write16((void *)FCH_UART_LEGACY_DECODE, uart_leg);
94 }
Martin Roth5c354b92019-04-22 14:55:16 -060095}
96
Furquan Shaikhb07e2622020-06-03 16:50:32 -070097static const char *uart_acpi_name(const struct device *dev)
98{
99 switch (dev->path.mmio.addr) {
100 case APU_UART0_BASE:
101 return "FUR0";
102 case APU_UART1_BASE:
103 return "FUR1";
104 case APU_UART2_BASE:
105 return "FUR2";
106 case APU_UART3_BASE:
107 return "FUR3";
108 default:
109 return NULL;
110 }
111}
112
Raul E Rangel34fb9392020-06-11 16:57:23 -0600113/* Even though this is called enable, it gets called for both enabled and disabled devices. */
114static void uart_enable(struct device *dev)
115{
116 int dev_id;
117
118 switch (dev->path.mmio.addr) {
119 case APU_UART0_BASE:
120 dev_id = FCH_AOAC_DEV_UART0;
121 break;
122 case APU_UART1_BASE:
123 dev_id = FCH_AOAC_DEV_UART1;
124 break;
125 case APU_UART2_BASE:
126 dev_id = FCH_AOAC_DEV_UART2;
127 break;
128 case APU_UART3_BASE:
129 dev_id = FCH_AOAC_DEV_UART3;
130 break;
131 default:
132 printk(BIOS_ERR, "%s: Unknown device: %s\n", __func__, dev_path(dev));
133 return;
134 }
135
136 if (dev->enabled) {
137 power_on_aoac_device(dev_id);
138 wait_for_aoac_enabled(dev_id);
139 } else {
140 power_off_aoac_device(dev_id);
141 }
142}
143
144/* This gets called for both enabled and disabled devices. */
145static void uart_inject_ssdt(const struct device *dev)
146{
147 acpigen_write_scope(acpi_device_path(dev));
148
149 acpigen_write_STA(acpi_device_status(dev));
150
151 acpigen_pop_len(); /* Scope */
152}
153
Furquan Shaikhb07e2622020-06-03 16:50:32 -0700154struct device_operations picasso_uart_mmio_ops = {
155 .read_resources = noop_read_resources,
156 .set_resources = noop_set_resources,
157 .scan_bus = scan_static_bus,
158 .acpi_name = uart_acpi_name,
Raul E Rangel34fb9392020-06-11 16:57:23 -0600159 .enable = uart_enable,
160 .acpi_fill_ssdt = uart_inject_ssdt,
Furquan Shaikhb07e2622020-06-03 16:50:32 -0700161};