Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Marshall Dawson | c0b8d0d | 2019-06-20 10:29:29 -0600 | [diff] [blame^] | 4 | * Copyright (C) 2019 Advanced Micro Devices, Inc. |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
Marshall Dawson | c0b8d0d | 2019-06-20 10:29:29 -0600 | [diff] [blame^] | 16 | #include <arch/mmio.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 17 | #include <console/uart.h> |
Marshall Dawson | c0b8d0d | 2019-06-20 10:29:29 -0600 | [diff] [blame^] | 18 | #include <commonlib/helpers.h> |
| 19 | #include <amdblocks/gpio_banks.h> |
| 20 | #include <amdblocks/acpimmio.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 21 | #include <soc/southbridge.h> |
Marshall Dawson | c0b8d0d | 2019-06-20 10:29:29 -0600 | [diff] [blame^] | 22 | #include <soc/gpio.h> |
| 23 | |
| 24 | static const struct _uart_info { |
| 25 | uintptr_t base; |
| 26 | struct soc_amd_gpio mux[2]; |
| 27 | } uart_info[] = { |
| 28 | [0] = { APU_UART0_BASE, { |
| 29 | PAD_NF(GPIO_138, UART0_TXD, PULL_NONE), |
| 30 | PAD_NF(GPIO_136, UART0_RXD, PULL_NONE), |
| 31 | } }, |
| 32 | [1] = { APU_UART1_BASE, { |
| 33 | PAD_NF(GPIO_143, UART1_TXD, PULL_NONE), |
| 34 | PAD_NF(GPIO_141, UART1_RXD, PULL_NONE), |
| 35 | } }, |
| 36 | [2] = { APU_UART2_BASE, { |
| 37 | PAD_NF(GPIO_137, UART2_TXD, PULL_NONE), |
| 38 | PAD_NF(GPIO_135, UART2_RXD, PULL_NONE), |
| 39 | } }, |
| 40 | [3] = { APU_UART3_BASE, { |
| 41 | PAD_NF(GPIO_140, UART3_TXD, PULL_NONE), |
| 42 | PAD_NF(GPIO_142, UART3_RXD, PULL_NONE), |
| 43 | } }, |
| 44 | }; |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 45 | |
| 46 | uintptr_t uart_platform_base(int idx) |
| 47 | { |
Marshall Dawson | c0b8d0d | 2019-06-20 10:29:29 -0600 | [diff] [blame^] | 48 | if (idx < 0 || idx > ARRAY_SIZE(uart_info)) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 49 | return 0; |
| 50 | |
Marshall Dawson | c0b8d0d | 2019-06-20 10:29:29 -0600 | [diff] [blame^] | 51 | return uart_info[idx].base; |
| 52 | } |
| 53 | |
| 54 | void set_uart_config(int idx) |
| 55 | { |
| 56 | uint32_t uart_ctrl; |
| 57 | uint16_t uart_leg; |
| 58 | |
| 59 | if (idx < 0 || idx > ARRAY_SIZE(uart_info)) |
| 60 | return; |
| 61 | |
| 62 | program_gpios(uart_info[idx].mux, 2); |
| 63 | |
| 64 | if (CONFIG(PICASSO_UART_1_8MZ)) { |
| 65 | uart_ctrl = sm_pci_read32(SMB_UART_CONFIG); |
| 66 | uart_ctrl |= 1 << (SMB_UART_1_8M_SHIFT + idx); |
| 67 | sm_pci_write32(SMB_UART_CONFIG, uart_ctrl); |
| 68 | } |
| 69 | |
| 70 | if (CONFIG(PICASSO_UART_LEGACY) && idx != 3) { |
| 71 | /* Force 3F8 if idx=0, 2F8 if idx=1, 3E8 if idx=2 */ |
| 72 | |
| 73 | /* TODO: make clearer once PPR is updated */ |
| 74 | uart_leg = (idx << 8) | (idx << 10) | (idx << 12) | (idx << 14); |
| 75 | if (idx == 0) |
| 76 | uart_leg |= 1 << FCH_LEGACY_3F8_SH; |
| 77 | else if (idx == 1) |
| 78 | uart_leg |= 1 << FCH_LEGACY_2F8_SH; |
| 79 | else if (idx == 2) |
| 80 | uart_leg |= 1 << FCH_LEGACY_3E8_SH; |
| 81 | |
| 82 | write16((void *)FCH_UART_LEGACY_DECODE, uart_leg); |
| 83 | } |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | unsigned int uart_platform_refclk(void) |
| 87 | { |
Marshall Dawson | c0b8d0d | 2019-06-20 10:29:29 -0600 | [diff] [blame^] | 88 | return CONFIG(PICASSO_UART_48MZ) ? 48000000 : 115200 * 16; |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 89 | } |