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Angel Ponsae593872020-04-04 18:50:57 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Martin Roth5c354b92019-04-22 14:55:16 -06002
3#include <console/uart.h>
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -06004#include <commonlib/helpers.h>
Julius Werner55009af2019-12-02 22:03:27 -08005#include <device/mmio.h>
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -06006#include <amdblocks/gpio_banks.h>
7#include <amdblocks/acpimmio.h>
Martin Roth5c354b92019-04-22 14:55:16 -06008#include <soc/southbridge.h>
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -06009#include <soc/gpio.h>
10
11static const struct _uart_info {
12 uintptr_t base;
13 struct soc_amd_gpio mux[2];
14} uart_info[] = {
15 [0] = { APU_UART0_BASE, {
16 PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
17 PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
18 } },
19 [1] = { APU_UART1_BASE, {
20 PAD_NF(GPIO_143, UART1_TXD, PULL_NONE),
21 PAD_NF(GPIO_141, UART1_RXD, PULL_NONE),
22 } },
23 [2] = { APU_UART2_BASE, {
24 PAD_NF(GPIO_137, UART2_TXD, PULL_NONE),
25 PAD_NF(GPIO_135, UART2_RXD, PULL_NONE),
26 } },
27 [3] = { APU_UART3_BASE, {
28 PAD_NF(GPIO_140, UART3_TXD, PULL_NONE),
29 PAD_NF(GPIO_142, UART3_RXD, PULL_NONE),
30 } },
31};
Martin Roth5c354b92019-04-22 14:55:16 -060032
Furquan Shaikhca481ee2020-06-13 00:16:26 -070033/*
34 * Don't provide uart_platform_base and uart_platform_refclk functions if PICASSO_UART
35 * isn't selected. Those two functions are used by the console UART driver and need to be
36 * provided exactly once and only by the UART that is used for console.
37 *
38 * TODO: Replace the #if block by factoring out the two functions into a different compilation
39 * unit.
40 */
41#if CONFIG(PICASSO_UART)
42
Martin Roth5c354b92019-04-22 14:55:16 -060043uintptr_t uart_platform_base(int idx)
44{
Felix Heldefd23d92020-06-10 19:39:51 +020045 if (idx < 0 || idx >= ARRAY_SIZE(uart_info))
Martin Roth5c354b92019-04-22 14:55:16 -060046 return 0;
47
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -060048 return uart_info[idx].base;
49}
50
Furquan Shaikhca481ee2020-06-13 00:16:26 -070051unsigned int uart_platform_refclk(void)
52{
53 return CONFIG(PICASSO_UART_48MZ) ? 48000000 : 115200 * 16;
54}
55
56#endif /* PICASSO_UART */
57
Raul E Rangel4f5936b2020-06-11 16:27:49 -060058void clear_uart_legacy_config(void)
59{
60 write16((void *)FCH_UART_LEGACY_DECODE, 0);
61}
62
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -060063void set_uart_config(int idx)
64{
65 uint32_t uart_ctrl;
66 uint16_t uart_leg;
67
Felix Heldefd23d92020-06-10 19:39:51 +020068 if (idx < 0 || idx >= ARRAY_SIZE(uart_info))
Marshall Dawsonc0b8d0d2019-06-20 10:29:29 -060069 return;
70
71 program_gpios(uart_info[idx].mux, 2);
72
73 if (CONFIG(PICASSO_UART_1_8MZ)) {
74 uart_ctrl = sm_pci_read32(SMB_UART_CONFIG);
75 uart_ctrl |= 1 << (SMB_UART_1_8M_SHIFT + idx);
76 sm_pci_write32(SMB_UART_CONFIG, uart_ctrl);
77 }
78
79 if (CONFIG(PICASSO_UART_LEGACY) && idx != 3) {
80 /* Force 3F8 if idx=0, 2F8 if idx=1, 3E8 if idx=2 */
81
82 /* TODO: make clearer once PPR is updated */
83 uart_leg = (idx << 8) | (idx << 10) | (idx << 12) | (idx << 14);
84 if (idx == 0)
85 uart_leg |= 1 << FCH_LEGACY_3F8_SH;
86 else if (idx == 1)
87 uart_leg |= 1 << FCH_LEGACY_2F8_SH;
88 else if (idx == 2)
89 uart_leg |= 1 << FCH_LEGACY_3E8_SH;
90
91 write16((void *)FCH_UART_LEGACY_DECODE, uart_leg);
92 }
Martin Roth5c354b92019-04-22 14:55:16 -060093}
94
Furquan Shaikhb07e2622020-06-03 16:50:32 -070095static const char *uart_acpi_name(const struct device *dev)
96{
97 switch (dev->path.mmio.addr) {
98 case APU_UART0_BASE:
99 return "FUR0";
100 case APU_UART1_BASE:
101 return "FUR1";
102 case APU_UART2_BASE:
103 return "FUR2";
104 case APU_UART3_BASE:
105 return "FUR3";
106 default:
107 return NULL;
108 }
109}
110
111struct device_operations picasso_uart_mmio_ops = {
112 .read_resources = noop_read_resources,
113 .set_resources = noop_set_resources,
114 .scan_bus = scan_static_bus,
115 .acpi_name = uart_acpi_name,
116};