huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright 2014 Rockchip Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 15 | |
Julius Werner | dd07ef2 | 2015-08-28 14:34:09 -0700 | [diff] [blame] | 16 | config BOARD_GOOGLE_VEYRON # dummy option to be selected by variant boards |
| 17 | def_bool n |
| 18 | |
| 19 | if BOARD_GOOGLE_VEYRON |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 20 | |
Julius Werner | 2d99f3b | 2017-03-16 14:08:09 -0700 | [diff] [blame^] | 21 | # Some Veyron boards incorrectly had their RAM code strapped with 100Kohm |
| 22 | # resistors. These get overpowered by the SoC's internal pull-downs, so we |
| 23 | # cannot read those pins as tri-state. They're restricted to binary RAM codes. |
| 24 | config VEYRON_FORCE_BINARY_RAM_CODE |
| 25 | bool |
| 26 | default y if BOARD_GOOGLE_VEYRON_JAQ |
| 27 | default y if BOARD_GOOGLE_VEYRON_JERRY |
| 28 | default y if BOARD_GOOGLE_VEYRON_MIGHTY |
| 29 | default n |
| 30 | |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 31 | config BOARD_SPECIFIC_OPTIONS # dummy |
| 32 | def_bool y |
Stefan Reinauer | 82c706e | 2015-03-30 12:20:55 -0700 | [diff] [blame] | 33 | select BOARD_ID_AUTO |
David Hendricks | 3cbf02c | 2014-12-15 16:15:23 -0800 | [diff] [blame] | 34 | select COMMON_CBFS_SPI_WRAPPER |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 35 | select EC_GOOGLE_CHROMEEC |
| 36 | select EC_GOOGLE_CHROMEEC_SPI |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 37 | select RAM_CODE_SUPPORT |
| 38 | select SOC_ROCKCHIP_RK3288 |
Martin Roth | c0c115b | 2015-08-21 14:37:02 -0600 | [diff] [blame] | 39 | select MAINBOARD_HAS_NATIVE_VGA_INIT |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 40 | select MAINBOARD_DO_NATIVE_VGA_INIT |
| 41 | select MAINBOARD_HAS_CHROMEOS |
Julius Werner | dd07ef2 | 2015-08-28 14:34:09 -0700 | [diff] [blame] | 42 | select BOARD_ROMSIZE_KB_4096 |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 43 | select HAVE_HARD_RESET |
David Hendricks | 3cbf02c | 2014-12-15 16:15:23 -0800 | [diff] [blame] | 44 | select SPI_FLASH |
| 45 | select SPI_FLASH_GIGADEVICE |
Julius Werner | b7641cc | 2014-12-19 12:41:16 -0800 | [diff] [blame] | 46 | select SPI_FLASH_WINBOND |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 47 | |
Martin Roth | 967cd9a | 2015-08-18 14:22:58 -0600 | [diff] [blame] | 48 | config CHROMEOS |
Martin Roth | 967cd9a | 2015-08-18 14:22:58 -0600 | [diff] [blame] | 49 | select EC_SOFTWARE_SYNC |
Furquan Shaikh | 2a12e2e | 2016-07-25 11:48:03 -0700 | [diff] [blame] | 50 | select VBOOT_VBNV_EC |
Martin Roth | 8c12d6e | 2015-08-24 15:55:29 -0600 | [diff] [blame] | 51 | select VIRTUAL_DEV_SWITCH |
Martin Roth | 967cd9a | 2015-08-18 14:22:58 -0600 | [diff] [blame] | 52 | |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 53 | config MAINBOARD_DIR |
| 54 | string |
Julius Werner | dd07ef2 | 2015-08-28 14:34:09 -0700 | [diff] [blame] | 55 | default google/veyron |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 56 | |
| 57 | config MAINBOARD_PART_NUMBER |
| 58 | string |
Julius Werner | dd07ef2 | 2015-08-28 14:34:09 -0700 | [diff] [blame] | 59 | default "Veyron" |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 60 | |
| 61 | config MAINBOARD_VENDOR |
| 62 | string |
| 63 | default "Google" |
| 64 | |
| 65 | config EC_GOOGLE_CHROMEEC_SPI_BUS |
| 66 | hex |
Martin Roth | 3b87812 | 2016-09-30 14:43:01 -0600 | [diff] [blame] | 67 | default 0x0 |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 68 | |
| 69 | config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US |
| 70 | int |
| 71 | default 100 |
| 72 | |
Aaron Durbin | 08e842c | 2016-08-11 14:40:09 -0500 | [diff] [blame] | 73 | config BOOT_DEVICE_SPI_FLASH_BUS |
Martin Roth | 595e777 | 2015-04-26 18:53:26 -0600 | [diff] [blame] | 74 | int |
| 75 | default 2 |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 76 | |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 77 | config DRIVER_TPM_I2C_BUS |
| 78 | hex |
| 79 | default 0x1 |
| 80 | |
| 81 | config DRIVER_TPM_I2C_ADDR |
| 82 | hex |
| 83 | default 0x20 |
| 84 | |
| 85 | config CONSOLE_SERIAL_UART_ADDRESS |
| 86 | hex |
Patrick Georgi | 01368ed | 2015-04-16 15:27:52 +0200 | [diff] [blame] | 87 | depends on DRIVERS_UART |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 88 | default 0xFF690000 |
| 89 | |
David Hendricks | 4d24421 | 2015-01-12 13:13:30 -0800 | [diff] [blame] | 90 | config PMIC_BUS |
| 91 | int |
| 92 | default 0 |
| 93 | |
Paul Kocialkowski | d738b14 | 2015-09-16 18:23:23 +0200 | [diff] [blame] | 94 | config CBFS_SIZE |
| 95 | hex |
| 96 | default 0x100000 if CHROMEOS |
| 97 | default ROM_SIZE |
| 98 | |
Patrick Georgi | c3686b3 | 2016-02-01 15:28:02 +0100 | [diff] [blame] | 99 | config EC_GOOGLE_CHROMEEC_BOARDNAME |
| 100 | string |
| 101 | depends on CHROMEOS |
| 102 | #default "gus" if BOARD_GOOGLE_VEYRON_GUS |
| 103 | #default "jaq" if BOARD_GOOGLE_VEYRON_JAQ |
| 104 | default "jerry" if BOARD_GOOGLE_VEYRON_JERRY |
| 105 | #default "mighty" if BOARD_GOOGLE_VEYRON_MIGHTY |
| 106 | #default "minnie" if BOARD_GOOGLE_VEYRON_MINNIE |
| 107 | #default "nicky" if BOARD_GOOGLE_VEYRON_NICKY |
| 108 | #default "pinky" if BOARD_GOOGLE_VEYRON_PINKY |
| 109 | #default "minnie" if BOARD_GOOGLE_VEYRON_SHARK |
| 110 | #default "speedy" if BOARD_GOOGLE_VEYRON_SPEEDY |
| 111 | #default "thea" if BOARD_GOOGLE_VEYRON_THEA |
| 112 | |
Patrick Georgi | a0f6abc | 2016-02-05 11:30:19 +0100 | [diff] [blame] | 113 | config GBB_HWID |
| 114 | string |
| 115 | depends on CHROMEOS |
| 116 | default "GUS TEST A-A 2606" if BOARD_GOOGLE_VEYRON_GUS |
| 117 | default "JAQ TEST A-A 8292" if BOARD_GOOGLE_VEYRON_JAQ |
| 118 | default "JERRY TEST A-A 1250" if BOARD_GOOGLE_VEYRON_JERRY |
| 119 | default "MIGHTY TEST A-A 4557" if BOARD_GOOGLE_VEYRON_MIGHTY |
| 120 | default "MINNIE TEST A-A 5151" if BOARD_GOOGLE_VEYRON_MINNIE |
| 121 | default "NICKY TEST A-A 9039" if BOARD_GOOGLE_VEYRON_NICKY |
| 122 | default "PINKY TEST A-A 3693" if BOARD_GOOGLE_VEYRON_PINKY |
| 123 | default "SHARK TEST A-A 8553" if BOARD_GOOGLE_VEYRON_SHARK |
| 124 | default "SPEEDY TEST A-A 8421" if BOARD_GOOGLE_VEYRON_SPEEDY |
| 125 | default "THEA TEST A-A 7163" if BOARD_GOOGLE_VEYRON_THEA |
| 126 | |
Patrick Georgi | 4399b85 | 2016-12-06 21:59:23 +0100 | [diff] [blame] | 127 | config CHROMEOS_FWID_MODEL |
| 128 | string |
| 129 | default "Google_Veyron_Gus" if BOARD_GOOGLE_VEYRON_GUS |
| 130 | default "Google_Veyron_Jaq" if BOARD_GOOGLE_VEYRON_JAQ |
| 131 | default "Google_Veyron_Jerry" if BOARD_GOOGLE_VEYRON_JERRY |
| 132 | default "Google_Veyron_Mighty" if BOARD_GOOGLE_VEYRON_MIGHTY |
| 133 | default "Google_Veyron_Minnie" if BOARD_GOOGLE_VEYRON_MINNIE |
| 134 | default "Google_Veyron_Nicky" if BOARD_GOOGLE_VEYRON_NICKY |
| 135 | default "Google_Veyron_Pinky" if BOARD_GOOGLE_VEYRON_PINKY |
| 136 | default "Google_Veyron_Shinky" if BOARD_GOOGLE_VEYRON_SHARK |
| 137 | default "Google_Veyron_Speedy" if BOARD_GOOGLE_VEYRON_SPEEDY |
| 138 | default "Google_Veyron_Thea" if BOARD_GOOGLE_VEYRON_THEA |
| 139 | |
Julius Werner | dd07ef2 | 2015-08-28 14:34:09 -0700 | [diff] [blame] | 140 | endif # BOARD_GOOGLE_VEYRON |