| huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame^] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright 2014 Rockchip Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
| 17 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | ## |
| 19 | |
| 20 | if BOARD_GOOGLE_VEYRON_SPEEDY |
| 21 | |
| 22 | config BOARD_SPECIFIC_OPTIONS # dummy |
| 23 | def_bool y |
| 24 | select BOARD_ID_SUPPORT |
| 25 | select BOARD_ROMSIZE_KB_4096 |
| 26 | select EC_GOOGLE_CHROMEEC |
| 27 | select EC_GOOGLE_CHROMEEC_SPI |
| 28 | select EC_SOFTWARE_SYNC |
| 29 | select RAM_CODE_SUPPORT |
| 30 | select SOC_ROCKCHIP_RK3288 |
| 31 | select MAINBOARD_DO_NATIVE_VGA_INIT |
| 32 | select MAINBOARD_HAS_CHROMEOS |
| 33 | select MAINBOARD_HAS_BOOTBLOCK_INIT |
| 34 | select HAVE_HARD_RESET |
| 35 | select RETURN_FROM_VERSTAGE |
| 36 | select VIRTUAL_DEV_SWITCH |
| 37 | |
| 38 | config MAINBOARD_DIR |
| 39 | string |
| 40 | default google/veyron_speedy |
| 41 | |
| 42 | config MAINBOARD_PART_NUMBER |
| 43 | string |
| 44 | default "Veyron_Speedy" |
| 45 | |
| 46 | config MAINBOARD_VENDOR |
| 47 | string |
| 48 | default "Google" |
| 49 | |
| 50 | config EC_GOOGLE_CHROMEEC_SPI_BUS |
| 51 | hex |
| 52 | default 0 |
| 53 | |
| 54 | config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US |
| 55 | int |
| 56 | default 100 |
| 57 | |
| 58 | config VBOOT_RAMSTAGE_INDEX |
| 59 | hex |
| 60 | default 0x3 |
| 61 | |
| 62 | config BOOT_MEDIA_SPI_BUS |
| 63 | int |
| 64 | default 2 |
| 65 | |
| 66 | config DRAM_SIZE_MB |
| 67 | int |
| 68 | default 2048 |
| 69 | |
| 70 | config DRIVER_TPM_I2C_BUS |
| 71 | hex |
| 72 | default 0x1 |
| 73 | |
| 74 | config DRIVER_TPM_I2C_ADDR |
| 75 | hex |
| 76 | default 0x20 |
| 77 | |
| 78 | config CONSOLE_SERIAL_UART_ADDRESS |
| 79 | hex |
| 80 | depends on CONSOLE_SERIAL_UART |
| 81 | default 0xFF690000 |
| 82 | |
| 83 | endif # BOARD_GOOGLE_VEYRON_SPEEDY |