huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright 2014 Rockchip Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
Patrick Georgi | b890a12 | 2015-03-26 15:17:45 +0100 | [diff] [blame] | 17 | ## Foundation, Inc. |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 18 | ## |
| 19 | |
| 20 | if BOARD_GOOGLE_VEYRON_SPEEDY |
| 21 | |
| 22 | config BOARD_SPECIFIC_OPTIONS # dummy |
| 23 | def_bool y |
Stefan Reinauer | 82c706e | 2015-03-30 12:20:55 -0700 | [diff] [blame] | 24 | select BOARD_ID_AUTO |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 25 | select BOARD_ROMSIZE_KB_4096 |
David Hendricks | 3cbf02c | 2014-12-15 16:15:23 -0800 | [diff] [blame] | 26 | select COMMON_CBFS_SPI_WRAPPER |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 27 | select EC_GOOGLE_CHROMEEC |
| 28 | select EC_GOOGLE_CHROMEEC_SPI |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 29 | select RAM_CODE_SUPPORT |
| 30 | select SOC_ROCKCHIP_RK3288 |
| 31 | select MAINBOARD_DO_NATIVE_VGA_INIT |
| 32 | select MAINBOARD_HAS_CHROMEOS |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 33 | select HAVE_HARD_RESET |
David Hendricks | 3cbf02c | 2014-12-15 16:15:23 -0800 | [diff] [blame] | 34 | select SPI_FLASH |
| 35 | select SPI_FLASH_GIGADEVICE |
Julius Werner | b7641cc | 2014-12-19 12:41:16 -0800 | [diff] [blame] | 36 | select SPI_FLASH_WINBOND |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 37 | select VIRTUAL_DEV_SWITCH |
| 38 | |
Martin Roth | 967cd9a | 2015-08-18 14:22:58 -0600 | [diff] [blame^] | 39 | config CHROMEOS |
| 40 | select CHROMEOS_VBNV_EC |
| 41 | select EC_SOFTWARE_SYNC |
| 42 | |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 43 | config MAINBOARD_DIR |
| 44 | string |
| 45 | default google/veyron_speedy |
| 46 | |
| 47 | config MAINBOARD_PART_NUMBER |
| 48 | string |
| 49 | default "Veyron_Speedy" |
| 50 | |
| 51 | config MAINBOARD_VENDOR |
| 52 | string |
| 53 | default "Google" |
| 54 | |
| 55 | config EC_GOOGLE_CHROMEEC_SPI_BUS |
| 56 | hex |
| 57 | default 0 |
| 58 | |
| 59 | config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US |
| 60 | int |
| 61 | default 100 |
| 62 | |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 63 | config BOOT_MEDIA_SPI_BUS |
Martin Roth | 595e777 | 2015-04-26 18:53:26 -0600 | [diff] [blame] | 64 | int |
| 65 | default 2 |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 66 | |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 67 | config DRIVER_TPM_I2C_BUS |
| 68 | hex |
| 69 | default 0x1 |
| 70 | |
| 71 | config DRIVER_TPM_I2C_ADDR |
| 72 | hex |
| 73 | default 0x20 |
| 74 | |
| 75 | config CONSOLE_SERIAL_UART_ADDRESS |
| 76 | hex |
Patrick Georgi | 01368ed | 2015-04-16 15:27:52 +0200 | [diff] [blame] | 77 | depends on DRIVERS_UART |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 78 | default 0xFF690000 |
| 79 | |
David Hendricks | 4d24421 | 2015-01-12 13:13:30 -0800 | [diff] [blame] | 80 | config PMIC_BUS |
| 81 | int |
| 82 | default 0 |
| 83 | |
huang lin | 346ea77 | 2014-12-08 10:34:27 +0800 | [diff] [blame] | 84 | endif # BOARD_GOOGLE_VEYRON_SPEEDY |