veyron: Add veyron_speedy board
Essentially a copy of veyron_jerry for now
BUG=chrome-os-partner:33269
TEST=emerge-veyron_speedy coreboot
BRANCH=None
Change-Id: If8f32122e301df1766bca68b11efd8afe8be5e87
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: f49a151e1dd956ed2cf3ba0b1f9307442b61e639
Original-Change-Id: Ife457db4fd67fe69bcd4082694b3372eccfb304b
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/233822
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9627
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
diff --git a/src/mainboard/google/veyron_speedy/Kconfig b/src/mainboard/google/veyron_speedy/Kconfig
new file mode 100644
index 0000000..ee22cc9
--- /dev/null
+++ b/src/mainboard/google/veyron_speedy/Kconfig
@@ -0,0 +1,83 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2014 Rockchip Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+if BOARD_GOOGLE_VEYRON_SPEEDY
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select BOARD_ID_SUPPORT
+ select BOARD_ROMSIZE_KB_4096
+ select EC_GOOGLE_CHROMEEC
+ select EC_GOOGLE_CHROMEEC_SPI
+ select EC_SOFTWARE_SYNC
+ select RAM_CODE_SUPPORT
+ select SOC_ROCKCHIP_RK3288
+ select MAINBOARD_DO_NATIVE_VGA_INIT
+ select MAINBOARD_HAS_CHROMEOS
+ select MAINBOARD_HAS_BOOTBLOCK_INIT
+ select HAVE_HARD_RESET
+ select RETURN_FROM_VERSTAGE
+ select VIRTUAL_DEV_SWITCH
+
+config MAINBOARD_DIR
+ string
+ default google/veyron_speedy
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "Veyron_Speedy"
+
+config MAINBOARD_VENDOR
+ string
+ default "Google"
+
+config EC_GOOGLE_CHROMEEC_SPI_BUS
+ hex
+ default 0
+
+config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US
+ int
+ default 100
+
+config VBOOT_RAMSTAGE_INDEX
+ hex
+ default 0x3
+
+config BOOT_MEDIA_SPI_BUS
+ int
+ default 2
+
+config DRAM_SIZE_MB
+ int
+ default 2048
+
+config DRIVER_TPM_I2C_BUS
+ hex
+ default 0x1
+
+config DRIVER_TPM_I2C_ADDR
+ hex
+ default 0x20
+
+config CONSOLE_SERIAL_UART_ADDRESS
+ hex
+ depends on CONSOLE_SERIAL_UART
+ default 0xFF690000
+
+endif # BOARD_GOOGLE_VEYRON_SPEEDY