Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 3 | |
| 4 | |
| 5 | #include <device/device.h> |
| 6 | #include <device/pci.h> |
| 7 | #include <console/console.h> |
| 8 | #include <arch/io.h> |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 9 | #include <cpu/x86/cache.h> |
| 10 | #include <cpu/x86/smm.h> |
Kyösti Mälkki | f091f4d | 2019-08-14 03:49:21 +0300 | [diff] [blame] | 11 | #include <cpu/intel/smm_reloc.h> |
Patrick Rudolph | ed3242e | 2018-06-29 10:34:37 +0200 | [diff] [blame] | 12 | #include <southbridge/intel/common/pmbase.h> |
Arthur Heymans | f0a017f | 2018-12-25 15:26:58 +0100 | [diff] [blame] | 13 | #include <southbridge/intel/common/pmutil.h> |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 14 | |
| 15 | #include "pmutil.h" |
| 16 | |
| 17 | #define DEBUG_PERIODIC_SMIS 0 |
| 18 | |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 19 | u16 get_pmbase(void) |
| 20 | { |
Patrick Rudolph | ed3242e | 2018-06-29 10:34:37 +0200 | [diff] [blame] | 21 | return lpc_get_pmbase(); |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 22 | } |
| 23 | |
Kyösti Mälkki | faf20d3 | 2019-08-14 05:41:41 +0300 | [diff] [blame] | 24 | void smm_southbridge_enable_smi(void) |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 25 | { |
| 26 | u32 smi_en; |
| 27 | u16 pm1_en; |
| 28 | u32 gpe0_en; |
| 29 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 30 | if (CONFIG(ELOG)) |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 31 | /* Log events from chipset before clearing */ |
Arthur Heymans | f0a017f | 2018-12-25 15:26:58 +0100 | [diff] [blame] | 32 | pch_log_state(); |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 33 | |
| 34 | printk(BIOS_DEBUG, "Initializing southbridge SMI..."); |
| 35 | |
Patrick Rudolph | ed3242e | 2018-06-29 10:34:37 +0200 | [diff] [blame] | 36 | printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", lpc_get_pmbase()); |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 37 | |
Patrick Rudolph | ed3242e | 2018-06-29 10:34:37 +0200 | [diff] [blame] | 38 | smi_en = read_pmbase32(SMI_EN); |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 39 | if (smi_en & APMC_EN) { |
| 40 | printk(BIOS_INFO, "SMI# handler already enabled?\n"); |
| 41 | return; |
| 42 | } |
| 43 | |
| 44 | printk(BIOS_DEBUG, "\n"); |
| 45 | dump_smi_status(reset_smi_status()); |
| 46 | dump_pm1_status(reset_pm1_status()); |
| 47 | dump_gpe0_status(reset_gpe0_status()); |
| 48 | dump_alt_gp_smi_status(reset_alt_gp_smi_status()); |
| 49 | dump_tco_status(reset_tco_status()); |
| 50 | |
| 51 | /* Disable GPE0 PME_B0 */ |
Patrick Rudolph | ed3242e | 2018-06-29 10:34:37 +0200 | [diff] [blame] | 52 | gpe0_en = read_pmbase32(GPE0_EN); |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 53 | gpe0_en &= ~PME_B0_EN; |
Patrick Rudolph | ed3242e | 2018-06-29 10:34:37 +0200 | [diff] [blame] | 54 | write_pmbase32(GPE0_EN, gpe0_en); |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 55 | |
| 56 | pm1_en = 0; |
| 57 | pm1_en |= PWRBTN_EN; |
| 58 | pm1_en |= GBL_EN; |
Patrick Rudolph | ed3242e | 2018-06-29 10:34:37 +0200 | [diff] [blame] | 59 | write_pmbase16(PM1_EN, pm1_en); |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 60 | |
| 61 | /* Enable SMI generation: |
| 62 | * - on TCO events |
| 63 | * - on APMC writes (io 0xb2) |
| 64 | * - on writes to SLP_EN (sleep states) |
| 65 | * - on writes to GBL_RLS (bios commands) |
| 66 | * No SMIs: |
| 67 | * - on microcontroller writes (io 0x62/0x66) |
| 68 | */ |
| 69 | |
| 70 | smi_en = 0; /* reset SMI enables */ |
| 71 | |
| 72 | #if 0 |
| 73 | smi_en |= LEGACY_USB2_EN | LEGACY_USB_EN; |
| 74 | #endif |
| 75 | smi_en |= TCO_EN; |
| 76 | smi_en |= APMC_EN; |
| 77 | #if DEBUG_PERIODIC_SMIS |
| 78 | /* Set DEBUG_PERIODIC_SMIS in pch.h to debug using |
| 79 | * periodic SMIs. |
| 80 | */ |
| 81 | smi_en |= PERIODIC_EN; |
| 82 | #endif |
| 83 | smi_en |= SLP_SMI_EN; |
| 84 | #if 0 |
| 85 | smi_en |= BIOS_EN; |
| 86 | #endif |
| 87 | |
| 88 | /* The following need to be on for SMIs to happen */ |
| 89 | smi_en |= EOS | GBL_SMI_EN; |
| 90 | |
Patrick Rudolph | ed3242e | 2018-06-29 10:34:37 +0200 | [diff] [blame] | 91 | write_pmbase32(SMI_EN, smi_en); |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 92 | } |
| 93 | |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 94 | void smm_setup_structures(void *gnvs, void *tcg, void *smi1) |
| 95 | { |
| 96 | /* |
| 97 | * Issue SMI to set the gnvs pointer in SMM. |
| 98 | * tcg and smi1 are unused. |
| 99 | * |
| 100 | * EAX = APM_CNT_GNVS_UPDATE |
| 101 | * EBX = gnvs pointer |
| 102 | * EDX = APM_CNT |
| 103 | */ |
| 104 | asm volatile ( |
| 105 | "outb %%al, %%dx\n\t" |
| 106 | : /* ignore result */ |
| 107 | : "a" (APM_CNT_GNVS_UPDATE), |
Patrick Rudolph | 4af2add | 2018-11-26 15:56:11 +0100 | [diff] [blame] | 108 | "b" ((uintptr_t)gnvs), |
Arthur Heymans | a050817 | 2018-01-25 11:30:22 +0100 | [diff] [blame] | 109 | "d" (APM_CNT) |
| 110 | ); |
| 111 | } |
Arthur Heymans | edbf5d9 | 2018-01-25 20:03:42 +0100 | [diff] [blame] | 112 | |
Kyösti Mälkki | faf20d3 | 2019-08-14 05:41:41 +0300 | [diff] [blame] | 113 | void smm_southbridge_clear_state(void) |
Arthur Heymans | edbf5d9 | 2018-01-25 20:03:42 +0100 | [diff] [blame] | 114 | { |
| 115 | u32 smi_en; |
| 116 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 117 | if (CONFIG(ELOG)) |
Arthur Heymans | edbf5d9 | 2018-01-25 20:03:42 +0100 | [diff] [blame] | 118 | /* Log events from chipset before clearing */ |
| 119 | pch_log_state(); |
| 120 | |
| 121 | printk(BIOS_DEBUG, "Initializing Southbridge SMI...\n"); |
| 122 | printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", get_pmbase()); |
| 123 | |
| 124 | smi_en = inl(get_pmbase() + SMI_EN); |
| 125 | if (smi_en & APMC_EN) { |
| 126 | printk(BIOS_INFO, "SMI# handler already enabled?\n"); |
| 127 | return; |
| 128 | } |
| 129 | |
| 130 | printk(BIOS_DEBUG, "\n"); |
| 131 | |
| 132 | /* Dump and clear status registers */ |
| 133 | reset_smi_status(); |
| 134 | reset_pm1_status(); |
| 135 | reset_tco_status(); |
| 136 | reset_gpe0_status(); |
| 137 | } |