Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 3 | * |
| 4 | * It was originally based on the Linux kernel (drivers/pci/pci.c). |
| 5 | * |
| 6 | * Modifications are: |
| 7 | * Copyright (C) 2003-2004 Linux Networx |
| 8 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) |
| 9 | * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com> |
| 10 | * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov> |
| 11 | * Copyright (C) 2005-2006 Tyan |
| 12 | * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 13 | * Copyright (C) 2005-2009 coresystems GmbH |
| 14 | * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | /* |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 18 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 19 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 20 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, |
| 21 | * David Mosberger-Tang |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 22 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 23 | * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 24 | */ |
| 25 | |
| 26 | #include <console/console.h> |
| 27 | #include <stdlib.h> |
| 28 | #include <stdint.h> |
| 29 | #include <bitops.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 30 | #include <string.h> |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 31 | #include <arch/io.h> |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 32 | #include <device/device.h> |
| 33 | #include <device/pci.h> |
| 34 | #include <device/pci_ids.h> |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 35 | #include <part/hard_reset.h> |
Eric Biederman | 30e143a | 2003-09-01 23:45:32 +0000 | [diff] [blame] | 36 | #include <part/fallback_boot.h> |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 37 | #include <delay.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 38 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT == 1 |
| 39 | #include <device/hypertransport.h> |
| 40 | #endif |
| 41 | #if CONFIG_PCIX_PLUGIN_SUPPORT == 1 |
| 42 | #include <device/pcix.h> |
| 43 | #endif |
| 44 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT == 1 |
| 45 | #include <device/pciexp.h> |
| 46 | #endif |
Stefan Reinauer | ec75a57 | 2009-03-16 15:27:00 +0000 | [diff] [blame] | 47 | #if CONFIG_AGP_PLUGIN_SUPPORT == 1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 48 | #include <device/agp.h> |
| 49 | #endif |
| 50 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT == 1 |
| 51 | #include <device/cardbus.h> |
| 52 | #endif |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 53 | #define CONFIG_PC80_SYSTEM 1 |
| 54 | #if CONFIG_PC80_SYSTEM == 1 |
| 55 | #include <pc80/i8259.h> |
| 56 | #endif |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 57 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 58 | u8 pci_moving_config8(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 59 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 60 | u8 value, ones, zeroes; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 61 | value = pci_read_config8(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 62 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 63 | pci_write_config8(dev, reg, 0xff); |
| 64 | ones = pci_read_config8(dev, reg); |
| 65 | |
| 66 | pci_write_config8(dev, reg, 0x00); |
| 67 | zeroes = pci_read_config8(dev, reg); |
| 68 | |
| 69 | pci_write_config8(dev, reg, value); |
| 70 | |
| 71 | return ones ^ zeroes; |
| 72 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 73 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 74 | u16 pci_moving_config16(struct device * dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 75 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 76 | u16 value, ones, zeroes; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 77 | value = pci_read_config16(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 78 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 79 | pci_write_config16(dev, reg, 0xffff); |
| 80 | ones = pci_read_config16(dev, reg); |
| 81 | |
| 82 | pci_write_config16(dev, reg, 0x0000); |
| 83 | zeroes = pci_read_config16(dev, reg); |
| 84 | |
| 85 | pci_write_config16(dev, reg, value); |
| 86 | |
| 87 | return ones ^ zeroes; |
| 88 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 89 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 90 | u32 pci_moving_config32(struct device * dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 91 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 92 | u32 value, ones, zeroes; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 93 | value = pci_read_config32(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 94 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 95 | pci_write_config32(dev, reg, 0xffffffff); |
| 96 | ones = pci_read_config32(dev, reg); |
| 97 | |
| 98 | pci_write_config32(dev, reg, 0x00000000); |
| 99 | zeroes = pci_read_config32(dev, reg); |
| 100 | |
| 101 | pci_write_config32(dev, reg, value); |
| 102 | |
| 103 | return ones ^ zeroes; |
| 104 | } |
| 105 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 106 | /** |
| 107 | * Given a device, a capability type, and a last position, return the next |
| 108 | * matching capability. Always start at the head of the list. |
| 109 | * |
| 110 | * @param dev Pointer to the device structure. |
| 111 | * @param cap_type PCI_CAP_LIST_ID of the PCI capability we're looking for. |
| 112 | * @param last Location of the PCI capability register to start from. |
| 113 | */ |
| 114 | unsigned pci_find_next_capability(struct device *dev, unsigned cap, |
| 115 | unsigned last) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 116 | { |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 117 | unsigned pos = 0; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 118 | unsigned status; |
| 119 | unsigned reps = 48; |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 120 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 121 | status = pci_read_config16(dev, PCI_STATUS); |
| 122 | if (!(status & PCI_STATUS_CAP_LIST)) { |
| 123 | return 0; |
| 124 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 125 | switch (dev->hdr_type & 0x7f) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 126 | case PCI_HEADER_TYPE_NORMAL: |
| 127 | case PCI_HEADER_TYPE_BRIDGE: |
| 128 | pos = PCI_CAPABILITY_LIST; |
| 129 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 130 | case PCI_HEADER_TYPE_CARDBUS: |
| 131 | pos = PCI_CB_CAPABILITY_LIST; |
| 132 | break; |
| 133 | default: |
| 134 | return 0; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 135 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 136 | pos = pci_read_config8(dev, pos); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 137 | while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 138 | int this_cap; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 139 | pos &= ~3; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 140 | this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 141 | printk_spew("Capability: type 0x%02x @ 0x%02x\n", this_cap, |
| 142 | pos); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 143 | if (this_cap == 0xff) { |
| 144 | break; |
| 145 | } |
| 146 | if (!last && (this_cap == cap)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 147 | return pos; |
| 148 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 149 | if (last == pos) { |
| 150 | last = 0; |
| 151 | } |
| 152 | pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 153 | } |
| 154 | return 0; |
| 155 | } |
| 156 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 157 | /** |
| 158 | * Given a device, and a capability type, return the next matching |
| 159 | * capability. Always start at the head of the list. |
| 160 | * |
| 161 | * @param dev Pointer to the device structure. |
| 162 | * @param cap_type PCI_CAP_LIST_ID of the PCI capability we're looking for. |
| 163 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 164 | unsigned pci_find_capability(device_t dev, unsigned cap) |
| 165 | { |
| 166 | return pci_find_next_capability(dev, cap, 0); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 167 | } |
| 168 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 169 | /** |
| 170 | * Given a device and register, read the size of the BAR for that register. |
| 171 | * |
| 172 | * @param dev Pointer to the device structure. |
| 173 | * @param index Address of the PCI configuration register. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 174 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 175 | struct resource *pci_get_resource(struct device *dev, unsigned long index) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 176 | { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 177 | struct resource *resource; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 178 | unsigned long value, attr; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 179 | resource_t moving, limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 180 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 181 | /* Initialize the resources to nothing. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 182 | resource = new_resource(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 183 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 184 | /* Get the initial value. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 185 | value = pci_read_config32(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 186 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 187 | /* See which bits move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 188 | moving = pci_moving_config32(dev, index); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 189 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 190 | /* Initialize attr to the bits that do not move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 191 | attr = value & ~moving; |
| 192 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 193 | /* If it is a 64bit resource look at the high half as well. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 194 | if (((attr & PCI_BASE_ADDRESS_SPACE_IO) == 0) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 195 | ((attr & PCI_BASE_ADDRESS_MEM_LIMIT_MASK) == |
| 196 | PCI_BASE_ADDRESS_MEM_LIMIT_64)) { |
| 197 | /* Find the high bits that move. */ |
| 198 | moving |= |
| 199 | ((resource_t) pci_moving_config32(dev, index + 4)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 200 | } |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 201 | /* Find the resource constraints. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 202 | * Start by finding the bits that move. From there: |
| 203 | * - Size is the least significant bit of the bits that move. |
| 204 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 205 | * See PCI Spec 6.2.5.1. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 206 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 207 | limit = 0; |
| 208 | if (moving) { |
| 209 | resource->size = 1; |
| 210 | resource->align = resource->gran = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 211 | while (!(moving & resource->size)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 212 | resource->size <<= 1; |
| 213 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 214 | resource->gran += 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 215 | } |
| 216 | resource->limit = limit = moving | (resource->size - 1); |
| 217 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 218 | |
| 219 | /* Some broken hardware has read-only registers that do not |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 220 | * really size correctly. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 221 | * Example: the Acer M7229 has BARs 1-4 normally read-only. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 222 | * so BAR1 at offset 0x10 reads 0x1f1. If you size that register |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 223 | * by writing 0xffffffff to it, it will read back as 0x1f1 -- a |
| 224 | * violation of the spec. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 225 | * We catch this case and ignore it by observing which bits move, |
| 226 | * This also catches the common case unimplemented registers |
| 227 | * that always read back as 0. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 228 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 229 | if (moving == 0) { |
| 230 | if (value != 0) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 231 | printk_debug |
| 232 | ("%s register %02lx(%08lx), read-only ignoring it\n", |
| 233 | dev_path(dev), index, value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 234 | } |
| 235 | resource->flags = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 236 | } else if (attr & PCI_BASE_ADDRESS_SPACE_IO) { |
| 237 | /* An I/O mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 238 | attr &= PCI_BASE_ADDRESS_IO_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 239 | resource->flags |= IORESOURCE_IO; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 240 | /* I don't want to deal with 32bit I/O resources. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 241 | resource->limit = 0xffff; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 242 | } else { |
| 243 | /* A Memory mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 244 | attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 245 | resource->flags |= IORESOURCE_MEM; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 246 | if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 247 | resource->flags |= IORESOURCE_PREFETCH; |
| 248 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 249 | attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK; |
| 250 | if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 251 | /* 32bit limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 252 | resource->limit = 0xffffffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 253 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) { |
| 254 | /* 1MB limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 255 | resource->limit = 0x000fffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 256 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) { |
| 257 | /* 64bit limit. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 258 | resource->limit = 0xffffffffffffffffULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 259 | resource->flags |= IORESOURCE_PCI64; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 260 | } else { |
| 261 | /* Invalid value. */ |
| 262 | printk_err("Broken BAR with value %lx\n", attr); |
| 263 | printk_err(" on dev %s at index %02lx\n", |
| 264 | dev_path(dev), index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 265 | resource->flags = 0; |
| 266 | } |
| 267 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 268 | /* Don't let the limit exceed which bits can move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 269 | if (resource->limit > limit) { |
| 270 | resource->limit = limit; |
| 271 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 272 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 273 | return resource; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 274 | } |
| 275 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 276 | /** |
| 277 | * Given a device and an index, read the size of the BAR for that register. |
| 278 | * |
| 279 | * @param dev Pointer to the device structure. |
| 280 | * @param index Address of the PCI configuration register. |
| 281 | */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 282 | static void pci_get_rom_resource(struct device *dev, unsigned long index) |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 283 | { |
| 284 | struct resource *resource; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 285 | unsigned long value; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 286 | resource_t moving; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 287 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 288 | if ((dev->on_mainboard) && (dev->rom_address == 0)) { |
| 289 | /* Skip it if rom_address is not set in the MB Config.lb. */ |
| 290 | return; |
| 291 | } |
Yinghai Lu | bcde161 | 2005-01-14 05:34:09 +0000 | [diff] [blame] | 292 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 293 | /* Initialize the resources to nothing. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 294 | resource = new_resource(dev, index); |
| 295 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 296 | /* Get the initial value. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 297 | value = pci_read_config32(dev, index); |
| 298 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 299 | /* See which bits move. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 300 | moving = pci_moving_config32(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 301 | |
| 302 | /* Clear the Enable bit. */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 303 | moving = moving & ~PCI_ROM_ADDRESS_ENABLE; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 304 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 305 | /* Find the resource constraints. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 306 | * Start by finding the bits that move. From there: |
| 307 | * - Size is the least significant bit of the bits that move. |
| 308 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 309 | * See PCI Spec 6.2.5.1. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 310 | */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 311 | if (moving) { |
| 312 | resource->size = 1; |
| 313 | resource->align = resource->gran = 0; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 314 | while (!(moving & resource->size)) { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 315 | resource->size <<= 1; |
| 316 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 317 | resource->gran += 1; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 318 | } |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 319 | resource->limit = moving | (resource->size - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 320 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY; |
| 321 | } else { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 322 | if (value != 0) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 323 | printk_debug |
| 324 | ("%s register %02lx(%08lx), read-only ignoring it\n", |
| 325 | dev_path(dev), index, value); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 326 | } |
| 327 | resource->flags = 0; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 328 | } |
Yinghai Lu | c7870ac | 2005-01-13 19:14:52 +0000 | [diff] [blame] | 329 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 330 | /* For on board device with embedded ROM image, the ROM image is at |
Yinghai Lu | c7870ac | 2005-01-13 19:14:52 +0000 | [diff] [blame] | 331 | * fixed address specified in the Config.lb, the dev->rom_address is |
| 332 | * inited by driver_pci_onboard_ops::enable_dev() */ |
Yinghai Lu | bcde161 | 2005-01-14 05:34:09 +0000 | [diff] [blame] | 333 | if ((dev->on_mainboard) && (dev->rom_address != 0)) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 334 | resource->base = dev->rom_address; |
Myles Watson | ce9d864 | 2009-08-19 19:12:39 +0000 | [diff] [blame] | 335 | /* The resource allocator needs the size to be non-zero. */ |
| 336 | resource->size = 0x100; |
Yinghai Lu | c7870ac | 2005-01-13 19:14:52 +0000 | [diff] [blame] | 337 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 338 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 339 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 340 | |
| 341 | compact_resources(dev); |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 342 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 343 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 344 | /** |
| 345 | * Read the base address registers for a given device. |
| 346 | * |
| 347 | * @param dev Pointer to the dev structure. |
| 348 | * @param howmany How many registers to read (6 for device, 2 for bridge). |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 349 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 350 | static void pci_read_bases(struct device *dev, unsigned int howmany) |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 351 | { |
| 352 | unsigned long index; |
| 353 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 354 | for (index = PCI_BASE_ADDRESS_0; |
| 355 | (index < PCI_BASE_ADDRESS_0 + (howmany << 2));) { |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 356 | struct resource *resource; |
| 357 | resource = pci_get_resource(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 358 | index += (resource->flags & IORESOURCE_PCI64) ? 8 : 4; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 359 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 360 | |
| 361 | compact_resources(dev); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 362 | } |
| 363 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 364 | static void pci_record_bridge_resource(struct device *dev, resource_t moving, |
| 365 | unsigned index, unsigned long type) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 366 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 367 | /* Initialize the constraints on the current bus. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 368 | struct resource *resource; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 369 | resource = NULL; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 370 | if (moving) { |
| 371 | unsigned long gran; |
| 372 | resource_t step; |
| 373 | resource = new_resource(dev, index); |
| 374 | resource->size = 0; |
| 375 | gran = 0; |
| 376 | step = 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 377 | while ((moving & step) == 0) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 378 | gran += 1; |
| 379 | step <<= 1; |
| 380 | } |
| 381 | resource->gran = gran; |
| 382 | resource->align = gran; |
| 383 | resource->limit = moving | (step - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 384 | resource->flags = type | IORESOURCE_PCI_BRIDGE | |
| 385 | IORESOURCE_BRIDGE; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 386 | } |
| 387 | return; |
| 388 | } |
| 389 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 390 | static void pci_bridge_read_bases(struct device *dev) |
| 391 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 392 | resource_t moving_base, moving_limit, moving; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 393 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 394 | /* See if the bridge I/O resources are implemented. */ |
| 395 | moving_base = ((u32) pci_moving_config8(dev, PCI_IO_BASE)) << 8; |
| 396 | moving_base |= |
| 397 | ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 398 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 399 | moving_limit = ((u32) pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; |
| 400 | moving_limit |= |
| 401 | ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 402 | |
| 403 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 404 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 405 | /* Initialize the I/O space constraints on the current bus. */ |
| 406 | pci_record_bridge_resource(dev, moving, PCI_IO_BASE, IORESOURCE_IO); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 407 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 408 | /* See if the bridge prefmem resources are implemented. */ |
| 409 | moving_base = |
| 410 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; |
| 411 | moving_base |= |
| 412 | ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << |
| 413 | 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 414 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 415 | moving_limit = |
| 416 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << |
| 417 | 16; |
| 418 | moving_limit |= |
| 419 | ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << |
| 420 | 32; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 421 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 422 | moving = moving_base & moving_limit; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 423 | /* Initialize the prefetchable memory constraints on the current bus. */ |
| 424 | pci_record_bridge_resource(dev, moving, PCI_PREF_MEMORY_BASE, |
| 425 | IORESOURCE_MEM | IORESOURCE_PREFETCH); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 426 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 427 | /* See if the bridge mem resources are implemented. */ |
| 428 | moving_base = ((u32) pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; |
| 429 | moving_limit = ((u32) pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 430 | |
| 431 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 432 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 433 | /* Initialize the memory resources on the current bus. */ |
| 434 | pci_record_bridge_resource(dev, moving, PCI_MEMORY_BASE, |
| 435 | IORESOURCE_MEM); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 436 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 437 | compact_resources(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 438 | } |
| 439 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 440 | void pci_dev_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 441 | { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 442 | pci_read_bases(dev, 6); |
| 443 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 444 | } |
| 445 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 446 | void pci_bus_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 447 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 448 | pci_bridge_read_bases(dev); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 449 | pci_read_bases(dev, 2); |
| 450 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS1); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 451 | } |
| 452 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 453 | void pci_domain_read_resources(struct device *dev) |
| 454 | { |
| 455 | struct resource *res; |
| 456 | |
| 457 | /* Initialize the system-wide I/O space constraints. */ |
| 458 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); |
| 459 | res->limit = 0xffffUL; |
| 460 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 461 | IORESOURCE_ASSIGNED; |
| 462 | |
| 463 | /* Initialize the system-wide memory resources constraints. */ |
| 464 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); |
| 465 | res->limit = 0xffffffffULL; |
| 466 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 467 | IORESOURCE_ASSIGNED; |
| 468 | } |
| 469 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 470 | static void pci_set_resource(struct device *dev, struct resource *resource) |
| 471 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 472 | resource_t base, end; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 473 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 474 | /* Make certain the resource has actually been assigned a value. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 475 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 476 | printk_err("ERROR: %s %02lx %s size: 0x%010llx not assigned\n", |
| 477 | dev_path(dev), resource->index, |
| 478 | resource_type(resource), resource->size); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 479 | return; |
| 480 | } |
| 481 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 482 | /* If I have already stored this resource don't worry about it. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 483 | if (resource->flags & IORESOURCE_STORED) { |
| 484 | return; |
| 485 | } |
| 486 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 487 | /* If the resource is subtractive don't worry about it. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 488 | if (resource->flags & IORESOURCE_SUBTRACTIVE) { |
| 489 | return; |
| 490 | } |
| 491 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 492 | /* Only handle PCI memory and I/O resources for now. */ |
| 493 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 494 | return; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 495 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 496 | /* Enable the resources in the command register. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 497 | if (resource->size) { |
| 498 | if (resource->flags & IORESOURCE_MEM) { |
| 499 | dev->command |= PCI_COMMAND_MEMORY; |
| 500 | } |
| 501 | if (resource->flags & IORESOURCE_IO) { |
| 502 | dev->command |= PCI_COMMAND_IO; |
| 503 | } |
| 504 | if (resource->flags & IORESOURCE_PCI_BRIDGE) { |
| 505 | dev->command |= PCI_COMMAND_MASTER; |
| 506 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 507 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 508 | /* Get the base address. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 509 | base = resource->base; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 510 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 511 | /* Get the end. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 512 | end = resource_end(resource); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 513 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 514 | /* Now store the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 515 | resource->flags |= IORESOURCE_STORED; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 516 | |
| 517 | /* PCI Bridges have no enable bit. They are disabled if the base of |
| 518 | * the range is greater than the limit. If the size is zero, disable |
| 519 | * by setting the base = limit and end = limit - 2^gran. |
| 520 | */ |
| 521 | if (resource->size == 0 && (resource->flags & IORESOURCE_PCI_BRIDGE)) { |
| 522 | base = resource->limit; |
| 523 | end = resource->limit - (1 << resource->gran); |
| 524 | resource->base = base; |
| 525 | } |
| 526 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 527 | if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 528 | unsigned long base_lo, base_hi; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 529 | /* Some chipsets allow us to set/clear the I/O bit |
| 530 | * (e.g. VIA 82c686a). So set it to be safe. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 531 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 532 | base_lo = base & 0xffffffff; |
| 533 | base_hi = (base >> 32) & 0xffffffff; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 534 | if (resource->flags & IORESOURCE_IO) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 535 | base_lo |= PCI_BASE_ADDRESS_SPACE_IO; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 536 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 537 | pci_write_config32(dev, resource->index, base_lo); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 538 | if (resource->flags & IORESOURCE_PCI64) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 539 | pci_write_config32(dev, resource->index + 4, base_hi); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 540 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 541 | } else if (resource->index == PCI_IO_BASE) { |
| 542 | /* Set the I/O ranges. */ |
| 543 | pci_write_config8(dev, PCI_IO_BASE, base >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 544 | pci_write_config16(dev, PCI_IO_BASE_UPPER16, base >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 545 | pci_write_config8(dev, PCI_IO_LIMIT, end >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 546 | pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 547 | } else if (resource->index == PCI_MEMORY_BASE) { |
| 548 | /* Set the memory range. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 549 | pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 550 | pci_write_config16(dev, PCI_MEMORY_LIMIT, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 551 | } else if (resource->index == PCI_PREF_MEMORY_BASE) { |
| 552 | /* Set the prefetchable memory range. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 553 | pci_write_config16(dev, PCI_PREF_MEMORY_BASE, base >> 16); |
| 554 | pci_write_config32(dev, PCI_PREF_BASE_UPPER32, base >> 32); |
| 555 | pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, end >> 16); |
| 556 | pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, end >> 32); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 557 | } else { |
| 558 | /* Don't let me think I stored the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 559 | resource->flags &= ~IORESOURCE_STORED; |
Myles Watson | c4ddbff | 2009-02-09 17:52:54 +0000 | [diff] [blame] | 560 | printk_err("ERROR: invalid resource->index %lx\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 561 | resource->index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 562 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 563 | report_resource_stored(dev, resource, ""); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 564 | return; |
| 565 | } |
| 566 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 567 | void pci_dev_set_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 568 | { |
| 569 | struct resource *resource, *last; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 570 | unsigned link; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 571 | u8 line; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 572 | |
| 573 | last = &dev->resource[dev->resources]; |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 574 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 575 | for (resource = &dev->resource[0]; resource < last; resource++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 576 | pci_set_resource(dev, resource); |
| 577 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 578 | for (link = 0; link < dev->links; link++) { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 579 | struct bus *bus; |
| 580 | bus = &dev->link[link]; |
| 581 | if (bus->children) { |
| 582 | assign_resources(bus); |
| 583 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 584 | } |
| 585 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 586 | /* Set a default latency timer. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 587 | pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 588 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 589 | /* Set a default secondary latency timer. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 590 | if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) { |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 591 | pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 592 | } |
| 593 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 594 | /* Zero the IRQ settings. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 595 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 596 | if (line) { |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 597 | pci_write_config8(dev, PCI_INTERRUPT_LINE, 0); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 598 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 599 | /* Set the cache line size, so far 64 bytes is good for everyone. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 600 | pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 601 | } |
| 602 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 603 | void pci_dev_enable_resources(struct device *dev) |
| 604 | { |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 605 | const struct pci_operations *ops; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 606 | u16 command; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 607 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 608 | /* Set the subsystem vendor and device id for mainboard devices. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 609 | ops = ops_pci(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 610 | if (dev->on_mainboard && ops && ops->set_subsystem) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 611 | printk_debug("%s subsystem <- %02x/%02x\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 612 | dev_path(dev), |
| 613 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, |
| 614 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 615 | ops->set_subsystem(dev, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 616 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, |
| 617 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 618 | } |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 619 | command = pci_read_config16(dev, PCI_COMMAND); |
| 620 | command |= dev->command; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 621 | /* v3 has |
| 622 | * command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check. |
| 623 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 624 | printk_debug("%s cmd <- %02x\n", dev_path(dev), command); |
| 625 | pci_write_config16(dev, PCI_COMMAND, command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 626 | } |
| 627 | |
| 628 | void pci_bus_enable_resources(struct device *dev) |
| 629 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 630 | u16 ctrl; |
| 631 | |
| 632 | /* Enable I/O in command register if there is VGA card |
| 633 | * connected with (even it does not claim I/O resource). |
| 634 | */ |
Li-Ta Lo | 515f6c7 | 2005-01-11 22:48:54 +0000 | [diff] [blame] | 635 | if (dev->link[0].bridge_ctrl & PCI_BRIDGE_CTL_VGA) |
| 636 | dev->command |= PCI_COMMAND_IO; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 637 | ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); |
| 638 | ctrl |= dev->link[0].bridge_ctrl; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 639 | ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* Error check. */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 640 | printk_debug("%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); |
| 641 | pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); |
| 642 | |
| 643 | pci_dev_enable_resources(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 644 | enable_childrens_resources(dev); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 645 | } |
| 646 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 647 | void pci_bus_reset(struct bus *bus) |
| 648 | { |
| 649 | unsigned ctl; |
| 650 | ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 651 | ctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 652 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 653 | mdelay(10); |
| 654 | ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 655 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 656 | delay(1); |
| 657 | } |
| 658 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 659 | void pci_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 660 | { |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 661 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 662 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 663 | } |
| 664 | |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 665 | /** default handler: only runs the relevant pci bios. */ |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 666 | void pci_dev_init(struct device *dev) |
| 667 | { |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 668 | #if CONFIG_PCI_ROM_RUN == 1 || CONFIG_VGA_ROM_RUN == 1 |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 669 | void run_bios(struct device *dev, unsigned long addr); |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 670 | struct rom_header *rom, *ram; |
| 671 | |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 672 | #if CONFIG_PCI_ROM_RUN != 1 |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 673 | /* We want to execute VGA option ROMs when CONFIG_VGA_ROM_RUN |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 674 | * is set but CONFIG_PCI_ROM_RUN is not. In this case we skip |
| 675 | * all other option ROM types. |
| 676 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 677 | if ((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 678 | return; |
| 679 | #endif |
| 680 | |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 681 | rom = pci_rom_probe(dev); |
| 682 | if (rom == NULL) |
| 683 | return; |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 684 | |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 685 | ram = pci_rom_load(dev, rom); |
Yinghai Lu | 9e4faef | 2005-01-14 22:04:49 +0000 | [diff] [blame] | 686 | if (ram == NULL) |
| 687 | return; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 688 | |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 689 | run_bios(dev, (unsigned long)ram); |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 690 | |
| 691 | #if CONFIG_CONSOLE_VGA == 1 |
Luc Verhaegen | 5c5beb7 | 2009-05-29 03:04:16 +0000 | [diff] [blame] | 692 | if ((dev->class>>8) == PCI_CLASS_DISPLAY_VGA) |
Luc Verhaegen | 43bc5a9c | 2009-05-29 03:44:47 +0000 | [diff] [blame] | 693 | vga_console_init(); |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 694 | #endif /* CONFIG_CONSOLE_VGA */ |
| 695 | #endif /* CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 696 | } |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 697 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 698 | /** Default device operation for PCI devices */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 699 | static struct pci_operations pci_dev_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 700 | .set_subsystem = pci_dev_set_subsystem, |
| 701 | }; |
| 702 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 703 | struct device_operations default_pci_ops_dev = { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 704 | .read_resources = pci_dev_read_resources, |
| 705 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 706 | .enable_resources = pci_dev_enable_resources, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 707 | .init = pci_dev_init, |
| 708 | .scan_bus = 0, |
| 709 | .enable = 0, |
| 710 | .ops_pci = &pci_dev_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 711 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 712 | |
| 713 | /** Default device operations for PCI bridges */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 714 | static struct pci_operations pci_bus_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 715 | .set_subsystem = 0, |
| 716 | }; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 717 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 718 | struct device_operations default_pci_ops_bus = { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 719 | .read_resources = pci_bus_read_resources, |
| 720 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 721 | .enable_resources = pci_bus_enable_resources, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 722 | .init = 0, |
| 723 | .scan_bus = pci_scan_bridge, |
| 724 | .enable = 0, |
| 725 | .reset_bus = pci_bus_reset, |
| 726 | .ops_pci = &pci_bus_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 727 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 728 | |
| 729 | /** |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 730 | * @brief Detect the type of downstream bridge |
| 731 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 732 | * This function is a heuristic to detect which type of bus is downstream |
| 733 | * of a PCI-to-PCI bridge. This functions by looking for various capability |
| 734 | * blocks to figure out the type of downstream bridge. PCI-X, PCI-E, and |
| 735 | * Hypertransport all seem to have appropriate capabilities. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 736 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 737 | * When only a PCI-Express capability is found the type |
| 738 | * is examined to see which type of bridge we have. |
| 739 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 740 | * @param dev Pointer to the device structure of the bridge. |
| 741 | * @return Appropriate bridge operations. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 742 | */ |
| 743 | static struct device_operations *get_pci_bridge_ops(device_t dev) |
| 744 | { |
| 745 | unsigned pos; |
| 746 | |
| 747 | #if CONFIG_PCIX_PLUGIN_SUPPORT == 1 |
| 748 | pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); |
| 749 | if (pos) { |
Myles Watson | 0b028a4 | 2009-08-21 14:59:14 +0000 | [diff] [blame] | 750 | printk_debug("%s subordinate bus PCI-X\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 751 | return &default_pcix_ops_bus; |
| 752 | } |
| 753 | #endif |
| 754 | #if CONFIG_AGP_PLUGIN_SUPPORT == 1 |
| 755 | /* How do I detect an PCI to AGP bridge? */ |
| 756 | #endif |
| 757 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT == 1 |
| 758 | pos = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 759 | while ((pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos))) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 760 | unsigned flags; |
| 761 | flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS); |
| 762 | if ((flags >> 13) == 1) { |
| 763 | /* Host or Secondary Interface */ |
Myles Watson | 0b028a4 | 2009-08-21 14:59:14 +0000 | [diff] [blame] | 764 | printk_debug("%s subordinate bus Hypertransport\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 765 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 766 | return &default_ht_ops_bus; |
| 767 | } |
| 768 | } |
| 769 | #endif |
| 770 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT == 1 |
| 771 | pos = pci_find_capability(dev, PCI_CAP_ID_PCIE); |
| 772 | if (pos) { |
| 773 | unsigned flags; |
| 774 | flags = pci_read_config16(dev, pos + PCI_EXP_FLAGS); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 775 | switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 776 | case PCI_EXP_TYPE_ROOT_PORT: |
| 777 | case PCI_EXP_TYPE_UPSTREAM: |
| 778 | case PCI_EXP_TYPE_DOWNSTREAM: |
Myles Watson | 0b028a4 | 2009-08-21 14:59:14 +0000 | [diff] [blame] | 779 | printk_debug("%s subordinate bus PCI Express\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 780 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 781 | return &default_pciexp_ops_bus; |
| 782 | case PCI_EXP_TYPE_PCI_BRIDGE: |
Myles Watson | 0b028a4 | 2009-08-21 14:59:14 +0000 | [diff] [blame] | 783 | printk_debug("%s subordinate PCI\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 784 | return &default_pci_ops_bus; |
| 785 | default: |
| 786 | break; |
| 787 | } |
| 788 | } |
| 789 | #endif |
| 790 | return &default_pci_ops_bus; |
| 791 | } |
| 792 | |
| 793 | /** |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 794 | * Set up PCI device operation. Check if it already has a driver. If not, use |
| 795 | * find_device_operations, or set to a default based on type. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 796 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 797 | * @param dev Pointer to the device whose pci_ops you want to set. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 798 | * @see pci_drivers |
| 799 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 800 | static void set_pci_ops(struct device *dev) |
| 801 | { |
| 802 | struct pci_driver *driver; |
| 803 | if (dev->ops) { |
| 804 | return; |
| 805 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 806 | |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 807 | /* Look through the list of setup drivers and find one for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 808 | * this PCI device. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 809 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 810 | for (driver = &pci_drivers[0]; driver != &epci_drivers[0]; driver++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 811 | if ((driver->vendor == dev->vendor) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 812 | (driver->device == dev->device)) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 813 | dev->ops = driver->ops; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 814 | printk_spew("%s [%04x/%04x] %sops\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 815 | dev_path(dev), |
| 816 | driver->vendor, driver->device, |
| 817 | (driver->ops->scan_bus ? "bus " : "")); |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 818 | return; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 819 | } |
| 820 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 821 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 822 | /* If I don't have a specific driver use the default operations */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 823 | switch (dev->hdr_type & 0x7f) { /* header type */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 824 | case PCI_HEADER_TYPE_NORMAL: /* standard header */ |
| 825 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) |
| 826 | goto bad; |
| 827 | dev->ops = &default_pci_ops_dev; |
| 828 | break; |
| 829 | case PCI_HEADER_TYPE_BRIDGE: |
| 830 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 831 | goto bad; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 832 | dev->ops = get_pci_bridge_ops(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 833 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 834 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT == 1 |
| 835 | case PCI_HEADER_TYPE_CARDBUS: |
| 836 | dev->ops = &default_cardbus_ops_bus; |
| 837 | break; |
| 838 | #endif |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 839 | default: |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 840 | bad: |
Li-Ta Lo | 69c5a90 | 2004-04-29 20:08:54 +0000 | [diff] [blame] | 841 | if (dev->enabled) { |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 842 | printk_err("%s [%04x/%04x/%06x] has unknown header " |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 843 | "type %02x, ignoring.\n", |
| 844 | dev_path(dev), |
| 845 | dev->vendor, dev->device, |
| 846 | dev->class >> 8, dev->hdr_type); |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 847 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 848 | } |
| 849 | return; |
| 850 | } |
| 851 | |
| 852 | /** |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 853 | * @brief See if we have already allocated a device structure for a given devfn. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 854 | * |
| 855 | * Given a linked list of PCI device structures and a devfn number, find the |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 856 | * device structure correspond to the devfn, if present. This function also |
| 857 | * removes the device structure from the linked list. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 858 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 859 | * @param list The device structure list. |
| 860 | * @param devfn A device/function number. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 861 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 862 | * @return Pointer to the device structure found or NULL if we have not |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 863 | * allocated a device for this devfn yet. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 864 | */ |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 865 | static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 866 | { |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 867 | struct device *dev; |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 868 | dev = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 869 | for (; *list; list = &(*list)->sibling) { |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 870 | if ((*list)->path.type != DEVICE_PATH_PCI) { |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 871 | printk_err("child %s not a pci device\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 872 | dev_path(*list)); |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 873 | continue; |
| 874 | } |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 875 | if ((*list)->path.pci.devfn == devfn) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 876 | /* Unlink from the list. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 877 | dev = *list; |
| 878 | *list = (*list)->sibling; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 879 | dev->sibling = NULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 880 | break; |
| 881 | } |
| 882 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 883 | |
| 884 | /* Just like alloc_dev() add the device to the list of devices on the |
| 885 | * bus. When the list of devices was formed we removed all of the |
| 886 | * parents children, and now we are interleaving static and dynamic |
| 887 | * devices in order on the bus. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 888 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 889 | if (dev) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 890 | struct device *child; |
| 891 | /* Find the last child of our parent. */ |
| 892 | for (child = dev->bus->children; child && child->sibling;) { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 893 | child = child->sibling; |
| 894 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 895 | /* Place the device on the list of children of its parent. */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 896 | if (child) { |
| 897 | child->sibling = dev; |
| 898 | } else { |
| 899 | dev->bus->children = dev; |
| 900 | } |
| 901 | } |
| 902 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 903 | return dev; |
| 904 | } |
| 905 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 906 | /** |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 907 | * @brief Scan a PCI bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 908 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 909 | * Determine the existence of a given PCI device. Allocate a new struct device |
| 910 | * if dev==NULL was passed in and the device exists in hardware. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 911 | * |
| 912 | * @param bus pointer to the bus structure |
| 913 | * @param devfn to look at |
| 914 | * |
| 915 | * @return The device structure for hte device (if found) |
| 916 | * or the NULL if no device is found. |
| 917 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 918 | device_t pci_probe_dev(device_t dev, struct bus * bus, unsigned devfn) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 919 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 920 | u32 id, class; |
| 921 | u8 hdr_type; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 922 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 923 | /* Detect if a device is present. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 924 | if (!dev) { |
| 925 | struct device dummy; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 926 | dummy.bus = bus; |
| 927 | dummy.path.type = DEVICE_PATH_PCI; |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 928 | dummy.path.pci.devfn = devfn; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 929 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 930 | /* Have we found something? |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 931 | * Some broken boards return 0 if a slot is empty. |
| 932 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 933 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 934 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Stefan Reinauer | f657d75 | 2008-09-11 06:52:22 +0000 | [diff] [blame] | 935 | printk_spew("%s, bad id 0x%x\n", dev_path(&dummy), id); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 936 | return NULL; |
| 937 | } |
| 938 | dev = alloc_dev(bus, &dummy.path); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 939 | } else { |
| 940 | /* Enable/disable the device. Once we have found the device- |
| 941 | * specific operations this operations we will disable the |
| 942 | * device with those as well. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 943 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 944 | * This is geared toward devices that have subfunctions |
| 945 | * that do not show up by default. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 946 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 947 | * If a device is a stuff option on the motherboard |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 948 | * it may be absent and enable_dev() must cope. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 949 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 950 | /* Run the magic enable sequence for the device. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 951 | if (dev->chip_ops && dev->chip_ops->enable_dev) { |
| 952 | dev->chip_ops->enable_dev(dev); |
| 953 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 954 | /* Now read the vendor and device ID. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 955 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 956 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 957 | /* If the device does not have a PCI ID disable it. Possibly |
| 958 | * this is because we have already disabled the device. But |
| 959 | * this also handles optional devices that may not always |
| 960 | * show up. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 961 | */ |
| 962 | /* If the chain is fully enumerated quit */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 963 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 964 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 965 | if (dev->enabled) { |
| 966 | printk_info("Disabling static device: %s\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 967 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 968 | dev->enabled = 0; |
| 969 | } |
| 970 | return dev; |
| 971 | } |
| 972 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 973 | /* Read the rest of the PCI configuration information. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 974 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 975 | class = pci_read_config32(dev, PCI_CLASS_REVISION); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 976 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 977 | /* Store the interesting information in the device structure. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 978 | dev->vendor = id & 0xffff; |
| 979 | dev->device = (id >> 16) & 0xffff; |
| 980 | dev->hdr_type = hdr_type; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 981 | |
| 982 | /* Class code, the upper 3 bytes of PCI_CLASS_REVISION. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 983 | dev->class = class >> 8; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 984 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 985 | /* Architectural/System devices always need to be bus masters. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 986 | if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) { |
| 987 | dev->command |= PCI_COMMAND_MASTER; |
| 988 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 989 | /* Look at the vendor and device ID, or at least the header type and |
| 990 | * class and figure out which set of configuration methods to use. |
| 991 | * Unless we already have some PCI ops. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 992 | */ |
| 993 | set_pci_ops(dev); |
| 994 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 995 | /* Now run the magic enable/disable sequence for the device. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 996 | if (dev->ops && dev->ops->enable) { |
| 997 | dev->ops->enable(dev); |
| 998 | } |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 999 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1000 | /* Display the device. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1001 | printk_debug("%s [%04x/%04x] %s%s\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1002 | dev_path(dev), |
| 1003 | dev->vendor, dev->device, |
| 1004 | dev->enabled ? "enabled" : "disabled", |
| 1005 | dev->ops ? "" : " No operations"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1006 | |
| 1007 | return dev; |
| 1008 | } |
| 1009 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1010 | /** |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1011 | * @brief Scan a PCI bus. |
| 1012 | * |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1013 | * Determine the existence of devices and bridges on a PCI bus. If there are |
| 1014 | * bridges on the bus, recursively scan the buses behind the bridges. |
| 1015 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1016 | * This function is the default scan_bus() method for the root device |
| 1017 | * 'dev_root'. |
| 1018 | * |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1019 | * @param bus pointer to the bus structure |
| 1020 | * @param min_devfn minimum devfn to look at in the scan usually 0x00 |
| 1021 | * @param max_devfn maximum devfn to look at in the scan usually 0xff |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1022 | * @param max current bus number |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1023 | * |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1024 | * @return The maximum bus number found, after scanning all subordinate busses |
| 1025 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1026 | unsigned int pci_scan_bus(struct bus *bus, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1027 | unsigned min_devfn, unsigned max_devfn, |
| 1028 | unsigned int max) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1029 | { |
| 1030 | unsigned int devfn; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1031 | struct device *old_devices; |
| 1032 | struct device *child; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1033 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 1034 | #if CONFIG_PCI_BUS_SEGN_BITS |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1035 | printk_debug("PCI: pci_scan_bus for bus %04x:%02x\n", |
| 1036 | bus->secondary >> 8, bus->secondary & 0xff); |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 1037 | #else |
| 1038 | printk_debug("PCI: pci_scan_bus for bus %02x\n", bus->secondary); |
| 1039 | #endif |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1040 | |
| 1041 | old_devices = bus->children; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1042 | bus->children = NULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1043 | |
| 1044 | post_code(0x24); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1045 | /* Probe all devices/functions on this bus with some optimization for |
| 1046 | * non-existence and single function devices. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1047 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1048 | for (devfn = min_devfn; devfn <= max_devfn; devfn++) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1049 | struct device *dev; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1050 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1051 | /* First thing setup the device structure */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1052 | dev = pci_scan_get_dev(&old_devices, devfn); |
Li-Ta Lo | 9782f75 | 2004-05-05 21:15:42 +0000 | [diff] [blame] | 1053 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1054 | /* See if a device is present and setup the device structure. */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1055 | dev = pci_probe_dev(dev, bus, devfn); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1056 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1057 | /* If this is not a multi function device, or the device is |
| 1058 | * not present don't waste time probing another function. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1059 | * Skip to next device. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1060 | */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1061 | if ((PCI_FUNC(devfn) == 0x00) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1062 | (!dev |
| 1063 | || (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1064 | devfn += 0x07; |
| 1065 | } |
| 1066 | } |
| 1067 | post_code(0x25); |
| 1068 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1069 | /* Warn if any leftover static devices are are found. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1070 | * There's probably a problem in the Config.lb. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1071 | */ |
| 1072 | if (old_devices) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1073 | device_t left; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1074 | printk_warning("PCI: Left over static devices:\n"); |
| 1075 | for (left = old_devices; left; left = left->sibling) { |
| 1076 | printk_warning("%s\n", dev_path(left)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1077 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1078 | printk_warning("PCI: Check your mainboard Config.lb.\n"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1079 | } |
| 1080 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1081 | /* For all children that implement scan_bus() (i.e. bridges) |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1082 | * scan the bus behind that child. |
| 1083 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1084 | for (child = bus->children; child; child = child->sibling) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1085 | max = scan_bus(child, max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1086 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1087 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1088 | /* We've scanned the bus and so we know all about what's on the other |
| 1089 | * side of any bridges that may be on this bus plus any devices. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1090 | * Return how far we've got finding sub-buses. |
| 1091 | */ |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 1092 | printk_debug("PCI: pci_scan_bus returning with max=%03x\n", max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1093 | post_code(0x55); |
| 1094 | return max; |
| 1095 | } |
| 1096 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1097 | /** |
| 1098 | * @brief Scan a PCI bridge and the buses behind the bridge. |
| 1099 | * |
| 1100 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1101 | * according to the result of the scan. |
| 1102 | * |
| 1103 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1104 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1105 | * @param dev Pointer to the bridge device. |
| 1106 | * @param max The highest bus number assigned up to now. |
| 1107 | * @return The maximum bus number found, after scanning all subordinate buses. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1108 | */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1109 | unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1110 | unsigned int (*do_scan_bus) (struct bus * bus, |
| 1111 | unsigned min_devfn, |
| 1112 | unsigned max_devfn, |
| 1113 | unsigned int max)) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1114 | { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1115 | struct bus *bus; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1116 | u32 buses; |
| 1117 | u16 cr; |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 1118 | |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1119 | printk_spew("%s for %s\n", __func__, dev_path(dev)); |
| 1120 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1121 | bus = &dev->link[0]; |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 1122 | bus->dev = dev; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1123 | dev->links = 1; |
| 1124 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1125 | /* Set up the primary, secondary and subordinate bus numbers. We have |
| 1126 | * no idea how many buses are behind this bridge yet, so we set the |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1127 | * subordinate bus number to 0xff for the moment. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1128 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1129 | bus->secondary = ++max; |
| 1130 | bus->subordinate = 0xff; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1131 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1132 | /* Clear all status bits and turn off memory, I/O and master enables. */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1133 | cr = pci_read_config16(dev, PCI_COMMAND); |
| 1134 | pci_write_config16(dev, PCI_COMMAND, 0x0000); |
| 1135 | pci_write_config16(dev, PCI_STATUS, 0xffff); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1136 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1137 | /* Read the existing primary/secondary/subordinate bus |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1138 | * number configuration. |
| 1139 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1140 | buses = pci_read_config32(dev, PCI_PRIMARY_BUS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1141 | |
| 1142 | /* Configure the bus numbers for this bridge: the configuration |
| 1143 | * transactions will not be propagated by the bridge if it is not |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1144 | * correctly configured. |
| 1145 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1146 | buses &= 0xff000000; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1147 | buses |= (((unsigned int)(dev->bus->secondary) << 0) | |
| 1148 | ((unsigned int)(bus->secondary) << 8) | |
| 1149 | ((unsigned int)(bus->subordinate) << 16)); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1150 | pci_write_config32(dev, PCI_PRIMARY_BUS, buses); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1151 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1152 | /* Now we can scan all subordinate buses |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1153 | * i.e. the bus behind the bridge. |
| 1154 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1155 | max = do_scan_bus(bus, 0x00, 0xff, max); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1156 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1157 | /* We know the number of buses behind this bridge. Set the subordinate |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1158 | * bus number to its real value. |
| 1159 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1160 | bus->subordinate = max; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1161 | buses = (buses & 0xff00ffff) | ((unsigned int)(bus->subordinate) << 16); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1162 | pci_write_config32(dev, PCI_PRIMARY_BUS, buses); |
| 1163 | pci_write_config16(dev, PCI_COMMAND, cr); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1164 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1165 | printk_spew("%s returns max %d\n", __func__, max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1166 | return max; |
| 1167 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1168 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1169 | /** |
| 1170 | * @brief Scan a PCI bridge and the buses behind the bridge. |
| 1171 | * |
| 1172 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1173 | * according to the result of the scan. |
| 1174 | * |
| 1175 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1176 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1177 | * @param dev Pointer to the bridge device. |
| 1178 | * @param max The highest bus number assigned up to now. |
| 1179 | * @return The maximum bus number found, after scanning all subordinate buses. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1180 | */ |
| 1181 | unsigned int pci_scan_bridge(struct device *dev, unsigned int max) |
| 1182 | { |
| 1183 | return do_pci_scan_bridge(dev, max, pci_scan_bus); |
| 1184 | } |
| 1185 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1186 | /** |
| 1187 | * @brief Scan a PCI domain. |
| 1188 | * |
| 1189 | * This function is the default scan_bus() method for PCI domains. |
| 1190 | * |
| 1191 | * @param dev pointer to the domain |
| 1192 | * @param max the highest bus number assgined up to now |
| 1193 | * |
| 1194 | * @return The maximum bus number found, after scanning all subordinate busses |
| 1195 | */ |
| 1196 | unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) |
| 1197 | { |
| 1198 | max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); |
| 1199 | return max; |
| 1200 | } |
| 1201 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1202 | #if CONFIG_PC80_SYSTEM == 1 |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1203 | /** |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1204 | * |
| 1205 | * @brief Assign IRQ numbers |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1206 | * |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1207 | * This function assigns IRQs for all functions contained within the indicated |
| 1208 | * device address. If the device does not exist or does not require interrupts |
| 1209 | * then this function has no effect. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1210 | * |
| 1211 | * This function should be called for each PCI slot in your system. |
| 1212 | * |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1213 | * @param bus |
| 1214 | * @param slot |
| 1215 | * @param pIntAtoD is an array of IRQ #s that are assigned to PINTA through |
| 1216 | * PINTD of this slot. The particular irq #s that are passed in |
| 1217 | * depend on the routing inside your southbridge and on your |
| 1218 | * motherboard. |
| 1219 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1220 | void pci_assign_irqs(unsigned bus, unsigned slot, |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1221 | const unsigned char pIntAtoD[4]) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1222 | { |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1223 | unsigned int funct; |
| 1224 | device_t pdev; |
| 1225 | u8 line; |
| 1226 | u8 irq; |
| 1227 | u8 readback; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1228 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1229 | /* Each slot may contain up to eight functions */ |
| 1230 | for (funct = 0; funct < 8; funct++) { |
| 1231 | pdev = dev_find_slot(bus, (slot << 3) + funct); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1232 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1233 | if (!pdev) |
| 1234 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1235 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1236 | line = pci_read_config8(pdev, PCI_INTERRUPT_PIN); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1237 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1238 | // PCI spec says all values except 1..4 are reserved. |
| 1239 | if ((line < 1) || (line > 4)) |
| 1240 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1241 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1242 | irq = pIntAtoD[line - 1]; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1243 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1244 | printk_debug("Assigning IRQ %d to %d:%x.%d\n", |
| 1245 | irq, bus, slot, funct); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1246 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1247 | pci_write_config8(pdev, PCI_INTERRUPT_LINE, |
| 1248 | pIntAtoD[line - 1]); |
| 1249 | |
| 1250 | #ifdef PARANOID_IRQ_ASSIGNMENTS |
| 1251 | readback = pci_read_config8(pdev, PCI_INTERRUPT_LINE); |
| 1252 | printk_debug(" Readback = %d\n", readback); |
| 1253 | #endif |
| 1254 | |
| 1255 | // Change to level triggered |
| 1256 | i8259_configure_irq_trigger(pIntAtoD[line - 1], IRQ_LEVEL_TRIGGERED); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1257 | } |
| 1258 | } |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1259 | #endif |
| 1260 | |