blob: 803e628320234f645dbf62754ad091069d722be8 [file] [log] [blame]
Marc Jones24484842017-05-04 21:17:45 -06001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
Marc Jones24484842017-05-04 21:17:45 -060016#include <device/device.h>
17#include <device/pci.h>
18#include <device/pci_ids.h>
19#include <device/pci_ops.h>
20#include <device/smbus.h>
Marc Jones24484842017-05-04 21:17:45 -060021#include <cpu/x86/lapic.h>
22#include <arch/ioapic.h>
23#include <stdlib.h>
Marc Jonesdfeb1c42017-08-07 19:08:24 -060024#include <soc/southbridge.h>
Marc Jones24484842017-05-04 21:17:45 -060025#include <soc/smbus.h>
26
Marc Jones24484842017-05-04 21:17:45 -060027/*
Marc Jonesdfeb1c42017-08-07 19:08:24 -060028* The southbridge enables all USB controllers by default in SMBUS Control.
29* The southbridge enables SATA by default in SMBUS Control.
Marc Jones24484842017-05-04 21:17:45 -060030*/
31
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020032static void sm_init(struct device *dev)
Marc Jones24484842017-05-04 21:17:45 -060033{
34 setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS);
35}
36
Richard Spiegelb40e1932018-10-24 12:51:21 -070037static u32 get_sm_mmio(struct device *dev)
Marc Jones24484842017-05-04 21:17:45 -060038{
Marc Jones24484842017-05-04 21:17:45 -060039 struct resource *res;
40 struct bus *pbus;
41
Marc Jones24484842017-05-04 21:17:45 -060042 pbus = get_pbus_smbus(dev);
Marc Jones24484842017-05-04 21:17:45 -060043 res = find_resource(pbus->dev, 0x90);
Richard Spiegelb40e1932018-10-24 12:51:21 -070044 if (res->base == SMB_BASE_ADDR)
Marshall Dawson5de47712019-05-01 16:14:42 -060045 return ACPIMMIO_SMBUS_BASE;
Marc Jones24484842017-05-04 21:17:45 -060046
Marshall Dawson5de47712019-05-01 16:14:42 -060047 return ACPIMMIO_ASF_BASE;
Richard Spiegelb40e1932018-10-24 12:51:21 -070048}
49
50static int lsmbus_recv_byte(struct device *dev)
51{
52 u8 device;
53
54 device = dev->path.i2c.device;
55 return do_smbus_recv_byte(get_sm_mmio(dev), device);
Marc Jones24484842017-05-04 21:17:45 -060056}
57
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020058static int lsmbus_send_byte(struct device *dev, u8 val)
Marc Jones24484842017-05-04 21:17:45 -060059{
Richard Spiegelcd04e312017-11-08 14:58:30 -070060 u8 device;
Marc Jones24484842017-05-04 21:17:45 -060061
62 device = dev->path.i2c.device;
Richard Spiegelb40e1932018-10-24 12:51:21 -070063 return do_smbus_send_byte(get_sm_mmio(dev), device, val);
Marc Jones24484842017-05-04 21:17:45 -060064}
65
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020066static int lsmbus_read_byte(struct device *dev, u8 address)
Marc Jones24484842017-05-04 21:17:45 -060067{
Richard Spiegelcd04e312017-11-08 14:58:30 -070068 u8 device;
Marc Jones24484842017-05-04 21:17:45 -060069
70 device = dev->path.i2c.device;
Richard Spiegelb40e1932018-10-24 12:51:21 -070071 return do_smbus_read_byte(get_sm_mmio(dev), device, address);
Marc Jones24484842017-05-04 21:17:45 -060072}
73
Elyes HAOUAS777ccd42018-05-22 10:52:05 +020074static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
Marc Jones24484842017-05-04 21:17:45 -060075{
Richard Spiegelcd04e312017-11-08 14:58:30 -070076 u8 device;
Marc Jones24484842017-05-04 21:17:45 -060077
78 device = dev->path.i2c.device;
Richard Spiegelb40e1932018-10-24 12:51:21 -070079 return do_smbus_write_byte(get_sm_mmio(dev), device, address, val);
Marc Jones24484842017-05-04 21:17:45 -060080}
81static struct smbus_bus_operations lops_smbus_bus = {
82 .recv_byte = lsmbus_recv_byte,
83 .send_byte = lsmbus_send_byte,
84 .read_byte = lsmbus_read_byte,
85 .write_byte = lsmbus_write_byte,
86};
87
Marc Jones24484842017-05-04 21:17:45 -060088static struct pci_operations lops_pci = {
89 .set_subsystem = pci_dev_set_subsystem,
90};
91static struct device_operations smbus_ops = {
Richard Spiegelcd04e312017-11-08 14:58:30 -070092 .read_resources = DEVICE_NOOP,
93 .set_resources = DEVICE_NOOP,
Marc Jones24484842017-05-04 21:17:45 -060094 .enable_resources = pci_dev_enable_resources,
95 .init = sm_init,
96 .scan_bus = scan_smbus,
97 .ops_pci = &lops_pci,
98 .ops_smbus_bus = &lops_smbus_bus,
99};
100static const struct pci_driver smbus_driver __pci_driver = {
101 .ops = &smbus_ops,
102 .vendor = PCI_VENDOR_ID_AMD,
Martin Roth069ca662018-03-01 11:26:18 -0700103 .device = PCI_DEVICE_ID_AMD_CZ_SMBUS,
Marc Jones24484842017-05-04 21:17:45 -0600104};