Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the libpayload project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Patrick Georgi |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 5 | * Copyright (C) 2013 secunet Security Networks AG |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 6 | * |
| 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following conditions |
| 9 | * are met: |
| 10 | * 1. Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * 2. Redistributions in binary form must reproduce the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer in the |
| 14 | * documentation and/or other materials provided with the distribution. |
| 15 | * 3. The name of the author may not be used to endorse or promote products |
| 16 | * derived from this software without specific prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 24 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 25 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 26 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 27 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 28 | * SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 31 | //#define XHCI_SPEW_DEBUG |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 32 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 33 | #include <inttypes.h> |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 34 | #include <arch/virtual.h> |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 35 | #include "xhci_private.h" |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 36 | #include "xhci.h" |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 37 | |
| 38 | static void xhci_start (hci_t *controller); |
| 39 | static void xhci_stop (hci_t *controller); |
| 40 | static void xhci_reset (hci_t *controller); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 41 | static void xhci_reinit (hci_t *controller); |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 42 | static void xhci_shutdown (hci_t *controller); |
| 43 | static int xhci_bulk (endpoint_t *ep, int size, u8 *data, int finalize); |
| 44 | static int xhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, |
| 45 | int dalen, u8 *data); |
| 46 | static void* xhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming); |
| 47 | static void xhci_destroy_intr_queue (endpoint_t *ep, void *queue); |
| 48 | static u8* xhci_poll_intr_queue (void *queue); |
| 49 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 50 | /* |
| 51 | * Some structures must not cross page boundaries. To get this, |
| 52 | * we align them by their size (or the next greater power of 2). |
| 53 | */ |
| 54 | void * |
| 55 | xhci_align(const size_t min_align, const size_t size) |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 56 | { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 57 | size_t align; |
| 58 | if (!(size & (size - 1))) |
| 59 | align = size; /* It's a power of 2 */ |
| 60 | else |
| 61 | align = 1 << ((sizeof(unsigned) << 3) - __builtin_clz(size)); |
| 62 | if (align < min_align) |
| 63 | align = min_align; |
| 64 | xhci_spew("Aligning %zu to %zu\n", size, align); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 65 | return dma_memalign(align, size); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 66 | } |
| 67 | |
| 68 | void |
| 69 | xhci_clear_trb(trb_t *const trb, const int pcs) |
| 70 | { |
| 71 | trb->ptr_low = 0; |
| 72 | trb->ptr_high = 0; |
| 73 | trb->status = 0; |
| 74 | trb->control = !pcs; |
| 75 | } |
| 76 | |
| 77 | void |
| 78 | xhci_init_cycle_ring(transfer_ring_t *const tr, const size_t ring_size) |
| 79 | { |
| 80 | memset((void *)tr->ring, 0, ring_size * sizeof(*tr->ring)); |
| 81 | TRB_SET(TT, &tr->ring[ring_size - 1], TRB_LINK); |
| 82 | TRB_SET(TC, &tr->ring[ring_size - 1], 1); |
| 83 | /* only one segment that points to itself */ |
| 84 | tr->ring[ring_size - 1].ptr_low = virt_to_phys(tr->ring); |
| 85 | |
| 86 | tr->pcs = 1; |
| 87 | tr->cur = tr->ring; |
| 88 | } |
| 89 | |
| 90 | /* On Panther Point: switch ports shared with EHCI to xHCI */ |
Stefan Reinauer | 1b4d394 | 2015-06-29 15:47:34 -0700 | [diff] [blame] | 91 | #if IS_ENABLED(CONFIG_LP_USB_PCI) |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 92 | static void |
| 93 | xhci_switch_ppt_ports(pcidev_t addr) |
| 94 | { |
| 95 | if (pci_read_config32(addr, 0x00) == 0x1e318086) { |
| 96 | u32 reg32 = pci_read_config32(addr, 0xdc) & 0xf; |
| 97 | xhci_debug("Ports capable of SuperSpeed: 0x%"PRIx32"\n", reg32); |
| 98 | |
| 99 | /* For now, do not enable SuperSpeed on any ports */ |
| 100 | //pci_write_config32(addr, 0xd8, reg32); |
| 101 | pci_write_config32(addr, 0xd8, 0x00000000); |
| 102 | reg32 = pci_read_config32(addr, 0xd8) & 0xf; |
| 103 | xhci_debug("Configured for SuperSpeed: 0x%"PRIx32"\n", reg32); |
| 104 | |
| 105 | reg32 = pci_read_config32(addr, 0xd4) & 0xf; |
| 106 | xhci_debug("Trying to switch over: 0x%"PRIx32"\n", reg32); |
| 107 | |
| 108 | pci_write_config32(addr, 0xd0, reg32); |
| 109 | reg32 = pci_read_config32(addr, 0xd0) & 0xf; |
| 110 | xhci_debug("Actually switched over: 0x%"PRIx32"\n", reg32); |
| 111 | } |
| 112 | } |
Marc Jones | 86127c7 | 2014-12-29 22:07:04 -0700 | [diff] [blame] | 113 | #endif |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 114 | |
Stefan Reinauer | 1b4d394 | 2015-06-29 15:47:34 -0700 | [diff] [blame] | 115 | #if IS_ENABLED(CONFIG_LP_USB_PCI) |
Nico Huber | c371442 | 2013-07-19 14:03:47 +0200 | [diff] [blame] | 116 | /* On Panther Point: switch all ports back to EHCI */ |
| 117 | static void |
| 118 | xhci_switchback_ppt_ports(pcidev_t addr) |
| 119 | { |
| 120 | if (pci_read_config32(addr, 0x00) == 0x1e318086) { |
| 121 | u32 reg32 = pci_read_config32(addr, 0xd0) & 0xf; |
| 122 | xhci_debug("Switching ports back: 0x%"PRIx32"\n", reg32); |
| 123 | pci_write_config32(addr, 0xd0, 0x00000000); |
| 124 | reg32 = pci_read_config32(addr, 0xd0) & 0xf; |
| 125 | xhci_debug("Still switched to xHCI: 0x%"PRIx32"\n", reg32); |
| 126 | } |
| 127 | } |
Patrick Georgi | 2204539 | 2015-05-04 19:05:41 +0200 | [diff] [blame] | 128 | #endif |
Nico Huber | c371442 | 2013-07-19 14:03:47 +0200 | [diff] [blame] | 129 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 130 | static long |
| 131 | xhci_handshake(volatile u32 *const reg, u32 mask, u32 wait_for, long timeout_us) |
| 132 | { |
| 133 | while ((*reg & mask) != wait_for && timeout_us--) udelay(1); |
| 134 | return timeout_us; |
| 135 | } |
| 136 | |
| 137 | static int |
| 138 | xhci_wait_ready(xhci_t *const xhci) |
| 139 | { |
| 140 | xhci_debug("Waiting for controller to be ready... "); |
| 141 | if (!xhci_handshake(&xhci->opreg->usbsts, USBSTS_CNR, 0, 100000L)) { |
| 142 | usb_debug("timeout!\n"); |
| 143 | return -1; |
| 144 | } |
| 145 | usb_debug("ok.\n"); |
| 146 | return 0; |
| 147 | } |
| 148 | |
| 149 | hci_t * |
Nico Huber | 6e23066 | 2014-07-07 16:33:59 +0200 | [diff] [blame] | 150 | xhci_init (unsigned long physical_bar) |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 151 | { |
| 152 | int i; |
| 153 | |
| 154 | /* First, allocate and initialize static controller structures */ |
| 155 | |
| 156 | hci_t *const controller = new_controller(); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 157 | controller->type = XHCI; |
| 158 | controller->start = xhci_start; |
| 159 | controller->stop = xhci_stop; |
| 160 | controller->reset = xhci_reset; |
| 161 | controller->init = xhci_reinit; |
| 162 | controller->shutdown = xhci_shutdown; |
| 163 | controller->bulk = xhci_bulk; |
| 164 | controller->control = xhci_control; |
| 165 | controller->set_address = xhci_set_address; |
| 166 | controller->finish_device_config= xhci_finish_device_config; |
| 167 | controller->destroy_device = xhci_destroy_dev; |
| 168 | controller->create_intr_queue = xhci_create_intr_queue; |
| 169 | controller->destroy_intr_queue = xhci_destroy_intr_queue; |
| 170 | controller->poll_intr_queue = xhci_poll_intr_queue; |
Nico Huber | 8b8e963 | 2014-07-07 17:20:53 +0200 | [diff] [blame] | 171 | controller->pcidev = 0; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 172 | |
Furquan Shaikh | 79a591f | 2014-05-13 13:47:32 -0700 | [diff] [blame] | 173 | controller->reg_base = (uintptr_t)physical_bar; |
Julius Werner | 7234d60 | 2014-04-08 12:54:25 -0700 | [diff] [blame] | 174 | controller->instance = xzalloc(sizeof(xhci_t)); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 175 | xhci_t *const xhci = (xhci_t *)controller->instance; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 176 | |
| 177 | init_device_entry(controller, 0); |
| 178 | xhci->roothub = controller->devices[0]; |
| 179 | xhci->cr.ring = xhci_align(64, COMMAND_RING_SIZE * sizeof(trb_t)); |
| 180 | xhci->er.ring = xhci_align(64, EVENT_RING_SIZE * sizeof(trb_t)); |
| 181 | xhci->ev_ring_table = xhci_align(64, sizeof(erst_entry_t)); |
| 182 | if (!xhci->roothub || !xhci->cr.ring || |
| 183 | !xhci->er.ring || !xhci->ev_ring_table) { |
| 184 | xhci_debug("Out of memory\n"); |
| 185 | goto _free_xhci; |
| 186 | } |
| 187 | |
Nico Huber | 5b9e6f1 | 2014-07-10 12:56:34 +0200 | [diff] [blame] | 188 | xhci->capreg = phys_to_virt(physical_bar); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 189 | xhci->opreg = ((void *)xhci->capreg) + xhci->capreg->caplength; |
| 190 | xhci->hcrreg = ((void *)xhci->capreg) + xhci->capreg->rtsoff; |
| 191 | xhci->dbreg = ((void *)xhci->capreg) + xhci->capreg->dboff; |
Nico Huber | 5b9e6f1 | 2014-07-10 12:56:34 +0200 | [diff] [blame] | 192 | xhci_debug("regbase: 0x%"PRIx32"\n", physical_bar); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 193 | xhci_debug("caplen: 0x%"PRIx32"\n", xhci->capreg->caplength); |
| 194 | xhci_debug("rtsoff: 0x%"PRIx32"\n", xhci->capreg->rtsoff); |
| 195 | xhci_debug("dboff: 0x%"PRIx32"\n", xhci->capreg->dboff); |
| 196 | |
| 197 | xhci_debug("hciversion: %"PRIx8".%"PRIx8"\n", |
| 198 | xhci->capreg->hciver_hi, xhci->capreg->hciver_lo); |
| 199 | if ((xhci->capreg->hciversion < 0x96) || |
| 200 | (xhci->capreg->hciversion > 0x100)) { |
| 201 | xhci_debug("Unsupported xHCI version\n"); |
| 202 | goto _free_xhci; |
| 203 | } |
| 204 | |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 205 | xhci_debug("context size: %dB\n", CTXSIZE(xhci)); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 206 | xhci_debug("maxslots: 0x%02lx\n", xhci->capreg->MaxSlots); |
| 207 | xhci_debug("maxports: 0x%02lx\n", xhci->capreg->MaxPorts); |
| 208 | const unsigned pagesize = xhci->opreg->pagesize << 12; |
| 209 | xhci_debug("pagesize: 0x%04x\n", pagesize); |
| 210 | |
| 211 | /* |
| 212 | * We haven't touched the hardware yet. So we allocate all dynamic |
| 213 | * structures at first and can still chicken out easily if we run out |
| 214 | * of memory. |
| 215 | */ |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 216 | xhci->max_slots_en = xhci->capreg->MaxSlots & CONFIG_LP_MASK_MaxSlotsEn; |
| 217 | xhci->dcbaa = xhci_align(64, (xhci->max_slots_en + 1) * sizeof(u64)); |
| 218 | xhci->dev = malloc((xhci->max_slots_en + 1) * sizeof(*xhci->dev)); |
| 219 | if (!xhci->dcbaa || !xhci->dev) { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 220 | xhci_debug("Out of memory\n"); |
| 221 | goto _free_xhci; |
| 222 | } |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 223 | memset(xhci->dcbaa, 0x00, (xhci->max_slots_en + 1) * sizeof(u64)); |
| 224 | memset(xhci->dev, 0x00, (xhci->max_slots_en + 1) * sizeof(*xhci->dev)); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 225 | |
| 226 | /* |
| 227 | * Let dcbaa[0] point to another array of pointers, sp_ptrs. |
| 228 | * The pointers therein point to scratchpad buffers (pages). |
| 229 | */ |
Julius Werner | 57ddd9a | 2015-08-07 13:14:20 -0700 | [diff] [blame] | 230 | const size_t max_sp_bufs = xhci->capreg->Max_Scratchpad_Bufs_Hi << 5 | |
| 231 | xhci->capreg->Max_Scratchpad_Bufs_Lo; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 232 | xhci_debug("max scratchpad bufs: 0x%zx\n", max_sp_bufs); |
| 233 | if (max_sp_bufs) { |
| 234 | const size_t sp_ptrs_size = max_sp_bufs * sizeof(u64); |
| 235 | xhci->sp_ptrs = xhci_align(64, sp_ptrs_size); |
| 236 | if (!xhci->sp_ptrs) { |
| 237 | xhci_debug("Out of memory\n"); |
| 238 | goto _free_xhci_structs; |
| 239 | } |
| 240 | memset(xhci->sp_ptrs, 0x00, sp_ptrs_size); |
| 241 | for (i = 0; i < max_sp_bufs; ++i) { |
| 242 | /* Could use mmap() here if we had it. |
| 243 | Maybe there is another way. */ |
| 244 | void *const page = memalign(pagesize, pagesize); |
| 245 | if (!page) { |
| 246 | xhci_debug("Out of memory\n"); |
| 247 | goto _free_xhci_structs; |
| 248 | } |
| 249 | xhci->sp_ptrs[i] = virt_to_phys(page); |
| 250 | } |
| 251 | xhci->dcbaa[0] = virt_to_phys(xhci->sp_ptrs); |
| 252 | } |
| 253 | |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 254 | if (dma_initialized()) { |
| 255 | xhci->dma_buffer = dma_memalign(64 * 1024, DMA_SIZE); |
| 256 | if (!xhci->dma_buffer) { |
| 257 | xhci_debug("Not enough memory for DMA bounce buffer\n"); |
| 258 | goto _free_xhci_structs; |
| 259 | } |
| 260 | } |
| 261 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 262 | /* Now start working on the hardware */ |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 263 | if (xhci_wait_ready(xhci)) |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 264 | goto _free_xhci_structs; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 265 | |
| 266 | /* TODO: Check if BIOS claims ownership (and hand over) */ |
| 267 | |
| 268 | xhci_reset(controller); |
| 269 | xhci_reinit(controller); |
| 270 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 271 | xhci->roothub->controller = controller; |
| 272 | xhci->roothub->init = xhci_rh_init; |
| 273 | xhci->roothub->init(xhci->roothub); |
| 274 | |
| 275 | return controller; |
| 276 | |
| 277 | _free_xhci_structs: |
Julius Werner | 7234d60 | 2014-04-08 12:54:25 -0700 | [diff] [blame] | 278 | free(xhci->dma_buffer); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 279 | if (xhci->sp_ptrs) { |
| 280 | for (i = 0; i < max_sp_bufs; ++i) { |
| 281 | if (xhci->sp_ptrs[i]) |
| 282 | free(phys_to_virt(xhci->sp_ptrs[i])); |
| 283 | } |
| 284 | } |
| 285 | free(xhci->sp_ptrs); |
| 286 | free(xhci->dcbaa); |
| 287 | _free_xhci: |
| 288 | free((void *)xhci->ev_ring_table); |
| 289 | free((void *)xhci->er.ring); |
| 290 | free((void *)xhci->cr.ring); |
| 291 | free(xhci->roothub); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 292 | free(xhci->dev); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 293 | free(xhci); |
Marc Jones | 86127c7 | 2014-12-29 22:07:04 -0700 | [diff] [blame] | 294 | /* _free_controller: */ |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 295 | detach_controller(controller); |
| 296 | free(controller); |
| 297 | return NULL; |
| 298 | } |
| 299 | |
Stefan Reinauer | 1b4d394 | 2015-06-29 15:47:34 -0700 | [diff] [blame] | 300 | #if IS_ENABLED(CONFIG_LP_USB_PCI) |
Stefan Reinauer | 8992e53 | 2013-05-02 16:16:41 -0700 | [diff] [blame] | 301 | hci_t * |
| 302 | xhci_pci_init (pcidev_t addr) |
| 303 | { |
| 304 | u32 reg_addr; |
Patrick Georgi | fdb348a | 2013-12-21 11:41:22 +0100 | [diff] [blame] | 305 | hci_t *controller; |
Stefan Reinauer | 8992e53 | 2013-05-02 16:16:41 -0700 | [diff] [blame] | 306 | |
Nico Huber | 6a05890 | 2014-07-04 18:17:39 +0200 | [diff] [blame] | 307 | reg_addr = pci_read_config32 (addr, 0x10) & ~0xf; |
Stefan Reinauer | 8992e53 | 2013-05-02 16:16:41 -0700 | [diff] [blame] | 308 | if (pci_read_config32 (addr, 0x14) > 0) { |
| 309 | fatal("We don't do 64bit addressing.\n"); |
| 310 | } |
| 311 | |
Nico Huber | 6e23066 | 2014-07-07 16:33:59 +0200 | [diff] [blame] | 312 | controller = xhci_init((unsigned long)reg_addr); |
Nico Huber | f4316f8 | 2014-07-07 17:11:53 +0200 | [diff] [blame] | 313 | if (controller) { |
| 314 | controller->pcidev = addr; |
Stefan Reinauer | 8992e53 | 2013-05-02 16:16:41 -0700 | [diff] [blame] | 315 | |
Nico Huber | f4316f8 | 2014-07-07 17:11:53 +0200 | [diff] [blame] | 316 | xhci_switch_ppt_ports(addr); |
| 317 | } |
Stefan Reinauer | 8992e53 | 2013-05-02 16:16:41 -0700 | [diff] [blame] | 318 | |
| 319 | return controller; |
| 320 | } |
| 321 | #endif |
| 322 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 323 | static void |
| 324 | xhci_reset(hci_t *const controller) |
| 325 | { |
| 326 | xhci_t *const xhci = XHCI_INST(controller); |
| 327 | |
| 328 | xhci_stop(controller); |
| 329 | |
| 330 | xhci->opreg->usbcmd |= USBCMD_HCRST; |
Rajmohan Mani | 1528ffa | 2015-10-30 17:00:24 -0700 | [diff] [blame^] | 331 | |
| 332 | /* Existing Intel xHCI controllers require a delay of 1 ms, |
| 333 | * after setting the CMD_RESET bit, and before accessing any |
| 334 | * HC registers. This allows the HC to complete the |
| 335 | * reset operation and be ready for HC register access. |
| 336 | * Without this delay, the subsequent HC register access, |
| 337 | * may result in a system hang very rarely. |
| 338 | */ |
| 339 | if (IS_ENABLED(CONFIG_LP_ARCH_X86)) |
| 340 | mdelay(1); |
| 341 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 342 | xhci_debug("Resetting controller... "); |
| 343 | if (!xhci_handshake(&xhci->opreg->usbcmd, USBCMD_HCRST, 0, 1000000L)) |
| 344 | usb_debug("timeout!\n"); |
| 345 | else |
| 346 | usb_debug("ok.\n"); |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 347 | } |
| 348 | |
Nico Huber | 6e711c6 | 2012-11-12 16:20:32 +0100 | [diff] [blame] | 349 | static void |
| 350 | xhci_reinit (hci_t *controller) |
| 351 | { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 352 | xhci_t *const xhci = XHCI_INST(controller); |
Nico Huber | 6e711c6 | 2012-11-12 16:20:32 +0100 | [diff] [blame] | 353 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 354 | if (xhci_wait_ready(xhci)) |
| 355 | return; |
| 356 | |
| 357 | /* Enable all available slots */ |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 358 | xhci->opreg->config = xhci->max_slots_en; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 359 | |
| 360 | /* Set DCBAA */ |
| 361 | xhci->opreg->dcbaap_lo = virt_to_phys(xhci->dcbaa); |
| 362 | xhci->opreg->dcbaap_hi = 0; |
| 363 | |
| 364 | /* Initialize command ring */ |
| 365 | xhci_init_cycle_ring(&xhci->cr, COMMAND_RING_SIZE); |
| 366 | xhci_debug("command ring @%p (0x%08x)\n", |
| 367 | xhci->cr.ring, virt_to_phys(xhci->cr.ring)); |
| 368 | xhci->opreg->crcr_lo = virt_to_phys(xhci->cr.ring) | CRCR_RCS; |
| 369 | xhci->opreg->crcr_hi = 0; |
| 370 | |
| 371 | /* Make sure interrupts are disabled */ |
| 372 | xhci->opreg->usbcmd &= ~USBCMD_INTE; |
| 373 | |
| 374 | /* Initialize event ring */ |
| 375 | xhci_reset_event_ring(&xhci->er); |
| 376 | xhci_debug("event ring @%p (0x%08x)\n", |
| 377 | xhci->er.ring, virt_to_phys(xhci->er.ring)); |
| 378 | xhci_debug("ERST Max: 0x%lx -> 0x%lx entries\n", |
| 379 | xhci->capreg->ERST_Max, 1 << xhci->capreg->ERST_Max); |
| 380 | memset((void*)xhci->ev_ring_table, 0x00, sizeof(erst_entry_t)); |
| 381 | xhci->ev_ring_table[0].seg_base_lo = virt_to_phys(xhci->er.ring); |
| 382 | xhci->ev_ring_table[0].seg_base_hi = 0; |
| 383 | xhci->ev_ring_table[0].seg_size = EVENT_RING_SIZE; |
| 384 | |
Yidi Lin | d42ee15 | 2015-05-07 15:36:04 +0800 | [diff] [blame] | 385 | /* pass event ring table to hardware */ |
| 386 | wmb(); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 387 | /* Initialize primary interrupter */ |
| 388 | xhci->hcrreg->intrrs[0].erstsz = 1; |
| 389 | xhci_update_event_dq(xhci); |
| 390 | /* erstba has to be written at last */ |
| 391 | xhci->hcrreg->intrrs[0].erstba_lo = virt_to_phys(xhci->ev_ring_table); |
| 392 | xhci->hcrreg->intrrs[0].erstba_hi = 0; |
| 393 | |
| 394 | xhci_start(controller); |
| 395 | |
| 396 | #ifdef USB_DEBUG |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 397 | int i; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 398 | for (i = 0; i < 32; ++i) { |
| 399 | xhci_debug("NOOP run #%d\n", i); |
| 400 | trb_t *const cmd = xhci_next_command_trb(xhci); |
| 401 | TRB_SET(TT, cmd, TRB_CMD_NOOP); |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 402 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 403 | xhci_post_command(xhci); |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 404 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 405 | /* Wait for result in event ring */ |
| 406 | xhci_wait_for_command_done(xhci, cmd, 1); |
| 407 | xhci_debug("Command ring is %srunning\n", |
| 408 | (xhci->opreg->crcr_lo & CRCR_CRR) ? "" : "not "); |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 409 | } |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 410 | #endif |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 411 | } |
| 412 | |
| 413 | static void |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 414 | xhci_shutdown(hci_t *const controller) |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 415 | { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 416 | int i; |
| 417 | |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 418 | if (controller == 0) |
| 419 | return; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 420 | |
| 421 | detach_controller(controller); |
| 422 | |
Julius Werner | 7234d60 | 2014-04-08 12:54:25 -0700 | [diff] [blame] | 423 | xhci_t *const xhci = XHCI_INST(controller); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 424 | xhci_stop(controller); |
| 425 | |
Stefan Reinauer | 1b4d394 | 2015-06-29 15:47:34 -0700 | [diff] [blame] | 426 | #if IS_ENABLED(CONFIG_LP_USB_PCI) |
Patrick Georgi | fdb348a | 2013-12-21 11:41:22 +0100 | [diff] [blame] | 427 | if (controller->pcidev) |
| 428 | xhci_switchback_ppt_ports(controller->pcidev); |
Patrick Georgi | 2204539 | 2015-05-04 19:05:41 +0200 | [diff] [blame] | 429 | #endif |
Nico Huber | c371442 | 2013-07-19 14:03:47 +0200 | [diff] [blame] | 430 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 431 | if (xhci->sp_ptrs) { |
Julius Werner | 57ddd9a | 2015-08-07 13:14:20 -0700 | [diff] [blame] | 432 | size_t max_sp_bufs = xhci->capreg->Max_Scratchpad_Bufs_Hi << 5 | |
| 433 | xhci->capreg->Max_Scratchpad_Bufs_Lo; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 434 | for (i = 0; i < max_sp_bufs; ++i) { |
| 435 | if (xhci->sp_ptrs[i]) |
| 436 | free(phys_to_virt(xhci->sp_ptrs[i])); |
| 437 | } |
| 438 | } |
| 439 | free(xhci->sp_ptrs); |
Julius Werner | 7234d60 | 2014-04-08 12:54:25 -0700 | [diff] [blame] | 440 | free(xhci->dma_buffer); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 441 | free(xhci->dcbaa); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 442 | free(xhci->dev); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 443 | free((void *)xhci->ev_ring_table); |
| 444 | free((void *)xhci->er.ring); |
| 445 | free((void *)xhci->cr.ring); |
| 446 | free(xhci); |
| 447 | free(controller); |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 448 | } |
| 449 | |
| 450 | static void |
| 451 | xhci_start (hci_t *controller) |
| 452 | { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 453 | xhci_t *const xhci = XHCI_INST(controller); |
| 454 | |
| 455 | xhci->opreg->usbcmd |= USBCMD_RS; |
| 456 | if (!xhci_handshake(&xhci->opreg->usbsts, USBSTS_HCH, 0, 1000000L)) |
| 457 | xhci_debug("Controller didn't start within 1s\n"); |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 458 | } |
| 459 | |
| 460 | static void |
| 461 | xhci_stop (hci_t *controller) |
| 462 | { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 463 | xhci_t *const xhci = XHCI_INST(controller); |
| 464 | |
| 465 | xhci->opreg->usbcmd &= ~USBCMD_RS; |
| 466 | if (!xhci_handshake(&xhci->opreg->usbsts, |
| 467 | USBSTS_HCH, USBSTS_HCH, 1000000L)) |
| 468 | xhci_debug("Controller didn't halt within 1s\n"); |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 469 | } |
| 470 | |
| 471 | static int |
Shawn Nematbakhsh | c666e55 | 2014-04-02 09:14:32 -0700 | [diff] [blame] | 472 | xhci_reset_endpoint(usbdev_t *const dev, endpoint_t *const ep) |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 473 | { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 474 | xhci_t *const xhci = XHCI_INST(dev->controller); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 475 | const int slot_id = dev->address; |
| 476 | const int ep_id = ep ? xhci_ep_id(ep) : 1; |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 477 | epctx_t *const epctx = xhci->dev[slot_id].ctx.ep[ep_id]; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 478 | |
| 479 | xhci_debug("Resetting ID %d EP %d (ep state: %d)\n", |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 480 | slot_id, ep_id, EC_GET(STATE, epctx)); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 481 | |
| 482 | /* Run Reset Endpoint Command if the EP is in Halted state */ |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 483 | if (EC_GET(STATE, epctx) == 2) { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 484 | const int cc = xhci_cmd_reset_endpoint(xhci, slot_id, ep_id); |
| 485 | if (cc != CC_SUCCESS) { |
| 486 | xhci_debug("Reset Endpoint Command failed: %d\n", cc); |
| 487 | return 1; |
| 488 | } |
| 489 | } |
| 490 | |
| 491 | /* Clear TT buffer for bulk and control endpoints behind a TT */ |
| 492 | const int hub = dev->hub; |
| 493 | if (hub && dev->speed < HIGH_SPEED && |
| 494 | dev->controller->devices[hub]->speed == HIGH_SPEED) |
| 495 | /* TODO */; |
| 496 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 497 | /* Reset transfer ring if the endpoint is in the right state */ |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 498 | const unsigned ep_state = EC_GET(STATE, epctx); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 499 | if (ep_state == 3 || ep_state == 4) { |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 500 | transfer_ring_t *const tr = |
| 501 | xhci->dev[slot_id].transfer_rings[ep_id]; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 502 | const int cc = xhci_cmd_set_tr_dq(xhci, slot_id, ep_id, |
| 503 | tr->ring, 1); |
| 504 | if (cc != CC_SUCCESS) { |
| 505 | xhci_debug("Set TR Dequeue Command failed: %d\n", cc); |
| 506 | return 1; |
| 507 | } |
| 508 | xhci_init_cycle_ring(tr, TRANSFER_RING_SIZE); |
| 509 | } |
| 510 | |
| 511 | xhci_debug("Finished resetting ID %d EP %d (ep state: %d)\n", |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 512 | slot_id, ep_id, EC_GET(STATE, epctx)); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 513 | |
| 514 | return 0; |
| 515 | } |
| 516 | |
| 517 | static void |
| 518 | xhci_enqueue_trb(transfer_ring_t *const tr) |
| 519 | { |
| 520 | const int chain = TRB_GET(CH, tr->cur); |
| 521 | TRB_SET(C, tr->cur, tr->pcs); |
| 522 | ++tr->cur; |
| 523 | |
| 524 | while (TRB_GET(TT, tr->cur) == TRB_LINK) { |
| 525 | xhci_spew("Handling LINK pointer\n"); |
| 526 | const int tc = TRB_GET(TC, tr->cur); |
| 527 | TRB_SET(CH, tr->cur, chain); |
Yidi Lin | d42ee15 | 2015-05-07 15:36:04 +0800 | [diff] [blame] | 528 | wmb(); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 529 | TRB_SET(C, tr->cur, tr->pcs); |
| 530 | tr->cur = phys_to_virt(tr->cur->ptr_low); |
| 531 | if (tc) |
| 532 | tr->pcs ^= 1; |
| 533 | } |
| 534 | } |
| 535 | |
| 536 | static void |
| 537 | xhci_enqueue_td(transfer_ring_t *const tr, const int ep, const size_t mps, |
| 538 | const int dalen, void *const data, const int dir) |
| 539 | { |
| 540 | trb_t *trb = NULL; /* cur TRB */ |
| 541 | u8 *cur_start = data; /* cur data pointer */ |
| 542 | size_t length = dalen; /* remaining bytes */ |
| 543 | size_t packets = (length + mps - 1) / mps; /* remaining packets */ |
| 544 | size_t residue = 0; /* residue from last TRB */ |
| 545 | size_t trb_count = 0; /* TRBs added so far */ |
| 546 | |
| 547 | while (length || !trb_count /* enqueue at least one */) { |
| 548 | const size_t cur_end = ((size_t)cur_start + 0x10000) & ~0xffff; |
| 549 | size_t cur_length = cur_end - (size_t)cur_start; |
| 550 | if (length < cur_length) { |
| 551 | cur_length = length; |
| 552 | packets = 0; |
| 553 | length = 0; |
Chunfeng Yun | b4a2499 | 2015-08-04 14:33:58 +0800 | [diff] [blame] | 554 | } else if (!IS_ENABLED(CONFIG_LP_USB_XHCI_MTK_QUIRK)) { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 555 | packets -= (residue + cur_length) / mps; |
| 556 | residue = (residue + cur_length) % mps; |
| 557 | length -= cur_length; |
| 558 | } |
| 559 | |
| 560 | trb = tr->cur; |
| 561 | xhci_clear_trb(trb, tr->pcs); |
| 562 | trb->ptr_low = virt_to_phys(cur_start); |
| 563 | TRB_SET(TL, trb, cur_length); |
Rajmohan Mani | d6fb32b | 2014-05-30 13:06:01 -0700 | [diff] [blame] | 564 | TRB_SET(TDS, trb, MIN(TRB_MAX_TD_SIZE, packets)); |
Julius Werner | 83da501 | 2013-09-27 12:45:11 -0700 | [diff] [blame] | 565 | TRB_SET(CH, trb, 1); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 566 | |
Chunfeng Yun | b4a2499 | 2015-08-04 14:33:58 +0800 | [diff] [blame] | 567 | if (length && IS_ENABLED(CONFIG_LP_USB_XHCI_MTK_QUIRK)) { |
Yidi Lin | d42ee15 | 2015-05-07 15:36:04 +0800 | [diff] [blame] | 568 | /* |
| 569 | * For MTK's xHCI controller, TDS defines a number of |
| 570 | * packets that remain to be transferred for a TD after |
| 571 | * processing all Max packets in all previous TRBs, that |
| 572 | * means don't include the current TRB's. |
| 573 | */ |
| 574 | packets -= (residue + cur_length) / mps; |
| 575 | residue = (residue + cur_length) % mps; |
| 576 | length -= cur_length; |
| 577 | } |
| 578 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 579 | /* Check for first, data stage TRB */ |
| 580 | if (!trb_count && ep == 1) { |
| 581 | TRB_SET(DIR, trb, dir); |
| 582 | TRB_SET(TT, trb, TRB_DATA_STAGE); |
| 583 | } else { |
| 584 | TRB_SET(TT, trb, TRB_NORMAL); |
| 585 | } |
Sourabh Banerjee | e73335c | 2014-09-24 16:14:45 +0530 | [diff] [blame] | 586 | /* |
| 587 | * This is a workaround for Synopsys DWC3. If the ENT flag is |
| 588 | * not set for the Normal and Data Stage TRBs. We get Event TRB |
| 589 | * with length 0x20d from the controller when we enqueue a TRB |
| 590 | * for the IN endpoint with length 0x200. |
| 591 | */ |
| 592 | if (!length) |
| 593 | TRB_SET(ENT, trb, 1); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 594 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 595 | xhci_enqueue_trb(tr); |
| 596 | |
| 597 | cur_start += cur_length; |
| 598 | ++trb_count; |
| 599 | } |
Julius Werner | 83da501 | 2013-09-27 12:45:11 -0700 | [diff] [blame] | 600 | |
| 601 | trb = tr->cur; |
| 602 | xhci_clear_trb(trb, tr->pcs); |
| 603 | trb->ptr_low = virt_to_phys(trb); /* for easier debugging only */ |
| 604 | TRB_SET(TT, trb, TRB_EVENT_DATA); |
| 605 | TRB_SET(IOC, trb, 1); |
| 606 | |
| 607 | xhci_enqueue_trb(tr); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 608 | } |
| 609 | |
| 610 | static int |
| 611 | xhci_control(usbdev_t *const dev, const direction_t dir, |
| 612 | const int drlen, void *const devreq, |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 613 | const int dalen, unsigned char *const src) |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 614 | { |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 615 | unsigned char *data = src; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 616 | xhci_t *const xhci = XHCI_INST(dev->controller); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 617 | epctx_t *const epctx = xhci->dev[dev->address].ctx.ep0; |
| 618 | transfer_ring_t *const tr = xhci->dev[dev->address].transfer_rings[1]; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 619 | |
| 620 | const size_t off = (size_t)data & 0xffff; |
Julius Werner | 83da501 | 2013-09-27 12:45:11 -0700 | [diff] [blame] | 621 | if ((off + dalen) > ((TRANSFER_RING_SIZE - 4) << 16)) { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 622 | xhci_debug("Unsupported transfer size\n"); |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 623 | return -1; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 624 | } |
| 625 | |
Julius Werner | 49ba283 | 2013-09-26 15:13:44 -0700 | [diff] [blame] | 626 | /* Reset endpoint if it's not running */ |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 627 | const unsigned ep_state = EC_GET(STATE, epctx); |
Julius Werner | 49ba283 | 2013-09-26 15:13:44 -0700 | [diff] [blame] | 628 | if (ep_state > 1) { |
Shawn Nematbakhsh | c666e55 | 2014-04-02 09:14:32 -0700 | [diff] [blame] | 629 | if (xhci_reset_endpoint(dev, NULL)) |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 630 | return -1; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 631 | } |
| 632 | |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 633 | if (dalen && !dma_coherent(src)) { |
| 634 | data = xhci->dma_buffer; |
| 635 | if (dalen > DMA_SIZE) { |
| 636 | xhci_debug("Control transfer too large: %d\n", dalen); |
| 637 | return -1; |
| 638 | } |
| 639 | if (dir == OUT) |
| 640 | memcpy(data, src, dalen); |
| 641 | } |
| 642 | |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 643 | /* Fill and enqueue setup TRB */ |
| 644 | trb_t *const setup = tr->cur; |
| 645 | xhci_clear_trb(setup, tr->pcs); |
| 646 | setup->ptr_low = ((u32 *)devreq)[0]; |
| 647 | setup->ptr_high = ((u32 *)devreq)[1]; |
| 648 | TRB_SET(TL, setup, 8); |
| 649 | TRB_SET(TRT, setup, (dalen) |
| 650 | ? ((dir == OUT) ? TRB_TRT_OUT_DATA : TRB_TRT_IN_DATA) |
| 651 | : TRB_TRT_NO_DATA); |
| 652 | TRB_SET(TT, setup, TRB_SETUP_STAGE); |
| 653 | TRB_SET(IDT, setup, 1); |
| 654 | TRB_SET(IOC, setup, 1); |
| 655 | xhci_enqueue_trb(tr); |
| 656 | |
| 657 | /* Fill and enqueue data TRBs (if any) */ |
| 658 | if (dalen) { |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 659 | const unsigned mps = EC_GET(MPS, epctx); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 660 | const unsigned dt_dir = (dir == OUT) ? TRB_DIR_OUT : TRB_DIR_IN; |
| 661 | xhci_enqueue_td(tr, 1, mps, dalen, data, dt_dir); |
| 662 | } |
| 663 | |
| 664 | /* Fill status TRB */ |
| 665 | trb_t *const status = tr->cur; |
| 666 | xhci_clear_trb(status, tr->pcs); |
| 667 | TRB_SET(DIR, status, (dir == OUT) ? TRB_DIR_IN : TRB_DIR_OUT); |
| 668 | TRB_SET(TT, status, TRB_STATUS_STAGE); |
| 669 | TRB_SET(IOC, status, 1); |
| 670 | xhci_enqueue_trb(tr); |
| 671 | |
| 672 | /* Ring doorbell for EP0 */ |
| 673 | xhci->dbreg[dev->address] = 1; |
| 674 | |
| 675 | /* Wait for transfer events */ |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 676 | int i, transferred = 0; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 677 | const int n_stages = 2 + !!dalen; |
| 678 | for (i = 0; i < n_stages; ++i) { |
| 679 | const int ret = xhci_wait_for_transfer(xhci, dev->address, 1); |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 680 | transferred += ret; |
| 681 | if (ret < 0) { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 682 | if (ret == TIMEOUT) { |
| 683 | xhci_debug("Stopping ID %d EP 1\n", |
| 684 | dev->address); |
| 685 | xhci_cmd_stop_endpoint(xhci, dev->address, 1); |
| 686 | } |
| 687 | xhci_debug("Stage %d/%d failed: %d\n" |
| 688 | " trb ring: @%p\n" |
| 689 | " setup trb: @%p\n" |
| 690 | " status trb: @%p\n" |
| 691 | " ep state: %d -> %d\n" |
| 692 | " usbsts: 0x%08"PRIx32"\n", |
| 693 | i, n_stages, ret, |
| 694 | tr->ring, setup, status, |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 695 | ep_state, EC_GET(STATE, epctx), |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 696 | xhci->opreg->usbsts); |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 697 | return ret; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 698 | } |
| 699 | } |
| 700 | |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 701 | if (dir == IN && data != src) |
| 702 | memcpy(src, data, transferred); |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 703 | return transferred; |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 704 | } |
| 705 | |
| 706 | /* finalize == 1: if data is of packet aligned size, add a zero length packet */ |
| 707 | static int |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 708 | xhci_bulk(endpoint_t *const ep, const int size, u8 *const src, |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 709 | const int finalize) |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 710 | { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 711 | /* finalize: Hopefully the xHCI controller always does this. |
| 712 | We have no control over the packets. */ |
| 713 | |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 714 | u8 *data = src; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 715 | xhci_t *const xhci = XHCI_INST(ep->dev->controller); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 716 | const int slot_id = ep->dev->address; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 717 | const int ep_id = xhci_ep_id(ep); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 718 | epctx_t *const epctx = xhci->dev[slot_id].ctx.ep[ep_id]; |
| 719 | transfer_ring_t *const tr = xhci->dev[slot_id].transfer_rings[ep_id]; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 720 | |
| 721 | const size_t off = (size_t)data & 0xffff; |
Julius Werner | 83da501 | 2013-09-27 12:45:11 -0700 | [diff] [blame] | 722 | if ((off + size) > ((TRANSFER_RING_SIZE - 2) << 16)) { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 723 | xhci_debug("Unsupported transfer size\n"); |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 724 | return -1; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 725 | } |
| 726 | |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 727 | if (!dma_coherent(src)) { |
| 728 | data = xhci->dma_buffer; |
| 729 | if (size > DMA_SIZE) { |
| 730 | xhci_debug("Bulk transfer too large: %d\n", size); |
| 731 | return -1; |
| 732 | } |
| 733 | if (ep->direction == OUT) |
| 734 | memcpy(data, src, size); |
| 735 | } |
| 736 | |
Julius Werner | 49ba283 | 2013-09-26 15:13:44 -0700 | [diff] [blame] | 737 | /* Reset endpoint if it's not running */ |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 738 | const unsigned ep_state = EC_GET(STATE, epctx); |
Julius Werner | 49ba283 | 2013-09-26 15:13:44 -0700 | [diff] [blame] | 739 | if (ep_state > 1) { |
Shawn Nematbakhsh | c666e55 | 2014-04-02 09:14:32 -0700 | [diff] [blame] | 740 | if (xhci_reset_endpoint(ep->dev, ep)) |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 741 | return -1; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 742 | } |
| 743 | |
| 744 | /* Enqueue transfer and ring doorbell */ |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 745 | const unsigned mps = EC_GET(MPS, epctx); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 746 | const unsigned dir = (ep->direction == OUT) ? TRB_DIR_OUT : TRB_DIR_IN; |
| 747 | xhci_enqueue_td(tr, ep_id, mps, size, data, dir); |
| 748 | xhci->dbreg[ep->dev->address] = ep_id; |
| 749 | |
| 750 | /* Wait for transfer event */ |
| 751 | const int ret = xhci_wait_for_transfer(xhci, ep->dev->address, ep_id); |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 752 | if (ret < 0) { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 753 | if (ret == TIMEOUT) { |
| 754 | xhci_debug("Stopping ID %d EP %d\n", |
| 755 | ep->dev->address, ep_id); |
| 756 | xhci_cmd_stop_endpoint(xhci, ep->dev->address, ep_id); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 757 | } |
| 758 | xhci_debug("Bulk transfer failed: %d\n" |
| 759 | " ep state: %d -> %d\n" |
| 760 | " usbsts: 0x%08"PRIx32"\n", |
| 761 | ret, ep_state, |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 762 | EC_GET(STATE, epctx), |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 763 | xhci->opreg->usbsts); |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 764 | return ret; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 765 | } |
| 766 | |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 767 | if (ep->direction == IN && data != src) |
| 768 | memcpy(src, data, ret); |
Julius Werner | e9738db | 2013-02-21 13:41:40 -0800 | [diff] [blame] | 769 | return ret; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 770 | } |
| 771 | |
| 772 | static trb_t * |
| 773 | xhci_next_trb(trb_t *cur, int *const pcs) |
| 774 | { |
| 775 | ++cur; |
| 776 | while (TRB_GET(TT, cur) == TRB_LINK) { |
| 777 | if (pcs && TRB_GET(TC, cur)) |
| 778 | *pcs ^= 1; |
| 779 | cur = phys_to_virt(cur->ptr_low); |
| 780 | } |
| 781 | return cur; |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 782 | } |
| 783 | |
| 784 | /* create and hook-up an intr queue into device schedule */ |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 785 | static void * |
| 786 | xhci_create_intr_queue(endpoint_t *const ep, |
| 787 | const int reqsize, const int reqcount, |
| 788 | const int reqtiming) |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 789 | { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 790 | /* reqtiming: We ignore it and use the interval from the |
| 791 | endpoint descriptor configured earlier. */ |
| 792 | |
| 793 | xhci_t *const xhci = XHCI_INST(ep->dev->controller); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 794 | const int slot_id = ep->dev->address; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 795 | const int ep_id = xhci_ep_id(ep); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 796 | transfer_ring_t *const tr = xhci->dev[slot_id].transfer_rings[ep_id]; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 797 | |
| 798 | if (reqcount > (TRANSFER_RING_SIZE - 2)) { |
| 799 | xhci_debug("reqcount is too high, at most %d supported\n", |
| 800 | TRANSFER_RING_SIZE - 2); |
| 801 | return NULL; |
| 802 | } |
| 803 | if (reqsize > 0x10000) { |
| 804 | xhci_debug("reqsize is too large, at most 64KiB supported\n"); |
| 805 | return NULL; |
| 806 | } |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 807 | if (xhci->dev[slot_id].interrupt_queues[ep_id]) { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 808 | xhci_debug("Only one interrupt queue per endpoint supported\n"); |
| 809 | return NULL; |
| 810 | } |
| 811 | |
| 812 | /* Allocate intrq structure and reqdata chunks */ |
| 813 | |
| 814 | intrq_t *const intrq = malloc(sizeof(*intrq)); |
| 815 | if (!intrq) { |
| 816 | xhci_debug("Out of memory\n"); |
| 817 | return NULL; |
| 818 | } |
| 819 | |
| 820 | int i; |
| 821 | int pcs = tr->pcs; |
| 822 | trb_t *cur = tr->cur; |
| 823 | for (i = 0; i < reqcount; ++i) { |
| 824 | if (TRB_GET(C, cur) == pcs) { |
| 825 | xhci_debug("Not enough empty TRBs\n"); |
| 826 | goto _free_return; |
| 827 | } |
| 828 | void *const reqdata = xhci_align(1, reqsize); |
| 829 | if (!reqdata) { |
| 830 | xhci_debug("Out of memory\n"); |
| 831 | goto _free_return; |
| 832 | } |
| 833 | xhci_clear_trb(cur, pcs); |
| 834 | cur->ptr_low = virt_to_phys(reqdata); |
| 835 | cur->ptr_high = 0; |
| 836 | TRB_SET(TL, cur, reqsize); |
| 837 | TRB_SET(TT, cur, TRB_NORMAL); |
| 838 | TRB_SET(ISP, cur, 1); |
| 839 | TRB_SET(IOC, cur, 1); |
| 840 | |
| 841 | cur = xhci_next_trb(cur, &pcs); |
| 842 | } |
| 843 | |
| 844 | intrq->size = reqsize; |
| 845 | intrq->count = reqcount; |
| 846 | intrq->next = tr->cur; |
| 847 | intrq->ready = NULL; |
| 848 | intrq->ep = ep; |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 849 | xhci->dev[slot_id].interrupt_queues[ep_id] = intrq; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 850 | |
| 851 | /* Now enqueue all the prepared TRBs but the last |
| 852 | and ring the doorbell. */ |
| 853 | for (i = 0; i < (reqcount - 1); ++i) |
| 854 | xhci_enqueue_trb(tr); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 855 | xhci->dbreg[slot_id] = ep_id; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 856 | |
| 857 | return intrq; |
| 858 | |
| 859 | _free_return: |
| 860 | cur = tr->cur; |
| 861 | for (--i; i >= 0; --i) { |
| 862 | free(phys_to_virt(cur->ptr_low)); |
| 863 | cur = xhci_next_trb(cur, NULL); |
| 864 | } |
| 865 | free(intrq); |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 866 | return NULL; |
| 867 | } |
| 868 | |
| 869 | /* remove queue from device schedule, dropping all data that came in */ |
| 870 | static void |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 871 | xhci_destroy_intr_queue(endpoint_t *const ep, void *const q) |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 872 | { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 873 | xhci_t *const xhci = XHCI_INST(ep->dev->controller); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 874 | const int slot_id = ep->dev->address; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 875 | const int ep_id = xhci_ep_id(ep); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 876 | transfer_ring_t *const tr = xhci->dev[slot_id].transfer_rings[ep_id]; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 877 | |
| 878 | intrq_t *const intrq = (intrq_t *)q; |
| 879 | |
| 880 | /* Make sure the endpoint is stopped */ |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 881 | if (EC_GET(STATE, xhci->dev[slot_id].ctx.ep[ep_id]) == 1) { |
| 882 | const int cc = xhci_cmd_stop_endpoint(xhci, slot_id, ep_id); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 883 | if (cc != CC_SUCCESS) |
| 884 | xhci_debug("Warning: Failed to stop endpoint\n"); |
| 885 | } |
| 886 | |
| 887 | /* Process all remaining transfer events */ |
| 888 | xhci_handle_events(xhci); |
| 889 | |
| 890 | /* Free all pending transfers and the interrupt queue structure */ |
| 891 | int i; |
| 892 | for (i = 0; i < intrq->count; ++i) { |
| 893 | free(phys_to_virt(intrq->next->ptr_low)); |
| 894 | intrq->next = xhci_next_trb(intrq->next, NULL); |
| 895 | } |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 896 | xhci->dev[slot_id].interrupt_queues[ep_id] = NULL; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 897 | free((void *)intrq); |
| 898 | |
| 899 | /* Reset the controller's dequeue pointer and reinitialize the ring */ |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 900 | xhci_cmd_set_tr_dq(xhci, slot_id, ep_id, tr->ring, 1); |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 901 | xhci_init_cycle_ring(tr, TRANSFER_RING_SIZE); |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 902 | } |
| 903 | |
| 904 | /* read one intr-packet from queue, if available. extend the queue for new input. |
| 905 | return NULL if nothing new available. |
| 906 | Recommended use: while (data=poll_intr_queue(q)) process(data); |
| 907 | */ |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 908 | static u8 * |
| 909 | xhci_poll_intr_queue(void *const q) |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 910 | { |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 911 | if (!q) |
| 912 | return NULL; |
| 913 | |
| 914 | intrq_t *const intrq = (intrq_t *)q; |
| 915 | endpoint_t *const ep = intrq->ep; |
| 916 | xhci_t *const xhci = XHCI_INST(ep->dev->controller); |
| 917 | |
| 918 | /* TODO: Reset interrupt queue if it gets halted? */ |
| 919 | |
| 920 | xhci_handle_events(xhci); |
| 921 | |
| 922 | u8 *reqdata = NULL; |
| 923 | while (!reqdata && intrq->ready) { |
| 924 | const int ep_id = xhci_ep_id(ep); |
Julius Werner | 1f86434 | 2013-09-03 17:15:31 -0700 | [diff] [blame] | 925 | transfer_ring_t *const tr = |
| 926 | xhci->dev[ep->dev->address].transfer_rings[ep_id]; |
Nico Huber | 9029265 | 2013-06-13 14:37:15 +0200 | [diff] [blame] | 927 | |
| 928 | /* Fetch the request's buffer */ |
| 929 | reqdata = phys_to_virt(intrq->next->ptr_low); |
| 930 | |
| 931 | /* Enqueue the last (spare) TRB and ring doorbell */ |
| 932 | xhci_enqueue_trb(tr); |
| 933 | xhci->dbreg[ep->dev->address] = ep_id; |
| 934 | |
| 935 | /* Reuse the current buffer for the next spare TRB */ |
| 936 | xhci_clear_trb(tr->cur, tr->pcs); |
| 937 | tr->cur->ptr_low = virt_to_phys(reqdata); |
| 938 | tr->cur->ptr_high = 0; |
| 939 | TRB_SET(TL, tr->cur, intrq->size); |
| 940 | TRB_SET(TT, tr->cur, TRB_NORMAL); |
| 941 | TRB_SET(ISP, tr->cur, 1); |
| 942 | TRB_SET(IOC, tr->cur, 1); |
| 943 | |
| 944 | /* Check if anything was transferred */ |
| 945 | const size_t read = TRB_GET(TL, intrq->next); |
| 946 | if (!read) |
| 947 | reqdata = NULL; |
| 948 | else if (read < intrq->size) |
| 949 | /* At least zero it, poll interface is rather limited */ |
| 950 | memset(reqdata + read, 0x00, intrq->size - read); |
| 951 | |
| 952 | /* Advance the interrupt queue */ |
| 953 | if (intrq->ready == intrq->next) |
| 954 | /* This was last TRB being ready */ |
| 955 | intrq->ready = NULL; |
| 956 | intrq->next = xhci_next_trb(intrq->next, NULL); |
| 957 | } |
| 958 | |
| 959 | return reqdata; |
Patrick Georgi | 6615ef3 | 2010-08-13 09:18:58 +0000 | [diff] [blame] | 960 | } |