commit 2204539329429b84b2d09d1f89908bd68b3ae18c
author Patrick Georgi <pgeorgi@chromium.org> Mon May 04 19:05:41 2015 +0200
committer Patrick Georgi <pgeorgi@google.com> Mon May 04 22:21:17 2015 +0200
tree d4007e0fb9654591b7086851ae81848810c57627
parent 2436bda11dbb5839325708e306fd0872a0f90674

libpayload: Guard PCI using code appropriately in XHCI driver

Make the XHCI driver compile on ARM again. The Panther Point
specific shutdown handler is certainly _not_ necessary there.

Change-Id: I470afd4d82d101902b119b3ead4381e2b36a94b0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10091
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

payloads/libpayload/drivers/usb/xhci.c

diff --git a/payloads/libpayload/drivers/usb/xhci.c b/payloads/libpayload/drivers/usb/xhci.c
index 7adb304..26dcdbe 100644
--- a/payloads/libpayload/drivers/usb/xhci.c
+++ b/payloads/libpayload/drivers/usb/xhci.c
@@ -112,6 +112,7 @@
 }
 #endif
 
+#ifdef CONFIG_LP_USB_PCI
 /* On Panther Point: switch all ports back to EHCI */
 static void
 xhci_switchback_ppt_ports(pcidev_t addr)
@@ -124,6 +125,7 @@
 		xhci_debug("Still switched to xHCI: 0x%"PRIx32"\n", reg32);
 	}
 }
+#endif
 
 static long
 xhci_handshake(volatile u32 *const reg, u32 mask, u32 wait_for, long timeout_us)
@@ -407,8 +409,10 @@
 	xhci_t *const xhci = XHCI_INST(controller);
 	xhci_stop(controller);
 
+#ifdef CONFIG_LP_USB_PCI
         if (controller->pcidev)
 		xhci_switchback_ppt_ports(controller->pcidev);
+#endif
 
 	if (xhci->sp_ptrs) {
 		const size_t max_sp_bufs = xhci->capreg->Max_Scratchpad_Bufs;