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review.coreboot.org / coreboot / 0e9a92545d0be44487f9bc5ad6ab26af5badf125 / . / src / Kconfig
blob: 273d770a5fdbe6c1cc08cc0bf36c25ffce4b968f [file] [log] [blame]
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]1##
2## This file is part of the coreboot repair project.
3##
4## Redistribution and use in source and binary forms, with or without
5## modification, are permitted provided that the following conditions
6## are met:
7## 1. Redistributions of source code must retain the above copyright
8## notice, this list of conditions and the following disclaimer.
9## 2. Redistributions in binary form must reproduce the above copyright
10## notice, this list of conditions and the following disclaimer in the
11## documentation and/or other materials provided with the distribution.
12## 3. The name of the author may not be used to endorse or promote products
13## derived from this software without specific prior written permission.
14##
15## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18## ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25## SUCH DAMAGE.
26##
27
28mainmenu "Coreboot Configuration"
29
Uwe Hermannc04be932009-10-05 13:55:28 +0000[diff] [blame]30menu "General setup"
31
32config LOCALVERSION
33 string "Local version - append to coreboot release"
34 help
35 Append an extra string to the end of the coreboot version.
36
37endmenu
38
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]39source src/mainboard/Kconfig
40source src/arch/i386/Kconfig
41source src/arch/ppc/Kconfig
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]42source src/northbridge/Kconfig
Myles Watson74fb8f22009-09-24 15:09:11 +0000[diff] [blame]43source src/devices/Kconfig
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]44source src/southbridge/Kconfig
45source src/superio/Kconfig
46source src/cpu/Kconfig
47
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]48config PCI_BUS_SEGN_BITS
Myles Watson74fb8f22009-09-24 15:09:11 +0000[diff] [blame]49 int
50 default 0
Patrick Georgi892b0912009-09-24 09:03:06 +0000[diff] [blame]51
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]52config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]53 hex
54 default 0
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]55
56config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]57 hex
58 default 0
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]59
60config CPU_ADDR_BITS
61 int
62 default 36
63
Patrick Georgi0e9a9252009-10-06 20:48:07 +0000[diff] [blame^]64config AGP_APERTURE_SIZE
65 hex
66 default 0
67
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]68config XIP_ROM_BASE
69 hex
70 default 0xfffe0000
71
72config XIP_ROM_SIZE
73 hex
74 default 0x20000
75
76config LB_CKS_RANGE_START
77 int
78 default 49
79
80config LB_CKS_RANGE_END
81 int
82 default 125
83
84config LB_CKS_LOC
85 int
86 default 126
87
88config LOGICAL_CPUS
Myles Watson45bb25f2009-09-22 18:49:08 +0000[diff] [blame]89 bool
90 default y
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]91
92config PCI_ROM_RUN
Patrick Georgi698c0e0e2009-08-25 17:38:24 +0000[diff] [blame]93 bool
94 default n
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]95
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]96config HEAP_SIZE
97 hex
98 default 0x2000
99
100config COREBOOT_V2
101 bool
102 default y
103
104config COREBOOT_V4
105 bool
106 default y
107
108config DEBUG
109 bool
110 default n
111
112config USE_PRINTK_IN_CAR
113 bool
114 default n
115
116config USE_OPTION_TABLE
117 bool
118 default n
119
120config MAX_CPUS
121 int
122 default 1
123
124config MMCONF_SUPPORT_DEFAULT
125 bool
126 default n
127
128config MMCONF_SUPPORT
129 bool
130 default n
131
132config LB_MEM_TOPK
133 int
134 default 2048
135
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]136config COMPRESSED_PAYLOAD_LZMA
137 bool
138 default y
139
140config COMPRESSED_PAYLOAD_NRV2B
141 bool
142 default n
143
144source src/console/Kconfig
145
146config HAVE_ACPI_RESUME
147 bool
148 default n
149
150config ACPI_SSDTX_NUM
151 int
152 default 0
153
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]154config HAVE_FALLBACK_BOOT
155 bool
156 default y
157
158config USE_FALLBACK_IMAGE
159 bool
160 default y
161
Patrick Georgi37ea3412009-10-03 21:04:13 +0000[diff] [blame]162config HAVE_FAILOVER_BOOT
163 bool
164 default n
165
166config USE_FAILOVER_IMAGE
167 bool
168 default n
169
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]170config HAVE_HARD_RESET
171 bool
Ronald G. Minnich1df483d2009-10-01 16:51:36 +0000[diff] [blame]172 default 0
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]173
174config HAVE_INIT_TIMER
175 bool
176 default n
177
178config HAVE_MAINBOARD_RESOURCES
179 bool
180 default n
181
182config HAVE_MOVNTI
183 bool
184 default y
185
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]186config HAVE_OPTION_TABLE
187 bool
188 default y
189
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]190config PIRQ_ROUTE
191 bool
192 default n
193
194config HAVE_SMI_HANDLER
195 bool
196 default n
197
198config PCI_IO_CFG_EXT
199 bool
200 default n
201
202config IOAPIC
203 bool
204 default n
205
Uwe Hermann70b0cf22009-10-04 17:15:39 +0000[diff] [blame]206config VIDEO_MB
207 int
208 default 0
209
Myles Watson45bb25f2009-09-22 18:49:08 +0000[diff] [blame]210config USE_WATCHDOG_ON_BOOT
211 bool
212 default n
213
214config VGA
215 bool
216 default n
217 help
218 Build board-specific VGA code.
219
220config GFXUMA
221 bool
222 default n
223 help
224 Enable Unified Memory Architecture for graphics.
225
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]226# TODO
227# menu "Drivers"
228#
229# endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]230
Myles Watson45bb25f2009-09-22 18:49:08 +0000[diff] [blame]231menu "Generated System Tables"
232
233config HAVE_LOW_TABLES
234 bool
235 default y
236
237config HAVE_HIGH_TABLES
238 bool "Write 'high' tables to avoid being overwritten in F segment"
239 default y
240
241config MULTIBOOT
242 bool "Add Multiboot tables (for grub2)"
243 default n
244
245config HAVE_ACPI_TABLES
246 bool "Generate ACPI tables"
247 default n
248
249config HAVE_MP_TABLE
250 bool "Generate an MP table"
251 default n
252
253config HAVE_PIRQ_TABLE
254 bool "Generate a PIRQ table"
255 default n
256
257endmenu
258
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]259menu "Payload"
260
261config COMPRESSED_PAYLOAD_LZMA
262 bool "Use LZMA compression for payloads"
263 default yes
264
265choice
266 prompt "Payload type"
267 default PAYLOAD_NONE
268
269config PAYLOAD_ELF
270 bool "An ELF executable payload file"
271 help
272 Select this option if you have a payload image (an ELF file)
273 which coreboot should run as soon as the basic hardware
274 initialization is completed.
275
276 You will be able to specify the location and file name of the
277 payload image later.
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]278config PAYLOAD_NONE
279 bool "No payload"
280 help
281 Select this option if you want to create an "empty" coreboot
282 ROM image for a certain mainboard, i.e. a coreboot ROM image
283 which does not yet contain a payload.
284
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]285 For such an image to be useful, you have to use the 'cbfs' tool
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]286 to add a payload to the ROM image later.
287
288endchoice
289
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]290config FALLBACK_PAYLOAD_FILE
Cristi Magherusanb5034d42009-08-17 14:47:32 +0000[diff] [blame]291 string "Payload path and filename"
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]292 depends on PAYLOAD_ELF
293 default "payload.elf"
294 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]295 The path and filename of the ELF executable file to use as payload.
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]296
Peter Stugea758ca22009-09-17 16:21:31 +0000[diff] [blame]297endmenu
298
299menu "VGA BIOS"
300
301config VGA_BIOS
302 bool "Add a VGA BIOS image"
303 help
304 Select this option if you have a VGA BIOS image that you would
305 like to add to your ROM.
306
307 You will be able to specify the location and file name of the
308 image later.
309
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000[diff] [blame]310config FALLBACK_VGA_BIOS_FILE
311 string "VGA BIOS path and filename"
312 depends on VGA_BIOS
313 default "vgabios.bin"
314 help
315 The path and filename of the file to use as VGA BIOS.
316
317config FALLBACK_VGA_BIOS_ID
318 string "VGA BIOS ID"
319 depends on VGA_BIOS
320 default "1106,3230"
321 help
Myles Watson28412f52009-09-17 16:54:46 +0000[diff] [blame]322 The ID that would associate your VGA BIOS to your video card.
323 (PCI VendorID, PCI Device ID)
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000[diff] [blame]324
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]325endmenu
326
327config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]328 bool "GDB debugging support"
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]329 default y
330 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]331 If enabled, you will be able to set breakpoints for gdb debugging.
332 See src/arch/i386/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]333