Angel Pons | c3f58f6 | 2020-04-05 15:46:41 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 2 | |
Kyösti Mälkki | d06f800 | 2021-01-27 20:25:51 +0200 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
| 4 | #include <acpi/acpigen.h> |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 5 | #include <device/device.h> |
| 6 | #include <device/pci.h> |
| 7 | #include <device/pci_ids.h> |
Elyes HAOUAS | eb7e166 | 2020-07-10 10:49:26 +0200 | [diff] [blame] | 8 | #include <stdint.h> |
Julius Werner | 18ea2d3 | 2014-10-07 16:42:17 -0700 | [diff] [blame] | 9 | #include <soc/iomap.h> |
| 10 | #include <soc/iosf.h> |
| 11 | #include <soc/pci_devs.h> |
| 12 | #include <soc/ramstage.h> |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 13 | |
Angel Pons | 26b49cc | 2020-07-07 17:17:51 +0200 | [diff] [blame] | 14 | /* |
| 15 | * Host Memory Map: |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 16 | * |
| 17 | * +--------------------------+ BMBOUND_HI |
| 18 | * | Usable DRAM | |
| 19 | * +--------------------------+ 4GiB |
| 20 | * | PCI Address Space | |
| 21 | * +--------------------------+ BMBOUND |
| 22 | * | TPM | |
| 23 | * +--------------------------+ IMR2 |
| 24 | * | TXE | |
| 25 | * +--------------------------+ IMR1 |
| 26 | * | iGD | |
| 27 | * +--------------------------+ |
| 28 | * | GTT | |
| 29 | * +--------------------------+ SMMRRH, IRM0 |
| 30 | * | TSEG | |
| 31 | * +--------------------------+ SMMRRL |
| 32 | * | Usable DRAM | |
| 33 | * +--------------------------+ 0 |
| 34 | * |
| 35 | * Note that there are really only a few regions that need to enumerated w.r.t. |
Martin Roth | 99a3bba | 2014-12-07 14:57:26 -0700 | [diff] [blame] | 36 | * coreboot's resource model: |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 37 | * |
| 38 | * +--------------------------+ BMBOUND_HI |
| 39 | * | Cacheable/Usable | |
| 40 | * +--------------------------+ 4GiB |
| 41 | * |
| 42 | * +--------------------------+ BMBOUND |
| 43 | * | Uncacheable/Reserved | |
| 44 | * +--------------------------+ SMMRRH |
| 45 | * | Cacheable/Reserved | |
| 46 | * +--------------------------+ SMMRRL |
| 47 | * | Cacheable/Usable | |
| 48 | * +--------------------------+ 0 |
| 49 | */ |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 50 | |
Duncan Laurie | 1f52f51 | 2013-11-04 17:02:45 -0800 | [diff] [blame] | 51 | uint32_t nc_read_top_of_low_memory(void) |
| 52 | { |
Kyösti Mälkki | fcbbb91 | 2020-04-20 10:21:39 +0300 | [diff] [blame] | 53 | static uint32_t tolm; |
Matt DeVillier | f05d2e1 | 2017-06-06 23:56:18 -0500 | [diff] [blame] | 54 | |
| 55 | if (tolm) |
| 56 | return tolm; |
| 57 | |
| 58 | tolm = iosf_bunit_read(BUNIT_BMBOUND) & ~((1 << 27) - 1); |
| 59 | |
| 60 | return tolm; |
Duncan Laurie | 1f52f51 | 2013-11-04 17:02:45 -0800 | [diff] [blame] | 61 | } |
| 62 | |
Elyes HAOUAS | 17a3ceb | 2018-05-22 10:42:28 +0200 | [diff] [blame] | 63 | static void nc_read_resources(struct device *dev) |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 64 | { |
Kyösti Mälkki | 5c3cbcd | 2021-06-25 13:02:55 +0300 | [diff] [blame] | 65 | uint64_t mmconf; |
| 66 | uint64_t bmbound; |
| 67 | uint64_t bmbound_hi; |
| 68 | uint64_t smmrrh; |
| 69 | uint64_t smmrrl; |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 70 | int index = 0; |
| 71 | |
| 72 | /* Read standard PCI resources. */ |
| 73 | pci_dev_read_resources(dev); |
| 74 | |
| 75 | /* PCIe memory-mapped config space access - 256 MiB. */ |
| 76 | mmconf = iosf_bunit_read(BUNIT_MMCONF_REG) & ~((1 << 28) - 1); |
Kyösti Mälkki | 5a55a45 | 2021-06-24 20:49:05 +0300 | [diff] [blame] | 77 | mmio_range(dev, BUNIT_MMCONF_REG, mmconf, CONFIG_ECAM_MMCONF_BUS_NUMBER * MiB); |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 78 | |
Kein Yuan | 3511023 | 2014-02-22 12:26:55 -0800 | [diff] [blame] | 79 | /* 0 -> 0xa0000 */ |
Kyösti Mälkki | 5c3cbcd | 2021-06-25 13:02:55 +0300 | [diff] [blame] | 80 | ram_from_to(dev, index++, 0, 0xa0000); |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 81 | |
| 82 | /* The SMMRR registers are 1MiB granularity with smmrrh being |
| 83 | * inclusive of the SMM region. */ |
Kyösti Mälkki | 5c3cbcd | 2021-06-25 13:02:55 +0300 | [diff] [blame] | 84 | smmrrl = (iosf_bunit_read(BUNIT_SMRRL) & 0xffff) * MiB; |
| 85 | smmrrh = ((iosf_bunit_read(BUNIT_SMRRH) & 0xffff) + 1) * MiB; |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 86 | |
| 87 | /* 0xc0000 -> smrrl - cacheable and usable */ |
Kyösti Mälkki | 5c3cbcd | 2021-06-25 13:02:55 +0300 | [diff] [blame] | 88 | ram_from_to(dev, index++, 0xc0000, smmrrl); |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 89 | |
| 90 | if (smmrrh > smmrrl) |
Kyösti Mälkki | 5c3cbcd | 2021-06-25 13:02:55 +0300 | [diff] [blame] | 91 | reserved_ram_from_to(dev, index++, smmrrl, smmrrh); |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 92 | |
| 93 | /* All address space between bmbound and smmrrh is unusable. */ |
Kyösti Mälkki | 5c3cbcd | 2021-06-25 13:02:55 +0300 | [diff] [blame] | 94 | bmbound = nc_read_top_of_low_memory(); |
| 95 | mmio_from_to(dev, index++, smmrrh, bmbound); |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 96 | |
Angel Pons | bdd3d5f | 2020-07-26 22:41:43 +0200 | [diff] [blame] | 97 | /* |
| 98 | * The BMBOUND_HI register matches register bits of 31:24 with address |
| 99 | * bits of 35:28. Therefore, shift register to align properly. |
| 100 | */ |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 101 | bmbound_hi = iosf_bunit_read(BUNIT_BMBOUND_HI) & ~((1 << 24) - 1); |
Kyösti Mälkki | 5c3cbcd | 2021-06-25 13:02:55 +0300 | [diff] [blame] | 102 | bmbound_hi <<= 4; |
Kyösti Mälkki | 0a18d64 | 2021-06-28 21:43:31 +0300 | [diff] [blame] | 103 | upper_ram_end(dev, index++, bmbound_hi); |
Duncan Laurie | e7e78d6 | 2013-11-03 19:38:12 -0800 | [diff] [blame] | 104 | |
Angel Pons | bdd3d5f | 2020-07-26 22:41:43 +0200 | [diff] [blame] | 105 | /* |
| 106 | * Reserve everything between A segment and 1MB: |
Duncan Laurie | e7e78d6 | 2013-11-03 19:38:12 -0800 | [diff] [blame] | 107 | * |
| 108 | * 0xa0000 - 0xbffff: legacy VGA |
| 109 | * 0xc0000 - 0xfffff: RAM |
| 110 | */ |
Arthur Heymans | d821c72 | 2023-07-05 11:48:01 +0200 | [diff] [blame] | 111 | mmio_from_to(dev, index++, 0xa0000, 0xc0000); |
| 112 | reserved_ram_from_to(dev, index++, 0xc0000, 1 * MiB); |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 113 | } |
| 114 | |
Kyösti Mälkki | d06f800 | 2021-01-27 20:25:51 +0200 | [diff] [blame] | 115 | static void nc_generate_ssdt(const struct device *dev) |
| 116 | { |
| 117 | generate_cpu_entries(dev); |
| 118 | |
| 119 | acpigen_write_scope("\\"); |
| 120 | acpigen_write_name_dword("TOLM", nc_read_top_of_low_memory()); |
| 121 | acpigen_pop_len(); |
| 122 | } |
| 123 | |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 124 | static struct device_operations nc_ops = { |
| 125 | .read_resources = nc_read_resources, |
Kyösti Mälkki | d06f800 | 2021-01-27 20:25:51 +0200 | [diff] [blame] | 126 | .acpi_fill_ssdt = nc_generate_ssdt, |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 127 | .ops_pci = &soc_pci_ops, |
| 128 | }; |
| 129 | |
| 130 | static const struct pci_driver nc_driver __pci_driver = { |
| 131 | .ops = &nc_ops, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 132 | .vendor = PCI_VID_INTEL, |
Aaron Durbin | 191570d | 2013-09-24 12:41:08 -0500 | [diff] [blame] | 133 | .device = SOC_DEVID, |
| 134 | }; |