soc/intel/baytrail,braswell: Drop TOLM from GNVS
It's a static value that is neither referenced from SMI handler
nor needs to be updated on S3 resume path.
Change-Id: Ife6611a11e5627d39d59e0e93af9aa2d87885601
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50121
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index d221009..310ce4d 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -1,15 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <vendorcode/google/chromeos/chromeos.h>
-#include <acpi/acpi.h>
#include <stdint.h>
#include <soc/iomap.h>
#include <soc/iosf.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
+#include <vendorcode/google/chromeos/chromeos.h>
/*
* Host Memory Map:
@@ -123,9 +124,18 @@
chromeos_reserve_ram_oops(dev, index++);
}
+static void nc_generate_ssdt(const struct device *dev)
+{
+ generate_cpu_entries(dev);
+
+ acpigen_write_scope("\\");
+ acpigen_write_name_dword("TOLM", nc_read_top_of_low_memory());
+ acpigen_pop_len();
+}
+
static struct device_operations nc_ops = {
.read_resources = nc_read_resources,
- .acpi_fill_ssdt = generate_cpu_entries,
+ .acpi_fill_ssdt = nc_generate_ssdt,
.ops_pci = &soc_pci_ops,
};