soc/baytrail: fix ACPI table by recollecting TOLM
Adapted from Chromium commit 8fbe1e7 for soc/braswell
(also review.coreboot.org/#/c/20060/); same issue affects
baytrail as well.
This patch recollects TOLM accessing; as Aaron recalled some
core_msr_script turns off access to TOLM register, he suggests
to store tolm to avoid getting back a zero while setting acpi
nvs space.
Change-Id: Ib26d4fe229b3f7d8ee664f5d89774d1f4a997f51
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/20081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index 55ace59..c8ba9c1 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -20,7 +20,7 @@
#include <device/pci_ids.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <arch/acpi.h>
-
+#include <stddef.h>
#include <soc/iomap.h>
#include <soc/iosf.h>
#include <soc/pci_devs.h>
@@ -65,7 +65,14 @@
uint32_t nc_read_top_of_low_memory(void)
{
- return iosf_bunit_read(BUNIT_BMBOUND) & ~((1 << 27) - 1);
+ MAYBE_STATIC uint32_t tolm = 0;
+
+ if (tolm)
+ return tolm;
+
+ tolm = iosf_bunit_read(BUNIT_BMBOUND) & ~((1 << 27) - 1);
+
+ return tolm;
}
static void nc_read_resources(device_t dev)