Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 2 | |
| 3 | #include <arch/io.h> |
Kyösti Mälkki | b5d998b | 2017-08-20 21:36:08 +0300 | [diff] [blame] | 4 | #include <console/console.h> |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 5 | #include <device/smbus_def.h> |
Kyösti Mälkki | 1cae454 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 6 | #include <device/smbus_host.h> |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 7 | #include <types.h> |
| 8 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 9 | #if CONFIG(DEBUG_SMBUS) |
Kyösti Mälkki | b5d998b | 2017-08-20 21:36:08 +0300 | [diff] [blame] | 10 | #define dprintk(args...) printk(BIOS_DEBUG, ##args) |
| 11 | #else |
| 12 | #define dprintk(args...) do {} while (0) |
| 13 | #endif |
| 14 | |
Kyösti Mälkki | 7f40bd6 | 2020-01-06 19:00:31 +0200 | [diff] [blame] | 15 | /* SMBus register offsets. */ |
| 16 | #define SMBHSTSTAT 0x0 |
| 17 | #define SMBHSTCTL 0x2 |
| 18 | #define SMBHSTCMD 0x3 |
| 19 | #define SMBXMITADD 0x4 |
| 20 | #define SMBHSTDAT0 0x5 |
| 21 | #define SMBHSTDAT1 0x6 |
| 22 | #define SMBBLKDAT 0x7 |
| 23 | #define SMBTRNSADD 0x9 |
| 24 | #define SMBSLVDATA 0xa |
| 25 | #define SMLINK_PIN_CTL 0xe |
| 26 | #define SMBUS_PIN_CTL 0xf |
| 27 | #define SMBSLVCMD 0x11 |
| 28 | |
| 29 | #define SMB_RCV_SLVA SMBTRNSADD |
| 30 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 31 | /* I801 command constants */ |
| 32 | #define I801_QUICK (0 << 2) |
| 33 | #define I801_BYTE (1 << 2) |
| 34 | #define I801_BYTE_DATA (2 << 2) |
| 35 | #define I801_WORD_DATA (3 << 2) |
| 36 | #define I801_BLOCK_DATA (5 << 2) |
| 37 | #define I801_I2C_BLOCK_DATA (6 << 2) /* ICH5 and later */ |
| 38 | |
| 39 | /* I801 Host Control register bits */ |
| 40 | #define SMBHSTCNT_INTREN (1 << 0) |
| 41 | #define SMBHSTCNT_KILL (1 << 1) |
| 42 | #define SMBHSTCNT_LAST_BYTE (1 << 5) |
| 43 | #define SMBHSTCNT_START (1 << 6) |
| 44 | #define SMBHSTCNT_PEC_EN (1 << 7) /* ICH3 and later */ |
| 45 | |
| 46 | /* I801 Hosts Status register bits */ |
| 47 | #define SMBHSTSTS_BYTE_DONE (1 << 7) |
| 48 | #define SMBHSTSTS_INUSE_STS (1 << 6) |
| 49 | #define SMBHSTSTS_SMBALERT_STS (1 << 5) |
| 50 | #define SMBHSTSTS_FAILED (1 << 4) |
| 51 | #define SMBHSTSTS_BUS_ERR (1 << 3) |
| 52 | #define SMBHSTSTS_DEV_ERR (1 << 2) |
| 53 | #define SMBHSTSTS_INTR (1 << 1) |
| 54 | #define SMBHSTSTS_HOST_BUSY (1 << 0) |
| 55 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 56 | /* For SMBXMITADD register. */ |
| 57 | #define XMIT_WRITE(dev) (((dev) << 1) | 0) |
| 58 | #define XMIT_READ(dev) (((dev) << 1) | 1) |
| 59 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 60 | #define SMBUS_TIMEOUT (10 * 1000 * 100) |
Elyes HAOUAS | b0f1988 | 2018-06-09 11:59:00 +0200 | [diff] [blame] | 61 | #define SMBUS_BLOCK_MAXLEN 32 |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 62 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 63 | /* block_cmd_loop flags */ |
| 64 | #define BLOCK_READ 0 |
| 65 | #define BLOCK_WRITE (1 << 0) |
| 66 | #define BLOCK_I2C (1 << 1) |
| 67 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 68 | static void smbus_delay(void) |
| 69 | { |
| 70 | inb(0x80); |
| 71 | } |
| 72 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 73 | static void host_outb(uintptr_t base, u8 reg, u8 value) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 74 | { |
| 75 | outb(value, base + reg); |
| 76 | } |
| 77 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 78 | static u8 host_inb(uintptr_t base, u8 reg) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 79 | { |
| 80 | return inb(base + reg); |
| 81 | } |
| 82 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 83 | static void host_and_or(uintptr_t base, u8 reg, u8 mask, u8 or) |
Kyösti Mälkki | 65f5de2 | 2020-01-02 16:36:56 +0200 | [diff] [blame] | 84 | { |
| 85 | u8 value; |
| 86 | value = host_inb(base, reg); |
| 87 | value &= mask; |
| 88 | value |= or; |
| 89 | host_outb(base, reg, value); |
| 90 | } |
| 91 | |
Kyösti Mälkki | 7cdcc38 | 2020-01-06 19:00:31 +0200 | [diff] [blame] | 92 | void smbus_host_reset(uintptr_t base) |
| 93 | { |
| 94 | /* Disable interrupt generation. */ |
| 95 | host_outb(base, SMBHSTCTL, 0); |
| 96 | |
| 97 | /* Clear any lingering errors, so transactions can run. */ |
| 98 | host_and_or(base, SMBHSTSTAT, 0xff, 0); |
| 99 | } |
| 100 | |
Kyösti Mälkki | 73451fd | 2020-01-06 19:00:31 +0200 | [diff] [blame] | 101 | void smbus_set_slave_addr(uintptr_t base, u8 slave_address) |
| 102 | { |
| 103 | host_outb(base, SMB_RCV_SLVA, slave_address); |
| 104 | } |
| 105 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 106 | static int host_completed(u8 status) |
| 107 | { |
| 108 | if (status & SMBHSTSTS_HOST_BUSY) |
| 109 | return 0; |
Kyösti Mälkki | 44206e3 | 2019-02-26 17:17:24 +0200 | [diff] [blame] | 110 | |
| 111 | /* These status bits do not imply completion of transaction. */ |
| 112 | status &= ~(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INUSE_STS | |
| 113 | SMBHSTSTS_SMBALERT_STS); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 114 | return status != 0; |
| 115 | } |
| 116 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 117 | static int recover_master(uintptr_t base, int ret) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 118 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 119 | /* TODO: Depending of the failure, drive KILL transaction |
| 120 | * or force soft reset on SMBus master controller. |
| 121 | */ |
| 122 | printk(BIOS_ERR, "SMBus: Fatal master timeout (%d)\n", ret); |
| 123 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 124 | } |
| 125 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 126 | static int cb_err_from_stat(u8 status) |
| 127 | { |
Kyösti Mälkki | 44206e3 | 2019-02-26 17:17:24 +0200 | [diff] [blame] | 128 | /* These status bits do not imply errors. */ |
| 129 | status &= ~(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INUSE_STS | |
| 130 | SMBHSTSTS_SMBALERT_STS); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 131 | |
| 132 | if (status == SMBHSTSTS_INTR) |
| 133 | return 0; |
| 134 | |
| 135 | return SMBUS_ERROR; |
| 136 | } |
| 137 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 138 | static int setup_command(uintptr_t base, u8 ctrl, u8 xmitadd) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 139 | { |
| 140 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 141 | u8 host_busy; |
| 142 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 143 | do { |
| 144 | smbus_delay(); |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 145 | host_busy = host_inb(base, SMBHSTSTAT) & SMBHSTSTS_HOST_BUSY; |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 146 | } while (--loops && host_busy); |
| 147 | |
| 148 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 149 | return recover_master(base, SMBUS_WAIT_UNTIL_READY_TIMEOUT); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 150 | |
| 151 | /* Clear any lingering errors, so the transaction will run. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 152 | host_and_or(base, SMBHSTSTAT, 0xff, 0); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 153 | |
| 154 | /* Set up transaction */ |
| 155 | /* Disable interrupts */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 156 | host_outb(base, SMBHSTCTL, ctrl); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 157 | |
| 158 | /* Set the device I'm talking to. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 159 | host_outb(base, SMBXMITADD, xmitadd); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 160 | |
| 161 | return 0; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 162 | } |
| 163 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 164 | static int execute_command(uintptr_t base) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 165 | { |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 166 | unsigned int loops = SMBUS_TIMEOUT; |
| 167 | u8 status; |
| 168 | |
| 169 | /* Start the command. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 170 | host_and_or(base, SMBHSTCTL, 0xff, SMBHSTCNT_START); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 171 | |
| 172 | /* Poll for it to start. */ |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 173 | do { |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 174 | smbus_delay(); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 175 | |
| 176 | /* If we poll too slow, we could miss HOST_BUSY flag |
| 177 | * set and detect INTR or x_ERR flags instead here. |
| 178 | */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 179 | status = host_inb(base, SMBHSTSTAT); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 180 | status &= ~(SMBHSTSTS_SMBALERT_STS | SMBHSTSTS_INUSE_STS); |
| 181 | } while (--loops && status == 0); |
| 182 | |
| 183 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 184 | return recover_master(base, |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 185 | SMBUS_WAIT_UNTIL_ACTIVE_TIMEOUT); |
| 186 | |
| 187 | return 0; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 188 | } |
| 189 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 190 | static int complete_command(uintptr_t base) |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 191 | { |
| 192 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 193 | u8 status; |
| 194 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 195 | do { |
| 196 | smbus_delay(); |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 197 | status = host_inb(base, SMBHSTSTAT); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 198 | } while (--loops && !host_completed(status)); |
| 199 | |
| 200 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 201 | return recover_master(base, |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 202 | SMBUS_WAIT_UNTIL_DONE_TIMEOUT); |
| 203 | |
| 204 | return cb_err_from_stat(status); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 205 | } |
| 206 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 207 | static int smbus_read_cmd(uintptr_t base, u8 ctrl, u8 device, u8 address) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 208 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 209 | int ret; |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 210 | u16 word; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 211 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 212 | /* Set up for a byte data read. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 213 | ret = setup_command(base, ctrl, XMIT_READ(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 214 | if (ret < 0) |
| 215 | return ret; |
| 216 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 217 | /* Set the command/address... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 218 | host_outb(base, SMBHSTCMD, address); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 219 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 220 | /* Clear the data bytes... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 221 | host_outb(base, SMBHSTDAT0, 0); |
| 222 | host_outb(base, SMBHSTDAT1, 0); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 223 | |
| 224 | /* Start the command */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 225 | ret = execute_command(base); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 226 | if (ret < 0) |
| 227 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 228 | |
| 229 | /* Poll for transaction completion */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 230 | ret = complete_command(base); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 231 | if (ret < 0) |
| 232 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 233 | |
| 234 | /* Read results of transaction */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 235 | word = host_inb(base, SMBHSTDAT0); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 236 | if (ctrl == I801_WORD_DATA) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 237 | word |= host_inb(base, SMBHSTDAT1) << 8; |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 238 | |
| 239 | return word; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 240 | } |
| 241 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 242 | static int smbus_write_cmd(uintptr_t base, u8 ctrl, u8 device, u8 address, u16 data) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 243 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 244 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 245 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 246 | /* Set up for a byte data write. */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 247 | ret = setup_command(base, ctrl, XMIT_WRITE(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 248 | if (ret < 0) |
| 249 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 250 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 251 | /* Set the command/address... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 252 | host_outb(base, SMBHSTCMD, address); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 253 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 254 | /* Set the data bytes... */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 255 | host_outb(base, SMBHSTDAT0, data & 0xff); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 256 | if (ctrl == I801_WORD_DATA) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 257 | host_outb(base, SMBHSTDAT1, data >> 8); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 258 | |
| 259 | /* Start the command */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 260 | ret = execute_command(base); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 261 | if (ret < 0) |
| 262 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 263 | |
| 264 | /* Poll for transaction completion */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 265 | return complete_command(base); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 266 | } |
| 267 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 268 | static int block_cmd_loop(uintptr_t base, u8 *buf, size_t max_bytes, int flags) |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 269 | { |
| 270 | u8 status; |
| 271 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 272 | int ret; |
| 273 | size_t bytes = 0; |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 274 | int is_write_cmd = flags & BLOCK_WRITE; |
| 275 | int sw_drives_nak = flags & BLOCK_I2C; |
| 276 | |
| 277 | /* Hardware limitations. */ |
| 278 | if (flags == (BLOCK_WRITE | BLOCK_I2C)) |
| 279 | return SMBUS_ERROR; |
| 280 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 281 | /* Set number of bytes to transfer. */ |
| 282 | /* Reset number of bytes to transfer so we notice later it |
| 283 | * was really updated with the transaction. */ |
| 284 | if (!sw_drives_nak) { |
| 285 | if (is_write_cmd) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 286 | host_outb(base, SMBHSTDAT0, max_bytes); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 287 | else |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 288 | host_outb(base, SMBHSTDAT0, 0); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 289 | } |
| 290 | |
| 291 | /* Send first byte from buffer, bytes_sent increments after |
| 292 | * hardware acknowledges it. |
| 293 | */ |
| 294 | if (is_write_cmd) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 295 | host_outb(base, SMBBLKDAT, *buf++); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 296 | |
| 297 | /* Start the command */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 298 | ret = execute_command(base); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 299 | if (ret < 0) |
| 300 | return ret; |
| 301 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 302 | /* Poll for transaction completion */ |
| 303 | do { |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 304 | status = host_inb(base, SMBHSTSTAT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 305 | |
| 306 | if (status & SMBHSTSTS_BYTE_DONE) { /* Byte done */ |
| 307 | |
| 308 | if (is_write_cmd) { |
| 309 | bytes++; |
| 310 | if (bytes < max_bytes) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 311 | host_outb(base, SMBBLKDAT, *buf++); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 312 | } else { |
| 313 | if (bytes < max_bytes) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 314 | *buf++ = host_inb(base, SMBBLKDAT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 315 | bytes++; |
| 316 | |
| 317 | /* Indicate that next byte is the last one. */ |
| 318 | if (sw_drives_nak && (bytes + 1 >= max_bytes)) { |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 319 | host_and_or(base, SMBHSTCTL, 0xff, |
| 320 | SMBHSTCNT_LAST_BYTE); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 321 | } |
| 322 | |
| 323 | } |
| 324 | |
| 325 | /* Engine internally completes the transaction |
| 326 | * and clears HOST_BUSY flag once the byte count |
| 327 | * has been reached or LAST_BYTE was set. |
| 328 | */ |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 329 | host_outb(base, SMBHSTSTAT, SMBHSTSTS_BYTE_DONE); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 330 | } |
| 331 | |
| 332 | } while (--loops && !host_completed(status)); |
| 333 | |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 334 | dprintk("%s: status = %02x, len = %zd / %zd, loops = %d\n", |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 335 | __func__, status, bytes, max_bytes, SMBUS_TIMEOUT - loops); |
| 336 | |
| 337 | if (loops == 0) |
Kyösti Mälkki | 5e9ae0c | 2020-01-06 13:35:59 +0200 | [diff] [blame] | 338 | return recover_master(base, SMBUS_WAIT_UNTIL_DONE_TIMEOUT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 339 | |
| 340 | ret = cb_err_from_stat(status); |
| 341 | if (ret < 0) |
| 342 | return ret; |
| 343 | |
| 344 | return bytes; |
| 345 | } |
| 346 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 347 | int do_smbus_read_byte(uintptr_t base, u8 device, u8 address) |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 348 | { |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 349 | return smbus_read_cmd(base, I801_BYTE_DATA, device, address); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 350 | } |
| 351 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 352 | int do_smbus_read_word(uintptr_t base, u8 device, u8 address) |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 353 | { |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 354 | return smbus_read_cmd(base, I801_WORD_DATA, device, address); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 355 | } |
| 356 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 357 | int do_smbus_write_byte(uintptr_t base, u8 device, u8 address, u8 data) |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 358 | { |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 359 | return smbus_write_cmd(base, I801_BYTE_DATA, device, address, data); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 360 | } |
| 361 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 362 | int do_smbus_write_word(uintptr_t base, u8 device, u8 address, u16 data) |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 363 | { |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 364 | return smbus_write_cmd(base, I801_WORD_DATA, device, address, data); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 365 | } |
| 366 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 367 | int do_smbus_block_read(uintptr_t base, u8 device, u8 cmd, size_t max_bytes, u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 368 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 369 | int ret, slave_bytes; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 370 | |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 371 | max_bytes = MIN(SMBUS_BLOCK_MAXLEN, max_bytes); |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 372 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 373 | /* Set up for a block data read. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 374 | ret = setup_command(base, I801_BLOCK_DATA, XMIT_READ(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 375 | if (ret < 0) |
| 376 | return ret; |
| 377 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 378 | /* Set the command/address... */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 379 | host_outb(base, SMBHSTCMD, cmd); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 380 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 381 | /* Execute block transaction. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 382 | ret = block_cmd_loop(base, buf, max_bytes, BLOCK_READ); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 383 | if (ret < 0) |
| 384 | return ret; |
| 385 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 386 | /* Post-check we received complete message. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 387 | slave_bytes = host_inb(base, SMBHSTDAT0); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 388 | if (ret < slave_bytes) |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 389 | return SMBUS_ERROR; |
| 390 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 391 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 392 | } |
| 393 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 394 | int do_smbus_block_write(uintptr_t base, u8 device, u8 cmd, const size_t bytes, const u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 395 | { |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 396 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 397 | |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 398 | if (bytes > SMBUS_BLOCK_MAXLEN) |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 399 | return SMBUS_ERROR; |
| 400 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 401 | /* Set up for a block data write. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 402 | ret = setup_command(base, I801_BLOCK_DATA, XMIT_WRITE(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 403 | if (ret < 0) |
| 404 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 405 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 406 | /* Set the command/address... */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 407 | host_outb(base, SMBHSTCMD, cmd); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 408 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 409 | /* Execute block transaction. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 410 | ret = block_cmd_loop(base, (u8 *)buf, bytes, BLOCK_WRITE); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 411 | if (ret < 0) |
| 412 | return ret; |
| 413 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 414 | if (ret < bytes) |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 415 | return SMBUS_ERROR; |
| 416 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 417 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 418 | } |
| 419 | |
| 420 | /* Only since ICH5 */ |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 421 | static int has_i2c_read_command(void) |
| 422 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 423 | if (CONFIG(SOUTHBRIDGE_INTEL_I82371EB) || |
| 424 | CONFIG(SOUTHBRIDGE_INTEL_I82801DX)) |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 425 | return 0; |
| 426 | return 1; |
| 427 | } |
| 428 | |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 429 | int do_i2c_eeprom_read(uintptr_t base, u8 device, u8 offset, const size_t bytes, u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 430 | { |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 431 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 432 | |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 433 | if (!has_i2c_read_command()) |
| 434 | return SMBUS_ERROR; |
| 435 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 436 | /* Set up for a i2c block data read. |
| 437 | * |
| 438 | * FIXME: Address parameter changes to XMIT_READ(device) with |
| 439 | * some revision of PCH. Presumably hardware revisions that |
| 440 | * do not have i2c block write support internally set LSB. |
| 441 | */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 442 | ret = setup_command(base, I801_I2C_BLOCK_DATA, |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 443 | XMIT_WRITE(device)); |
| 444 | if (ret < 0) |
| 445 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 446 | |
| 447 | /* device offset */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 448 | host_outb(base, SMBHSTDAT1, offset); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 449 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 450 | /* Execute block transaction. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 451 | ret = block_cmd_loop(base, buf, bytes, BLOCK_READ | BLOCK_I2C); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 452 | if (ret < 0) |
| 453 | return ret; |
| 454 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 455 | /* Post-check we received complete message. */ |
| 456 | if (ret < bytes) |
Kyösti Mälkki | 1e39236 | 2017-08-20 21:36:03 +0300 | [diff] [blame] | 457 | return SMBUS_ERROR; |
| 458 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 459 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 460 | } |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 461 | |
| 462 | /* |
| 463 | * The caller is responsible of settings HOSTC I2C_EN bit prior to making this |
| 464 | * call! |
| 465 | */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 466 | int do_i2c_block_write(uintptr_t base, u8 device, size_t bytes, u8 *buf) |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 467 | { |
| 468 | u8 cmd; |
| 469 | int ret; |
| 470 | |
| 471 | if (!CONFIG(SOC_INTEL_BRASWELL)) |
| 472 | return SMBUS_ERROR; |
| 473 | |
| 474 | if (!bytes || (bytes > SMBUS_BLOCK_MAXLEN)) |
| 475 | return SMBUS_ERROR; |
| 476 | |
| 477 | /* Set up for a block data write. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 478 | ret = setup_command(base, I801_BLOCK_DATA, XMIT_WRITE(device)); |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 479 | if (ret < 0) |
| 480 | return ret; |
| 481 | |
| 482 | /* |
| 483 | * In i2c mode SMBus controller sequence on bus will be: |
| 484 | * <SMBXINTADD> <SMBHSTDAT1> <SMBBLKDAT> .. <SMBBLKDAT> |
| 485 | * The SMBHSTCMD must be written also to ensure the SMBUs controller |
| 486 | * will generate the i2c sequence. |
| 487 | */ |
| 488 | cmd = *buf++; |
| 489 | bytes--; |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 490 | host_outb(base, SMBHSTCMD, cmd); |
| 491 | host_outb(base, SMBHSTDAT1, cmd); |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 492 | |
| 493 | /* Execute block transaction. */ |
Kyösti Mälkki | c528426 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 494 | ret = block_cmd_loop(base, buf, bytes, BLOCK_WRITE); |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 495 | if (ret < 0) |
| 496 | return ret; |
| 497 | |
| 498 | if (ret < bytes) |
| 499 | return SMBUS_ERROR; |
| 500 | |
| 501 | ret++; /* 1st byte has been written using SMBHSTDAT1 */ |
| 502 | return ret; |
| 503 | } |