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review.coreboot.org / coreboot / refs/heads/main / src / northbridge / intel
  1. 27e085a nb/intel/sandybridge/raminit: move ram training into seperate function by Patrick Rudolph · 8 years ago
  2. 735ecce nb/intel/sandybridge/raminit: move dimm_info into ramctr_timing by Patrick Rudolph · 8 years ago
  3. 264bf0b cpu/x86/mtrr: move cache_ramstage() to its only user by Aaron Durbin · 8 years ago
  4. 2510e2a northbridge/intel/i3100: Unify UDELAY selection by Stefan Reinauer · 8 years ago
  5. e3fd63f northbridge/intel/i82810: Unify UDELAY selection by Stefan Reinauer · 8 years ago
  6. 63db614 northbridge/intel/i82830: Unify UDELAY selection by Stefan Reinauer · 8 years ago
  7. 92fc072 northbridge/intel: move mrccache.c of sandybridge + haswell to common by Alexander Couzens · 8 years ago
  8. 81c5c76 northbridge/intel: move mrc_cache definition into a common header by Alexander Couzens · 8 years ago
  9. f0ab23c nortbridge/sandybridge/mrccache: parse the return code of flash->write by Alexander Couzens · 8 years ago
  10. c7a1a3e northbridge/i945/gma: Re-enable NVRAM tft_brightness by Alexander Couzens · 8 years ago
  11. 3d840d0 northbridge/intel/i440bx: Unify UDELAY selection by Stefan Reinauer · 8 years ago
  12. 0819a47 northbridge/intel/gm45: Use TSC for ramstage timer per default by Stefan Reinauer · 8 years ago
  13. 8e7928a sandybridge/gma_lvds: support both Sandy&Ivy on one board by Iru Cai · 9 years ago
  14. b97009e nb/intel/sandybridge/raminit: Fill SMBIOS type17 info by Patrick Rudolph · 8 years ago
  15. 9f3f915 nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk by Patrick Rudolph · 8 years ago
  16. 77e45d3 nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic by Patrick Rudolph · 8 years ago
  17. d7ee9dd northbridge/intel: add missing #include guards by Iru Cai · 8 years ago
  18. d912f1d nb/intel/sandybridge/raminit: Adjust timB to prevent overflow by Patrick Rudolph · 8 years ago
  19. 0e92bb0 tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))" by Denis 'GNUtoo' Carikli · 8 years ago
  20. bd1fdc6 nb/intel/sandybridge/raminit: Add XMP support by Patrick Rudolph · 8 years ago
  21. a649a54 nb/intel/sandybridge/raminit: Improve logging by Patrick Rudolph · 8 years ago
  22. e4f9d5c nb/intel/sandybridge: Start PEG link training by Patrick Rudolph · 9 years ago
  23. e8e66f4 southbridge/intel/bd82x6x: Use common gpio.c by Patrick Rudolph · 8 years ago
  24. 0188b13 nb/intel/sandybridge/raminit: Add shift offset by Patrick Rudolph · 8 years ago
  25. bd82d18 sandybridge: Always include MRC if not using native RAM init. by Vladimir Serbinenko · 8 years ago
  26. 144eea0 Make MRC vs native a config rather than making a separate chipset for it. by Vladimir Serbinenko · 8 years ago
  27. ffbb3c0 Merge sandy/ivybridge romstage flow for MRC and non-MRC. by Vladimir Serbinenko · 8 years ago
  28. 59ff340 Kconfig: Move defaults for CBFS_SIZE by Martin Roth · 8 years ago
  29. b2eea81 sandybridge: Set all native gfx-related options in northbridge code. by Vladimir Serbinenko · 8 years ago
  30. 609bd94 ivy: Add a possiblity for mainboard early init. by Vladimir Serbinenko · 8 years ago
  31. 2dc15e9 Revert "northbridge/intel/peg: Disable unused ports" by Nico Huber · 8 years ago
  32. 0e06f5b northbridge/intel/peg: Disable unused ports by Patrick Rudolph · 9 years ago
  33. a1c3bed nb/intel/sandybridge/raminit: Fix two dimms per channel by Patrick Rudolph · 8 years ago
  34. 3141eac Revert "northbridge/intel/sandybridge: Fix random raminit failures" by Vladimir Serbinenko · 8 years ago
  35. 5680faf nb/intel/x4x: Move to early cbmem by Damien Zammit · 8 years ago
  36. 216fc50 nb/intel/x4x: Cleanup gma.c by Damien Zammit · 8 years ago
  37. d63115d nb/intel/x4x: Tidy up raminit and fix msbpos() function by Damien Zammit · 8 years ago
  38. fe9876a nb/intel/x4x: Tidy up northbridge by Damien Zammit · 8 years ago
  39. 9fb08f5 nb/intel/x4x: Fix memory hole with both channels populated by Damien Zammit · 8 years ago
  40. 51fdb92 nb/intel/pineview: Native VGA init (CRT) by Damien Zammit · 8 years ago
  41. 2cfab90 nb/intel/pineview: Increase MMCONF decoding to 256 busses by Damien Zammit · 8 years ago
  42. 02f4764 nb/intel/pineview: Use macro names for memory base registers by Damien Zammit · 8 years ago
  43. f564606 nb/intel/pineview: Fix decode_pciebar() by Damien Zammit · 8 years ago
  44. fd277d8 header files: Fix guard name comments to match guard names by Martin Roth · 9 years ago
  45. 7e513d1 intel/sandybridge/raminit: fix ODT setting by Patrick Rudolph · 9 years ago
  46. b851cc6 nb/intel/gm45: Backport configuration of panel power timings by Nico Huber · 9 years ago
  47. c3571da nb/intel/gm45: Drop unnecessary panel power handling by Nico Huber · 9 years ago
  48. a696ae7 intel/northbridge/sandy: raminit code cleanup by Patrick Rudolph · 9 years ago
  49. cbe3892 northbridge/intel/x4x: clean up includes by Martin Roth · 9 years ago
  50. ee352cd nb/intel/gm45: Convert gma.c to `if (IS_ENABLED(` style by Nico Huber · 9 years ago
  51. 2ed0aa2 Correct some common spelling mistakes by Martin Roth · 9 years ago
  52. 5aaeb27 nb/intel/gm45: Export low-power and (SFF) options by Nico Huber · 9 years ago
  53. 4b513a6 northbridge/intel/x4x: Native raminit by Damien Zammit · 9 years ago
  54. 43a1f78 northbridge/intel/x4x: Intel 4-series northbridge support by Damien Zammit · 9 years ago
  55. 35272fd northbridge/intel ACPI: Remove unused Local method by Martin Roth · 9 years ago
  56. 07a1b28 x86 acpi: remove ALIGN_CURRENT macro by Aaron Durbin · 9 years ago
  57. 7c38e1e8 Remove #ifdef checks on Kconfig symbols by Martin Roth · 9 years ago
  58. 003d15c northbridge/intel/pineview: Add native raminit by Damien Zammit · 9 years ago
  59. f7060f1 northbridge/intel/pineview: Add remaining boilerplate code for northbridge by Damien Zammit · 9 years ago
  60. 6247793 northbridge/intel/pineview: Add minimal Pineview northbridge by Damien Zammit · 9 years ago
  61. 9b51568 nb/intel/sandybridge/raminit: Factor out code into toggle_io_reset by Patrick Rudolph · 9 years ago
  62. 371d291 nb/intel/sandybridge/raminit: Comment the code by Patrick Rudolph · 9 years ago
  63. aad34cd nb/intel/sandybridge: Fix PEG disablement by Patrick Rudolph · 9 years ago
  64. 240766a nb/intel/sandybridge/northbridge: Initialize uma_memory_base in all cases by Patrick Rudolph · 9 years ago
  65. 9f1fbb9 northbridge/intel/sandybridge: Fix random raminit failures by Patrick Rudolph · 9 years ago
  66. 0dc6a1e northbridge/intel/fsp_sandybridge: remove blank line by Martin Roth · 9 years ago
  67. 31f4d00 northbridge/intel: Add i89xx header file by Marc Jones · 9 years ago
  68. 593e7de nb/intel/sandybridge: Limit GFX workaround to Sandy Bridge by Nico Huber · 9 years ago
  69. 9d9ce0d nb/intel/sandybridge: Add ACPI DMAR table by Nico Huber · 9 years ago
  70. bb9469c nb/intel/sandybridge: Enable basic IOMMU support by Nico Huber · 9 years ago
  71. e561f35 ACPI: Make DMAR flags settable by Nico Huber · 9 years ago
  72. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  73. 31ff120 Drop northbridge/i440lx by Stefan Reinauer · 9 years ago
  74. e11f6c3 nb/intel/sandybridge/gma: add disable function by Patrick Rudolph · 9 years ago
  75. fc70643 Intel: Move MCRS ResourceTemplate outside of _CRS method by Martin Roth · 9 years ago
  76. bf6b83a Revert "Remove sandybridge and ivybridge FSP code path" by Martin Roth · 9 years ago
  77. 86091f9 cpu/mtrr.h: Fix macro names for MTRR registers by Alexandru Gagniuc · 9 years ago
  78. 5856240 Revert "Remove FSP Rangeley SOC and mohonpeak board support" by Martin Roth · 9 years ago
  79. 62047d1 gma: Consolidate Intel IGD ACPI code some more by Nico Huber · 9 years ago
  80. c48f5ef Kill lvds_num_lanes by Vladimir Serbinenko · 9 years ago
  81. 551cff0 Derive lvds_dual_channel from EDID timings. by Vladimir Serbinenko · 9 years ago
  82. 9733e28 nb/intel/sandybridge/raminit: Add edge write discovery check by Patrick Rudolph · 9 years ago
  83. 2a510a7 northbridge/intel/sandybridge: Do not disable PEG by default by Patrick Rudolph · 9 years ago
  84. 3660c0f northbridge/intel/sandybridge: Enable PEG clock-gating on demand by Patrick Rudolph · 9 years ago
  85. b142b84 northbridge/intel/nehalem: Fix native VGA init by Nicolas Reinecke · 9 years ago
  86. 959478a Remove FSP Rangeley SOC and mohonpeak board support by Alexandru Gagniuc · 9 years ago
  87. fb50124 Remove sandybridge and ivybridge FSP code path by Alexandru Gagniuc · 9 years ago
  88. ecf2eb4 sandybridge ivybridge: Treat native init as first class citizen by Alexandru Gagniuc · 9 years ago
  89. bd0dab2 northbridge/intel/gm45: Fix native VGA init by Audrey Pearson · 9 years ago
  90. 9796f60 coreboot: move TS_END_ROMSTAGE to one spot by Aaron Durbin · 9 years ago
  91. 9647094 intel/sandybridge: Do not guard native VGA init by #ifdefs by Alexandru Gagniuc · 9 years ago
  92. 2e4f83b intel i945: Fix native VGA initialization by Mono · 9 years ago
  93. c241855 north/intel/sandybridge: Fix native VGA initialization by Alexandru Gagniuc · 9 years ago
  94. 2c482a9 intel: Do not hardcode the position of mrc.cache by Alexandru Gagniuc · 9 years ago
  95. 4d3de7e bootstate: remove need for #ifdef ENV_RAMSTAGE by Aaron Durbin · 9 years ago
  96. 439356f x86: remove cpu_incs as romstage Make variable by Aaron Durbin · 9 years ago
  97. 4a66642 northbridge/intel/gm45/Kconfig: Remove IOMMU symbol choice by Martin Roth · 9 years ago
  98. 7dbf9c6 edid: Use edid_mode struct to reduce redundancy by David Hendricks · 9 years ago
  99. df20506 Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig by Martin Roth · 9 years ago
  100. 54e227e intel/i945: don't read structs out of uninitialized pointers by Patrick Georgi · 9 years ago