1. 83a965d Implement GPIO configuration routines for the Intel 3100 southbridge, by Ed Swierk · 16 years ago
  2. a9a5f49 By default, the Intel 3100 LPC interface enables only I/O range 0x3f8 by Ed Swierk · 16 years ago
  3. 0dc5697 This patch halts the tco timer early in the boot process on all ICH series southbridges. by Joseph Smith · 16 years ago
  4. 2b85b63 Setting an integrated southbridge device (like SATA or USB2.0) to by Ed Swierk · 16 years ago
  5. 23cd49a Remove i82801DB files that I meant to delete in r3206. by Joseph Smith · 16 years ago
  6. 06ae639 Tiny style fix for consistency (trivial). by Ed Swierk · 16 years ago
  7. 868de98 Removal of i82801DB (ICH4) by Joseph Smith · 16 years ago
  8. c4e052c The early init code of several Intel southbridge chipsets calls by Ed Swierk · 16 years ago
  9. 71f846c Like other Intel chipsets, the Intel 3100 has a TCO timer that reboots by Ed Swierk · 16 years ago
  10. aaea11b Here is an updated patch addressing most of Uwe's and Peter's by Ed Swierk · 16 years ago
  11. f8ee180 Rename almost all occurences of LinuxBIOS to coreboot. by Stefan Reinauer · 16 years ago
  12. 7e61e45 Please bear with me - another rename checkin. This qualifies as trivial, no by Stefan Reinauer · 16 years ago
  13. 9da69f8 Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s): by Uwe Hermann · 16 years ago
  14. 447aafe Restructure/rename/comment a few 82371XX-related PCI IDs (trivial). by Uwe Hermann · 16 years ago
  15. cce5040 Add initial support for all known ICH* southbridges to the by Uwe Hermann · 16 years ago
  16. b294582 Add PCI IDs for most Intel southbridges of the 82801 series by Uwe Hermann · 16 years ago
  17. a29ec06 Restructure the PCI IDs list for the ICH* chipsets from ICH/ICH0 up to by Uwe Hermann · 16 years ago
  18. 68d8a56 Various fixes and improvements of the 82801xx code. by Joseph Smith · 16 years ago
  19. a9e5821 smaller changes to silence build warnings. (trivial) by Stefan Reinauer · 16 years ago
  20. f1cf1f7 Ever wondered where those "setting incorrect section attributes for by Stefan Reinauer · 16 years ago
  21. 3617103 Thee lines in i82801xx_pci.c need to be removed. They cause the by Joseph Smith · 16 years ago
  22. dfb3c13 Various minor cosmetics and coding style fixes (trivial). by Uwe Hermann · 17 years ago
  23. d9e56e9 Small bugfix in i82801xx_lpc.c. by Corey Osgood · 17 years ago
  24. e99bd10 This patch adds support for the Intel i82810 northbridge and various i82801xx by Corey Osgood · 17 years ago
  25. 56a9125 Intel 82371EB: Some code simplifications (trivial). by Uwe Hermann · 17 years ago
  26. 1410c2d Intel 82371EB: Add IDE init support. by Uwe Hermann · 17 years ago
  27. 4cb8553 Init for the Intel 82371EB southbridge: make all ROM/BIOS regions by Uwe Hermann · 17 years ago
  28. d436a4b Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB, by Uwe Hermann · 17 years ago
  29. 9095e30 A patch to add initial support for the i82801db southbridge based by Jon Dufresne · 17 years ago
  30. 2089487 In the file mainboard/intel/i82801dbm/i82801dbm.c the variable by Jon Dufresne · 17 years ago
  31. f3938bb In src/southbridge/intel/i82801ca, first the smbus registers are mapped at i/o by chn · 17 years ago
  32. a7aa29b Use the canonical name of the vendors/devices and the by Uwe Hermann · 17 years ago
  33. eca92fb Uwe Hermann: by Stefan Reinauer · 18 years ago
  34. a14b468 final rename orgy. sorry for the inconvenience. This should fix it again by Stefan Reinauer · 18 years ago
  35. c76b85d ouch. it's 8_2_371. I'll fix it. This commit breaks compilation by Stefan Reinauer · 18 years ago
  36. d34758f rename southbridge i440bx to its actual name i8371eb by Stefan Reinauer · 18 years ago
  37. d7088c4 by Richard Smith · 18 years ago
  38. cb8eab4 add framework for i440bx chipset by Richard Smith · 18 years ago
  39. 84e4bf6 interesting behavior, i thought svn could do moves. by Stefan Reinauer · 18 years ago
  40. 966d0e6 break the tree really quick due to svn restrictions, next commit fill fix it by Stefan Reinauer · 18 years ago
  41. a25120a Bug fixes: read all 16 bits of DMA configuration; set up NMI/SERR handling in I/O space not PCI space. Comment out posted-memory-write code that looks to have been mis-inherited. by Steven J. Magnani · 18 years ago
  42. ef79223 Bug fixes: read all 16 bits of DMA configuration; set up NMI/SERR handling in I/O space not PCI space. Comment out posted-memory-write code that looks to have been mis-inherited. by Steven J. Magnani · 18 years ago
  43. b140d56 Bug fix: enable secondary IDE only if enable_b is set. by Steven J. Magnani · 18 years ago
  44. 3cec9c8 Bug fix: enable secondary IDE only if enable_b is set. by Steven J. Magnani · 18 years ago
  45. b3d2d4d Rewrite i82801er_enable to do nothing if device does not have an enable/disable bit. by Steven J. Magnani · 18 years ago
  46. 7557331 Rewrite i82801dbm_enable to do nothing if device does not have an enable/disable bit. by Steven J. Magnani · 18 years ago
  47. 706aed8 Initial revision. Based on i82801er and LB v1 code. by Steven J. Magnani · 18 years ago
  48. 09e4ef6 Cleanup. Only functional change is to drop hard-coding of vendor/subsystem ID. by Steven J. Magnani · 18 years ago
  49. eb065f0 Add some P64H2-specific definitions, remove some generic PCI ones. by Steven J. Magnani · 18 years ago
  50. 13f1c2a eric patch by Yinghai Lu · 19 years ago
  51. 6ca7636 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51 by arch import user (historical) · 19 years ago
  52. 284c27f fixes to make adl855pc compile. by Ronald G. Minnich · 19 years ago
  53. 8d41ad8 in loglevel.h, if ASM_CONSOLE_LOGLEVEL is defined, don't try to set it. by Ronald G. Minnich · 19 years ago
  54. 018d8dd - Update abuild.sh so it will rebuild successfull builds by Eric Biederman · 19 years ago
  55. bf8bb42 *** empty log message *** by Yinghai Lu · 19 years ago
  56. 6e53f50 sizeram removal/conversion. by Eric Biederman · 19 years ago
  57. e994331 *** empty log message *** by Yinghai Lu · 19 years ago
  58. 4f9265f - kill typo so resources are not mixed up in amdk8/northbridge.c by Eric Biederman · 19 years ago
  59. dbec2d4 - Bump the LinuxBIOS major version by Eric Biederman · 19 years ago
  60. 858ac5c - Make all ports use config.h for if they have chip_config or chip_info structures. by Eric Biederman · 19 years ago
  61. 7003ba4 - First stab at running linuxbios without the old static device tree. by Eric Biederman · 19 years ago
  62. a4779e8 digital logic stuff, fixes for the smbus code in 82801dbm by Ronald G. Minnich · 19 years ago
  63. e6552bc changes for the dbm part. Still need to remove the sata file ... by Ronald G. Minnich · 20 years ago
  64. 3b00963 compiles. by Ronald G. Minnich · 20 years ago
  65. 182615d by Ronald G. Minnich · 20 years ago
  66. 70093f7 Intel E7501 P64H2 ICH5R support by Yinghai Lu · 20 years ago