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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / soc / intel / skylake / chip.c
  1. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  2. fe86666 intel/skylake: Clean up USB configuration in devicetree by Duncan Laurie · 9 years ago
  3. 66208bd FSP 1.1: Replace soc_ prefix with fsp_ by Lee Leahy · 9 years ago
  4. d0def39 intel/skylake: IRQ programming through UPD by Subrata Banik · 9 years ago
  5. 952cb03 intel/skylake: FSP 1.7.0 MemoryInit/SiliconInit params update by Rizwan Qureshi · 9 years ago
  6. b090a26 intel/skylake: Create "RtcLock" Silicon UPD from coreboot by Barnali Sarkar · 9 years ago
  7. 789f2b6 fsp1_1: provide binding to UEFI version by Aaron Durbin · 9 years ago
  8. 3745c65 skylake: Apply USB2 and USB3 port enable/disable settings by Duncan Laurie · 9 years ago
  9. 5a96b37 skylake: only generate ACPI cpu entries once by Aaron Durbin · 9 years ago
  10. 5c1c3d6 skylake: Update Memory and Silicon Init params by Rizwan Qureshi · 9 years ago
  11. bf0902e skylake: remove the redundant fspNotify in chip final. by robbie zhang · 9 years ago
  12. 1d14b3e soc/intel: Add Skylake SOC support by Lee Leahy · 9 years ago
  13. b000513 soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC by Lee Leahy · 9 years ago