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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / soc / intel / baytrail
  1. 10f7f50 ACPI: Fix IASL Warning about unused method for GBUF check by Martin Roth · 9 years ago
  2. 7e7a4df lib: remove assets infrastructure by Aaron Durbin · 9 years ago
  3. 316170e baytrail: fix missing brackets around ir_base to fix IRQ routing by Alexander Couzens · 9 years ago
  4. 6149233 intel/soc/baytrail: Move MCRS ResourceTemplate out of _CRS method by Martin Roth · 9 years ago
  5. 2d3d1b7 baytrail: add C0 and D0 stepping decode by Ben Gardner · 9 years ago
  6. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  7. 86091f9 cpu/mtrr.h: Fix macro names for MTRR registers by Alexandru Gagniuc · 9 years ago
  8. 3a54318 Add EM100 'hyper term' spi console support in ramstage & smm by Martin Roth · 9 years ago
  9. 1d85700 cpu: microcode: Use microcode stored in binary format by Alexandru Gagniuc · 9 years ago
  10. 7dcb545 intel: auto include intel/common/firmware by Aaron Durbin · 9 years ago
  11. 9796f60 coreboot: move TS_END_ROMSTAGE to one spot by Aaron Durbin · 9 years ago
  12. a400327 chromeos: vboot and chromeos dependency removal for sw write protect state by Paul Kocialkowski · 9 years ago
  13. 3953e39 x86: bootblock: remove linking and program flow from build system by Aaron Durbin · 9 years ago
  14. 4460703 Drop "See file CREDITS..." comment by Stefan Reinauer · 9 years ago
  15. 4d3de7e bootstate: remove need for #ifdef ENV_RAMSTAGE by Aaron Durbin · 9 years ago
  16. 439356f x86: remove cpu_incs as romstage Make variable by Aaron Durbin · 9 years ago
  17. 4a45ec4 x86: Drop -Wa,--divide by Stefan Reinauer · 9 years ago
  18. c407cb9 Move baytrail & fsp_baytrail to the common IFD interface. by Martin Roth · 9 years ago
  19. c4dd3e0 Kconfig: Get rid of obsolete symbols by Martin Roth · 9 years ago
  20. 026e4dc Kconfig: Move CBFS_SIZE into Mainboard menu by Martin Roth · 9 years ago
  21. 42e6856 stage_cache: use cbmem init hooks by Aaron Durbin · 9 years ago
  22. 41607a4 cbmem: add indicator to hooks if cbmem is being recovered by Aaron Durbin · 9 years ago
  23. 4fbac46 cbmem: Unify CBMEM init tasks with CBMEM_INIT_HOOK() API by Kyösti Mälkki · 10 years ago
  24. 5264862 Remove empty lines at end of file by Elyes HAOUAS · 9 years ago
  25. 5eea458 device_ops: add device_t argument to acpi_fill_ssdt_generator by Alexander Couzens · 9 years ago
  26. a90dad1 device_ops: add device_t argument to acpi_inject_dsdt_generator by Alexander Couzens · 9 years ago
  27. 580e722 devicetree: Change scan_bus() prototype in device ops by Kyösti Mälkki · 9 years ago
  28. d0e212c devicetree: Discriminate device ops scan_bus() by Kyösti Mälkki · 9 years ago
  29. ac12c66c assets: abstract away the firmware assets used for booting by Aaron Durbin · 9 years ago
  30. 899d13d cbfs: new API and better program loading by Aaron Durbin · 9 years ago
  31. 4bddb75 chromeos: always enable timestamps by Stefan Reinauer · 9 years ago
  32. 44cbe10 smm: Merge configs SMM_MODULES and SMM_TSEG by Vladimir Serbinenko · 9 years ago
  33. 0e90dae Move TPM code out of chromeos by Vladimir Serbinenko · 9 years ago
  34. 83f81ca acpi: Remove monolithic ACPI by Vladimir Serbinenko · 10 years ago
  35. 7fb149d baytrail: Switch to per-device ACPI by Vladimir Serbinenko · 10 years ago
  36. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  37. 797ca1b baytrail: broadwell: correct refcode loading by Aaron Durbin · 9 years ago
  38. 26e24cc 3rdparty: move to 3rdparty/blobs by Patrick Georgi · 9 years ago
  39. f4f0287 3rdparty: Move to blobs by Patrick Georgi · 9 years ago
  40. 2eaa0d4 intel: Correct MMIO related ACPI table settings by Dave Frodin · 9 years ago
  41. 9616f3c kbuild: Don't require intel/common changes for every soc by Stefan Reinauer · 9 years ago
  42. aae53ab kbuild: automatically include SOCs by Stefan Reinauer · 9 years ago
  43. bd74a4b coreboot: common stage cache by Aaron Durbin · 9 years ago
  44. 195a3f7 soc/baytrail: Use microcode from the blobs repository by Marc Jones · 9 years ago
  45. bae8608 baytrail: correct NC pin to GPO pin according to BYT platform design guide by Kane Chen · 9 years ago
  46. ba9b7bf baytrail: add code for supporting 2x ddr refresh rate by Kane Chen · 9 years ago
  47. 5c8d43e baytrail: fix the coding error on PCIe L1 exit latency by Kevin L Lee · 10 years ago
  48. d946f5e Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 ms by Kevin Hsieh · 10 years ago
  49. 9afc5c0 baytrail: Switch from ACPI mode to PCI mode for legacy support by Marc Jones · 10 years ago
  50. 18ea2d3 baytrail: Change all SoC headers to <soc/headername.h> system by Julius Werner · 10 years ago
  51. d3b40bf baytrail: Fix hdmi audio choppy issue by Kein Yuan · 10 years ago
  52. 2088571 baytrail: reinitialize spi controller in SMM finalization by Aaron Durbin · 10 years ago
  53. 97acc5e Baytrail: Fix no_dev_behind_port not executed for RP1/2/3. by Kenji Chen · 10 years ago
  54. 460703b rmodule: use struct prog while loading rmodules by Aaron Durbin · 9 years ago
  55. c9bf446 baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPU by Kein Yuan · 10 years ago
  56. e237f5a Baytrail: Change PCIe root disable algorithm by Kenji Chen · 10 years ago
  57. 6ecaf65 Baytrail: add _PRT to each PCIe root port device by Ted Kuo · 10 years ago
  58. a30f7e6 cbfs: correct types used for accessing files by Aaron Durbin · 9 years ago
  59. 43b7db7 baytrail: fix HAVE_REFCODE_BLOB build errors by Aaron Durbin · 9 years ago
  60. 72a8e5e Update hex values to CBFS binary name types in Makefiles by Martin Roth · 9 years ago
  61. 9ef9d85 bootstate: use structure pointers for scheduling callbacks by Aaron Durbin · 9 years ago
  62. 9e94dbf ACPI: Get S3 resume state from romstage_handoff by Kyösti Mälkki · 10 years ago
  63. 2c4aab3 coreboot: fix munged license text by Aaron Durbin · 9 years ago
  64. 21a5309 soc/intel/baytrail/Kconfig: Remove explicit `HAVE_MONOTONIC_TIMER` by Paul Menzel · 9 years ago
  65. 033bb4b acpi: Generate valid ACPI processor objects by Timothy Pearson · 9 years ago
  66. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  67. ae98e83 CBMEM: Always use DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  68. f1e3c76 CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  69. 77b1655 vboot2: add verstage by Stefan Reinauer · 10 years ago
  70. 374f27b baytrail: there is a chance that USBPHY_COMPBG is set to 0 by Kane Chen · 10 years ago
  71. 314c4c3 baytrail: use the setting in devicetree.cb to config USBPHY_COMPBG by Kane Chen · 10 years ago
  72. 4175927 baytrail broadwell: Use timestamps internal stash by Kyösti Mälkki · 10 years ago
  73. 3a6550d timestamps: Switch from tsc_t to uint64_t by Stefan Reinauer · 11 years ago
  74. d816a02 baytrail: add more gpio init macros by Kane Chen · 10 years ago
  75. 1a3675e baytrail: Add defines and functions for GPNCORE by Kein Yuan · 10 years ago
  76. 4851bf2 intel baytrail broadwell: Include microcode updates by Kyösti Mälkki · 10 years ago
  77. 002178a baytrail SOCs: Add missing comma in gpio.h by Martin Roth · 10 years ago
  78. 59e209a baytrail: initialize backlight PWM frequency by Aaron Durbin · 10 years ago
  79. f2612a1 x86: Initialize SPI controller explicitly during PCH init by David Hendricks · 10 years ago
  80. ec9293f spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions. by Gabe Black · 10 years ago
  81. 87f3b4e spi: Remove the spi_set_speed and spi_cs_is_valid functions. by Gabe Black · 10 years ago
  82. 99a3bba intel/baytrail: Spelling fixes by Martin Roth · 10 years ago
  83. 546953c Replace hlt with halt() by Patrick Georgi · 10 years ago
  84. bd79c5e Replace hlt() loops with halt() by Patrick Georgi · 10 years ago
  85. 609d22f intel: Remove IRQ1 from possible PIRQ assignemnt. by Vladimir Serbinenko · 10 years ago
  86. 04f68c1 baytrail: fix range check by Patrick Georgi · 10 years ago
  87. 0a1699e intel: use crosscompiler readelf, instead of global by Patrick Georgi · 10 years ago
  88. 48b6b97 src: Too many terminators ';;' at end of stmts, stop Skynet by Edward O'Callaghan · 10 years ago
  89. 0625a8b {cpu,soc}: Use DEVICE_NOOP macro over dummy symbol by Edward O'Callaghan · 10 years ago
  90. dd20d5d baytrail: Remove unused devicetree fields by Shawn Nematbakhsh · 10 years ago
  91. b959079 baytrail: gfx: Don't configure hotplug + backlight registers by Shawn Nematbakhsh · 10 years ago
  92. 787809e Baytrail/dptf: Always return 0 in TCPU._PPC by Kein Yuan · 10 years ago
  93. 1131889 baytrail: handle MRC being an ELF file by Aaron Durbin · 10 years ago
  94. 31ac9e3 baytrail: Configure MSR for 2-core and 4-core P-state configutation by Duncan Laurie · 10 years ago
  95. 89f5292 baytrail: move cache-as-ram base address to 0xfe000000 by Aaron Durbin · 10 years ago
  96. 565d409 baytrail: romstage: Add function to check SW WP status for vboot by Shawn Nematbakhsh · 10 years ago
  97. d2044cc reg_script: default to n for ARCH_X86 by Isaac Christensen · 10 years ago
  98. b3f08c6 cmos: Rename the CMOS related functions. by Gabe Black · 10 years ago
  99. f0aaa29 baytrail: Move HDA verb table to Intel SOC common directory by Duncan Laurie · 10 years ago
  100. d8c4f2b baytrail: Move MRC cache code to a common directory by Duncan Laurie · 10 years ago