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review.coreboot.org / coreboot / 7ed739445ba7ba6ffcf38d647426a44f905ac087 / src / northbridge
  1. 7ed7394 i945: Add Display defines for int15h handler. by Denis 'GNUtoo' Carikli · 11 years ago
  2. fd39ddd Intel 945: Select LAPIC_MONOTONIC_TIMER for X86EMU_DEBUG_TIMINGS by Denis 'GNUtoo' Carikli · 11 years ago
  3. a296ce7 Move the MARK_GRAPHICS_MEM_WRCOMB to x86 architecture by Ronald G. Minnich · 11 years ago
  4. 7bc35754 AMD Northbridge LX: get rid of #include "northbridge/amd/lx/raminit.c" by Christian Gmeiner · 11 years ago
  5. c4e07bb AMD Northbridge LX: convert spd_read_byte() to non-static version by Christian Gmeiner · 11 years ago
  6. e2dc80c AMD Northbridge LX: rename get_systop() to get_top_of_ram() by Christian Gmeiner · 11 years ago
  7. 84ae76c AMD Northbridge LX: include northbridge.h in raminit.c by Christian Gmeiner · 11 years ago
  8. 194ec4d AMD Northbridge LX: make GeodeLinkSpeed() function prototype non-static by Christian Gmeiner · 11 years ago
  9. 6f9f785 AMD Northbridge LX: add some missing includes by Christian Gmeiner · 11 years ago
  10. eb6322f AMD Northbridge LX: make sdram_* function prototypes non-static by Christian Gmeiner · 11 years ago
  11. 29840e2 AMD Fam 15tn: Use all memory on systems with more than 4 GB by Siyuan Wang · 11 years ago
  12. 27435d3 haswell: fix overflow handling TOUUD by Aaron Durbin · 11 years ago
  13. 42409e8 northbridge/amd/amdmct: Use `static const` instead of `const static` by Paul Menzel · 11 years ago
  14. 5750fdd Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h` by Ronald G. Minnich · 11 years ago
  15. 51837f9 Intel Sandy Bridge: udelay.c: Change comparison from <= to < by Paul Menzel · 11 years ago
  16. 393619b intel/gm45: Add more debug output to read/write training by Nico Huber · 11 years ago
  17. 12276ac intel/gm45: Handle overflows during DDR3 write training by Nico Huber · 11 years ago
  18. 08bee23 intel/gm45: Refactor DDR3 write training by Nico Huber · 11 years ago
  19. 35e45c0 intel/gm45: Handle overflows during DDR3 read training by Nico Huber · 11 years ago
  20. 26a6435 intel/gm45: Refactor DDR3 read training by Nico Huber · 11 years ago
  21. 0da9286 intel/gm45: Fix interpretation of VT-d disable bit by Nico Huber · 11 years ago
  22. 0f43af2 intel/i5000: Remove unused copy of udelay.c by Nico Huber · 11 years ago
  23. c5e036a Get rid of a number of __GNUC__ checks by Stefan Reinauer · 11 years ago
  24. bed88d6 northbridge/intel/i5000/udelay.c: Remove unused header `console.h` by Paul Menzel · 11 years ago
  25. 3f5f6d8 Drop prototype guarding for romcc by Stefan Reinauer · 11 years ago
  26. 3949e37 Drop CONFIG_AP_CODE_IN_CAR by Stefan Reinauer · 11 years ago
  27. 2a3c106 hardwaremain: drop boot_complete parameter by Stefan Reinauer · 11 years ago
  28. 7cb1ba9 haswell: use tsc for udelay() by Aaron Durbin · 11 years ago
  29. 243aa44 boot: remove cbmem_post_handling() by Aaron Durbin · 11 years ago
  30. 4b213a8 Intel i945: ACPI: Add _OSC method by Denis 'GNUtoo' Carikli · 11 years ago
  31. ed7e29e Lenovo ThinkPad X60: Add Native VGA init. by Denis 'GNUtoo' Carikli · 11 years ago
  32. 8ecec21 Revert "siemens/sitemp_g1p1: Make ACPI report the right mmconf region" by Nico Huber · 11 years ago
  33. 573a1d6 Persimmon/Fam14/SB800 DSDT: Split into common areas by Mike Loptien · 11 years ago
  34. 1fde22c siemens/sitemp_g1p1: Make ACPI report the right mmconf region by Patrick Georgi · 11 years ago
  35. 5b5cf3d AMD GX1: Remove useless copied header file `northbridge.h` by Paul Menzel · 11 years ago
  36. c6f2722 sandybridge: enable ROM caching by Aaron Durbin · 11 years ago
  37. f567f16 sandybridge: add option to mark graphics memory write-combining. by Aaron Durbin · 11 years ago
  38. fcfe67c haswell: add option to mark graphics memory write-combining. by Aaron Durbin · 11 years ago
  39. bb4e79a x86: add new mtrr implementation by Aaron Durbin · 11 years ago
  40. c965076 resources: introduce reserved_ram_resource() by Aaron Durbin · 11 years ago
  41. c0cbd6e haswell: use dynamic cbmem by Aaron Durbin · 11 years ago
  42. dd4a6d2 coreboot: dynamic cbmem requirement by Aaron Durbin · 11 years ago
  43. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  44. 467f31d haswell/lynxpoint: Use new PCH/PM helper functions by Duncan Laurie · 11 years ago
  45. 969ac8d haswell: Drop the device ID check in graphics init path by Duncan Laurie · 11 years ago
  46. 8ce667e haswell: add multipurpose SMM memory region by Aaron Durbin · 12 years ago
  47. bf396ff haswell: use s3_resume field in romstage_handoff by Aaron Durbin · 12 years ago
  48. 605ca1b haswell: cbmem_get_table_location() implementation by Aaron Durbin · 12 years ago
  49. 0013a69 haswell: drop memory reservation for sandybridge GPU bug by Duncan Laurie · 11 years ago
  50. fa91819 AMD Fam15: Add SPD read functions to wrapper code by Kimarie Hoot · 11 years ago
  51. 2ad1dba haswell: move call site of save_mrc_data() by Aaron Durbin · 12 years ago
  52. 9b7f9b9 haswell: remove unused sys_info structure by Aaron Durbin · 12 years ago
  53. 3d0071b haswell: adjust CAR usage by Aaron Durbin · 12 years ago
  54. 21efd8c haswell: fix ACPI MCFG table by Aaron Durbin · 12 years ago
  55. 7af2069 haswell: enable caching before SMM initialization by Aaron Durbin · 12 years ago
  56. 239c2e8 haswell platforms: restructure romstage main by Aaron Durbin · 12 years ago
  57. e6c3b1d haswell: include TSEG region in cacheable memory by Aaron Durbin · 12 years ago
  58. 86a1110 i945: Replace some two magic values by defined names by Patrick Georgi · 11 years ago
  59. 5c66f08 haswell: don't add a 0-sized memory range resource by Aaron Durbin · 12 years ago
  60. 69efaa0 Google Link: Add remaining code to support native graphics by Ronald G. Minnich · 11 years ago
  61. 1570260 haswell: Fix BDSM and BGSM indicies in memory map by Aaron Durbin · 12 years ago
  62. 1fef1f5 haswell: reserve default SMRAM space by Aaron Durbin · 12 years ago
  63. c12ef97 haswell: resource allocation by Aaron Durbin · 12 years ago
  64. 26e7dd7 haswell: more ULT/LP support and minor tweaks by Duncan Laurie · 12 years ago
  65. 7116129 haswell: Add VGA PCI ID mappings by Aaron Durbin · 12 years ago
  66. df7be71 haswell: Add ULT device IDs by Duncan Laurie · 12 years ago
  67. f72ad02 graysreef: update platform information by Aaron Durbin · 12 years ago
  68. 89f79a0 haswell: remove explicit pcie config accesses by Aaron Durbin · 12 years ago
  69. c1989c4 haswell: add PCI id support by Aaron Durbin · 12 years ago
  70. b6b5aa1 haswell: Remove logic to send dram init done to ME by Aaron Durbin · 12 years ago
  71. 30c3900 haswell: notes and updates. by Aaron Durbin · 12 years ago
  72. 8256a9b haswell: align pei_data structure with intel-framework by Aaron Durbin · 12 years ago
  73. b9adf7b haswell: use #defines for constants in udelay.c by Aaron Durbin · 12 years ago
  74. ce36b12 haswell: Add LPT LP device IDs to platform report by Duncan Laurie · 12 years ago
  75. 67113e9 haswell: Update GPU power management setup by Duncan Laurie · 12 years ago
  76. 6d04f0f haswell: always use MMIO PCI config accesses by Aaron Durbin · 12 years ago
  77. 76c3700 haswell: Add initial support for Haswell platforms by Aaron Durbin · 12 years ago
  78. e7ae96f Add Intel Panther Point USB3 initialization by Marc Jones · 12 years ago
  79. 3b2653b AMD Fam14: Add SPD read functions to wrapper code by Martin Roth · 11 years ago
  80. 41dd3db Intel e7505: provide get_top_of_ram by Kyösti Mälkki · 12 years ago
  81. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  82. fd611f9 Drop CONFIG_WRITE_HIGH_TABLES by Stefan Reinauer · 11 years ago
  83. a8ae1c6 Whitespace: Replace tab character in license text with two spaces by Paul Menzel · 11 years ago
  84. 92f03c0 AMD Family12h: Fix warnings by Martin Roth · 12 years ago
  85. 0aa37c4 sconfig: rename lapic_cluster -> cpu_cluster by Stefan Reinauer · 12 years ago
  86. 4aff445 sconfig: rename pci_domain -> domain by Stefan Reinauer · 12 years ago
  87. 600784e spi.h: Rename the spi.h to spi-generic.h by Zheng Bao · 12 years ago
  88. 8cc8468 Intel: Replace MSR 0xcd with MSR_FSB_FREQ by Patrick Georgi · 12 years ago
  89. f04e68e Add MMCONF resource to AMD fam15 PCI_DOMAIN by Steven Sherk · 12 years ago
  90. 7407f43 Family 12: Update for string portability by Mike Loptien · 12 years ago
  91. e133aab Family 15tn: Update for string portability by Mike Loptien · 12 years ago
  92. 6eced51 Family 10: Update for string portability by Mike Loptien · 12 years ago
  93. 8401453 Family 15: Update for string portability by Mike Loptien · 12 years ago
  94. 1cbabb0 Add MMCONF resource to AMD fam15tn PCI_DOMAIN by Steven Sherk · 12 years ago
  95. 7fb692b Fam15tn: Move SPD read from mainboards into wrapper by Martin Roth · 12 years ago
  96. 6fe0cab Extend CBFS to support arbitrary ROM source media. by Hung-Te Lin · 12 years ago
  97. 5fc64dc Rename family15 pci northbridgeops functions. by Steven Sherk · 12 years ago
  98. f434058 Rename family15tn pci northbridgeops functions. by Steven Sherk · 12 years ago
  99. 58089e8 Family 14: Update for string portability. by Mike Loptien · 12 years ago
  100. d5c998b Add MMCONF resource to AMD fam14 PCI_DOMAIN. by Marc Jones · 12 years ago