intel/gm45: Fix interpretation of VT-d disable bit

When configuring the GTT size for the integrated graphics, the state
of VT-d was read wrong. Bit 48 of CAPID0 (D0F0) is set when VT-d is

In the log of a VT-d enabled roda/rk9 we have now:

VT-d enabled
IGD decoded, subtracting 32M UMA and 4M GTT

Without this patch, only 2M GTT were reported.

Change-Id: I87582c18f4769c2a05be86936d865c0d1fb35966
Signed-off-by: Nico Huber <>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <>
1 file changed