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review.coreboot.org / coreboot / 6b5bf407deb52a900ef0a8a0b99f853be1eb7e82 / src / soc / imgtec
  1. a1b700f arch/mips: Pass cbmem_top to ramstage via calling argument by Arthur Heymans · 4 years, 9 months ago
  2. 340e4b8 lib/cbmem_top: Add a common cbmem_top implementation by Arthur Heymans · 4 years, 9 months ago
  3. 57e8909 src/soc: change "unsigned" to "unsigned int" by Martin Roth · 4 years, 9 months ago
  4. 7839827 cpu,mb,soc: Init missing lb_serial struct fields by Jacob Garber · 5 years ago
  5. a4e8fb2 arch/non-x86: Remove use of __PRE_RAM__ by Kyösti Mälkki · 5 years ago
  6. 76c4386 arch/non-x86: Flip HAVE_MONOTONIC_TIMER default by Kyösti Mälkki · 5 years ago
  7. 142258c arch/mips: Make MIPS specific options depend on ARCH_MIPS by Arthur Heymans · 5 years ago
  8. a9506db arch/mips: Fix <arch/mmio.h> prototypes by Kyösti Mälkki · 5 years ago
  9. 2d4e836 src: Drop unused include <timestamp.h> by Elyes HAOUAS · 5 years ago
  10. c9b7d1f security/tpm: Fix TCPA log feature by Philipp Deppenwiese · 6 years ago
  11. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  12. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  13. 7e0dea6 symbols.h: Add macro to define memlayout region symbols by Julius Werner · 5 years ago
  14. 755db95 (console,drivers/uart)/Kconfig: Fix dependencies by Nico Huber · 6 years ago
  15. e9a0130 src: Remove unneeded include <console/console.h> by Elyes HAOUAS · 6 years ago
  16. c6fe265 soc/imgtech/pistachio: Convert to `board_reset()` by Nico Huber · 6 years ago
  17. 88607a4 src: Use tabs for indentation by Elyes HAOUAS · 6 years ago
  18. e7f4bec soc/imgtec/pistachio: Get rid of device_t by Elyes HAOUAS · 6 years ago
  19. 9a1bb36 soc{broadcom,imgtec,mediatek,qualcomm}: stop using spi_xfer_two_vectors by Aaron Durbin · 6 years ago
  20. 235daa4 driver/uart: Introduce a way for mainboard to override the baudrate by Julien Viard de Galbert · 6 years ago
  21. 5268b76 src/soc: Fix various typos by Jonathan Neuschäfer · 6 years ago
  22. aa8e5d3 soc: Add Kconfig for each soc vendor by Chris Ching · 7 years ago
  23. b29078e mb/*/*: Remove rtc nvram configurable baud rate by Arthur Heymans · 7 years ago
  24. 01f9aa5 Consolidate reset API, add generic reset_prepare mechanism by Julius Werner · 7 years ago
  25. 2dafd89 spi: Remove unused/unnecessary spi_init function definitions by Furquan Shaikh · 7 years ago
  26. e173ee8 soc/imgtec/pistachio: Move spi driver to use spi_bus_map by Furquan Shaikh · 7 years ago
  27. de705fa drivers/spi: Re-factor spi_crop_chunk by Furquan Shaikh · 7 years ago
  28. c2973d1 spi: Get rid of SPI_ATOMIC_SEQUENCING by Furquan Shaikh · 8 years ago
  29. 94f8699 spi: Define and use spi_ctrlr structure by Furquan Shaikh · 8 years ago
  30. 36b81af spi: Pass pointer to spi_slave structure in spi_setup_slave by Furquan Shaikh · 8 years ago
  31. 0dba025 spi: Fix parameter types for spi functions by Furquan Shaikh · 8 years ago
  32. dc34fb6 spi: Get rid of max_transfer_size parameter in spi_slave structure by Furquan Shaikh · 8 years ago
  33. c28984d spi: Clean up SPI flash driver interface by Furquan Shaikh · 8 years ago
  34. 6ec72c9 drivers/uart: Use uart_platform_refclk for all UART models by Lee Leahy · 8 years ago
  35. 479e31e imgtec/pistachio: Fix memlayout ASSERT with new binutils by Stefan Reinauer · 8 years ago
  36. 0e3d7de urara: Increase bootblock size by Julius Werner · 8 years ago
  37. d189987 tegra132/pistachio: Increase romstage size in memlayout.ld by Julius Werner · 8 years ago
  38. 4f3d400 imgtec/pistachio: disable default RPU gate register values by Ionela Voinescu · 9 years ago
  39. 3218e79 imgtec/pistachio: memlayout: update GRAM size by Ionela Voinescu · 9 years ago
  40. 8835754 imgtec/pistachio: I2C: fix base address for I2C clock setup by Ionela Voinescu · 9 years ago
  41. 56e6459 imgtec/pistachio: identity map SOC registers region by Ionela Voinescu · 9 years ago
  42. 7100cf2 imgtec/pistachio: Add SOC_REGISTERS memory region by Ionela Voinescu · 9 years ago
  43. 1136447 imgtec/pistachio: Use SYS PLL in integer mode by Ionela Voinescu · 9 years ago
  44. e7a336a mips: add coherency argument to identity mapping by Ionela Voinescu · 9 years ago
  45. 90d1235 mainboard/google/urara: change SYS PLL to 700MHz by Ionela Voinescu · 9 years ago
  46. 721f299 imgtec/pistachio: DDR2, DDR3: DLL reset set by Ionela Voinescu · 9 years ago
  47. 6b95406 imgtec/pistachio: DDR2, DDR3: DQS gate early by Ionela Voinescu · 9 years ago
  48. f6d3bd4 imgtec/pistachio: increase CBFS cache by Ionela Voinescu · 9 years ago
  49. c32e80d Drop src/cpu/ indirection for MIPS by Stefan Reinauer · 9 years ago
  50. 2e8d4ed soc/imgtec/pistachio: add implementation for system reset by Ionela Voinescu · 9 years ago
  51. 3bdd45e soc/imgtec/pistachio: Implement hard_reset() by Stefan Reinauer · 9 years ago
  52. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  53. d972f78 linking: link bootblock.elf with .data and .bss sections again by Aaron Durbin · 9 years ago
  54. e5bad5c verstage: use common program.ld for linking by Aaron Durbin · 9 years ago
  55. 60391b6 imgtec/pistachio: remove timestamp_get() implementation by Aaron Durbin · 9 years ago
  56. 6123490 imgtech/pistacho: Add vboot2 memory region by Patrick Georgi · 9 years ago
  57. ba71ca3 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  58. eb22da0e Remove old HAVE_UART_MEMORY_MAPPED select statements by Martin Roth · 9 years ago
  59. 3fa1ad0 pistachio: add DDR3 initialization code by Ionela Voinescu · 9 years ago
  60. 1185c10 pistachio: Use passive windowing as DQS gating scheme by Ionela Voinescu · 9 years ago
  61. 1d4c305 pistachio: sort included header files by Ionela Voinescu · 9 years ago
  62. 11f33e4 pistachio: initialize cbmem area to be empty by Ionela Voinescu · 9 years ago
  63. 4f2f01a pistachio: increase romstage size by Ionela Voinescu · 9 years ago
  64. f4e859b Revert "pistashio: bump up romstage size" by Aaron Durbin · 9 years ago
  65. def0fb5 pistashio: bump up romstage size by Aaron Durbin · 9 years ago
  66. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  67. e2b0aff Remove Kconfig variable that has no effect by Patrick Georgi · 9 years ago
  68. b4a6ca9 imgtec/pistachio: Add comment on the unusual memory layout by Patrick Georgi · 9 years ago
  69. 6e944c4 imgtech/pistachio: Give some more space to the bootblock by Patrick Georgi · 9 years ago
  70. aae53ab kbuild: automatically include SOCs by Stefan Reinauer · 9 years ago
  71. 5d997f9 imgtec/pistachio: DDR reads return to controller with no bubbles by Ionela Voinescu · 9 years ago
  72. a2c4f9e imgtec/pistachio: DDR row/bank/column mapping by Ionela Voinescu · 9 years ago
  73. 97db1fb soc: select generic gpio lib on (almost) all non-x86 SOCs by Stefan Reinauer · 9 years ago
  74. 11ecdb7 imgtec/pistachio: increase RAM CBFS cache size by Vadim Bendebury · 9 years ago
  75. 823f607 pistachio: Remove 50% DDR bandwidth restriction by Ionela Voinescu · 9 years ago
  76. 51ad6ac pistachio: Decrease DDR ODT from 75R to 50R by Ionela Voinescu · 9 years ago
  77. 59074ff pistachio: clean DDR2 initialization code by Ionela Voinescu · 9 years ago
  78. 38063b0 pistachio: add clock setup for all I2C interfaces by Ionela Voinescu · 9 years ago
  79. b8936ad urara: Identity map DRAM/SRAM by Andrew Bresticker · 9 years ago
  80. 8549797 imgtec/pistachio: Add spi_crop_chunk() by Patrick Georgi · 9 years ago
  81. b116a1a pistachio: Move console UART to a Kconfig variable by David Hendricks · 10 years ago
  82. d6aaca9 pistachio: add DDR2 initialization code by Ionela Voinescu · 10 years ago
  83. 7271e23 pistachio: report UART register width by Vadim Bendebury · 10 years ago
  84. 9dccf1c uart: pass register width in the coreboot table by Vadim Bendebury · 10 years ago
  85. fdce680 pistachio: implement clock setup for I2C0 by Ionela Voinescu · 9 years ago
  86. a702390 pistachio: Fix ROM clock base address by Ionela Voinescu · 9 years ago
  87. 8b1f23e urara: add clock setup for MIPS CPU, ROM and Ethernet by Ionela Voinescu · 10 years ago
  88. 41d1ca8 pistachio: fix clocks setup code by Ionela Voinescu · 10 years ago
  89. b9d59bb pistachio: Use 1.8433179 MHz for UART refclk by David Hendricks · 10 years ago
  90. 30fc667 pistachio: increase size of bootblock to 18 KB by Ionela Voinescu · 10 years ago
  91. 55b8dc0 pistachio: change memory layout as to allow bigger CBFS cache by Ionela Voinescu · 10 years ago
  92. 1c0d0c0 pistachio: spi: use same clock edge for RX and TX by Ionela Voinescu · 10 years ago
  93. b3f666b urara: Configure clocks and MFIOs by Ionela Voinescu · 10 years ago
  94. efcee76 CBFS: Automate ROM image layout and remove hardcoded offsets by Julius Werner · 10 years ago
  95. f9ff353 spi: support controllers with limited transfer size capabilities by Vadim Bendebury · 10 years ago
  96. b9d9615 urara: add support for DMA coherent memory area by Ionela Voinescu · 10 years ago
  97. fb3ea74 pistachio: increase the size of romstage to 36K by Ionela Voinescu · 10 years ago
  98. 420b0f6 pistachio: add timer frequency for SOC; correct platform ID by Ionela Voinescu · 10 years ago
  99. f3bc026 pistachio: add SOC descriptor by Vadim Bendebury · 10 years ago
  100. fe51cc4 pistachio: modify memory layout by Vadim Bendebury · 10 years ago