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review.coreboot.org / coreboot / 66b0d55d326540e400ad3fa5130666dbd03b9694 / src / soc / intel / baytrail
  1. 474a7c5 google/rambi: add explicit pull-down for ram-id by Matt DeVillier · 7 years ago
  2. c2973d1 spi: Get rid of SPI_ATOMIC_SEQUENCING by Furquan Shaikh · 8 years ago
  3. 31be2c9 soc/intel/common: remove mrc cache assumptions by Aaron Durbin · 8 years ago
  4. 3d15e10 MMCONF_SUPPORT: Flip default to enabled by Kyösti Mälkki · 8 years ago
  5. 94f8699 spi: Define and use spi_ctrlr structure by Furquan Shaikh · 8 years ago
  6. 36b81af spi: Pass pointer to spi_slave structure in spi_setup_slave by Furquan Shaikh · 8 years ago
  7. 0dba025 spi: Fix parameter types for spi functions by Furquan Shaikh · 8 years ago
  8. 52896c6 spi_flash: Move spi flash opcodes to spi_flash.h by Furquan Shaikh · 8 years ago
  9. afe8aee lib: put romstage_handoff implementation in own compilation unit by Aaron Durbin · 8 years ago
  10. 77e1399 romstage_handoff: remove code duplication by Aaron Durbin · 8 years ago
  11. c28984d spi: Clean up SPI flash driver interface by Furquan Shaikh · 8 years ago
  12. bac0fad Remove explicit select MMCONF_SUPPORT by Kyösti Mälkki · 8 years ago
  13. de01136 intel post-car: Increase stacktop alignment by Kyösti Mälkki · 8 years ago
  14. 2bad1e7 intel car: Remove references to DCACHE_RAM_ROMSTACK_SIZE by Kyösti Mälkki · 8 years ago
  15. 8cd723b lib/prog_loaders: use common ramstage_cache_invalid() by Aaron Durbin · 8 years ago
  16. 4a83f1c src/soc: Add required space before opening parenthesis '(' by Elyes HAOUAS · 8 years ago
  17. e8e118d Kconfig: introduce writable boot device notion by Aaron Durbin · 8 years ago
  18. 16246ea chromeos chipsets: select RTC usage by Aaron Durbin · 8 years ago
  19. 038e724 src/soc: Capitalize CPU, ACPI, RAM and ROM by Elyes HAOUAS · 8 years ago
  20. b0f8151 chromeos mainboards: remove chromeos.asl by Aaron Durbin · 8 years ago
  21. 0325dc6 bootmode: Get rid of CONFIG_BOOTMODE_STRAPS by Furquan Shaikh · 8 years ago
  22. f5cfaa3 soc/intel/baytrail: use common Intel ACPI hardware definitions by Aaron Durbin · 8 years ago
  23. e5c00a5 intel post-car: Consolidate choose_top_of_stack() by Kyösti Mälkki · 8 years ago
  24. 65e8f64 intel romstage: Use run_ramstage() by Kyösti Mälkki · 8 years ago
  25. 65cc526 Ignore RAMTOP for MTRRs by Kyösti Mälkki · 8 years ago
  26. 9d2762c intel cache_as_ram: Fix typo in comment by Kyösti Mälkki · 8 years ago
  27. 465eff6 Fix some cbmem.h includes by Kyösti Mälkki · 8 years ago
  28. f5ff854 soc/intel: indicate to build system that XIP_ROM_SIZE isn't used by Aaron Durbin · 8 years ago
  29. 6366d92 {cpu,soc}/intel: remove unused smm_init() function by Aaron Durbin · 8 years ago
  30. b04bb65 soc/intel/baytrail: convert to using common MP and SMM init by Aaron Durbin · 8 years ago
  31. d87c7bc cpu/x86: remove BACKUP_DEFAULT_SMM_REGION option by Aaron Durbin · 8 years ago
  32. 06a0b56 intel/baytrail: use fmap information for code caching by Patrick Georgi · 8 years ago
  33. 0e55632 cpu/x86/mp_init: remove unused callback arguments by Aaron Durbin · 8 years ago
  34. ebabfad soc/intel: Update license headers by Martin Roth · 8 years ago
  35. 2a08137 x86 chipsets: utilize x86_setup_mtrrs_with_detect() by Aaron Durbin · 8 years ago
  36. 0e92bb0 tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))" by Denis 'GNUtoo' Carikli · 8 years ago
  37. 10f7f50 ACPI: Fix IASL Warning about unused method for GBUF check by Martin Roth · 9 years ago
  38. 7e7a4df lib: remove assets infrastructure by Aaron Durbin · 9 years ago
  39. 316170e baytrail: fix missing brackets around ir_base to fix IRQ routing by Alexander Couzens · 9 years ago
  40. 6149233 intel/soc/baytrail: Move MCRS ResourceTemplate out of _CRS method by Martin Roth · 9 years ago
  41. 2d3d1b7 baytrail: add C0 and D0 stepping decode by Ben Gardner · 9 years ago
  42. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  43. 86091f9 cpu/mtrr.h: Fix macro names for MTRR registers by Alexandru Gagniuc · 9 years ago
  44. 3a54318 Add EM100 'hyper term' spi console support in ramstage & smm by Martin Roth · 9 years ago
  45. 1d85700 cpu: microcode: Use microcode stored in binary format by Alexandru Gagniuc · 9 years ago
  46. 7dcb545 intel: auto include intel/common/firmware by Aaron Durbin · 9 years ago
  47. 9796f60 coreboot: move TS_END_ROMSTAGE to one spot by Aaron Durbin · 9 years ago
  48. a400327 chromeos: vboot and chromeos dependency removal for sw write protect state by Paul Kocialkowski · 9 years ago
  49. 3953e39 x86: bootblock: remove linking and program flow from build system by Aaron Durbin · 9 years ago
  50. 4460703 Drop "See file CREDITS..." comment by Stefan Reinauer · 9 years ago
  51. 4d3de7e bootstate: remove need for #ifdef ENV_RAMSTAGE by Aaron Durbin · 9 years ago
  52. 439356f x86: remove cpu_incs as romstage Make variable by Aaron Durbin · 9 years ago
  53. 4a45ec4 x86: Drop -Wa,--divide by Stefan Reinauer · 9 years ago
  54. c407cb9 Move baytrail & fsp_baytrail to the common IFD interface. by Martin Roth · 9 years ago
  55. c4dd3e0 Kconfig: Get rid of obsolete symbols by Martin Roth · 9 years ago
  56. 026e4dc Kconfig: Move CBFS_SIZE into Mainboard menu by Martin Roth · 9 years ago
  57. 42e6856 stage_cache: use cbmem init hooks by Aaron Durbin · 9 years ago
  58. 41607a4 cbmem: add indicator to hooks if cbmem is being recovered by Aaron Durbin · 9 years ago
  59. 4fbac46 cbmem: Unify CBMEM init tasks with CBMEM_INIT_HOOK() API by Kyösti Mälkki · 10 years ago
  60. 5264862 Remove empty lines at end of file by Elyes HAOUAS · 9 years ago
  61. 5eea458 device_ops: add device_t argument to acpi_fill_ssdt_generator by Alexander Couzens · 9 years ago
  62. a90dad1 device_ops: add device_t argument to acpi_inject_dsdt_generator by Alexander Couzens · 9 years ago
  63. 580e722 devicetree: Change scan_bus() prototype in device ops by Kyösti Mälkki · 9 years ago
  64. d0e212c devicetree: Discriminate device ops scan_bus() by Kyösti Mälkki · 9 years ago
  65. ac12c66c assets: abstract away the firmware assets used for booting by Aaron Durbin · 9 years ago
  66. 899d13d cbfs: new API and better program loading by Aaron Durbin · 9 years ago
  67. 4bddb75 chromeos: always enable timestamps by Stefan Reinauer · 9 years ago
  68. 44cbe10 smm: Merge configs SMM_MODULES and SMM_TSEG by Vladimir Serbinenko · 9 years ago
  69. 0e90dae Move TPM code out of chromeos by Vladimir Serbinenko · 9 years ago
  70. 83f81ca acpi: Remove monolithic ACPI by Vladimir Serbinenko · 10 years ago
  71. 7fb149d baytrail: Switch to per-device ACPI by Vladimir Serbinenko · 10 years ago
  72. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  73. 797ca1b baytrail: broadwell: correct refcode loading by Aaron Durbin · 9 years ago
  74. 26e24cc 3rdparty: move to 3rdparty/blobs by Patrick Georgi · 9 years ago
  75. f4f0287 3rdparty: Move to blobs by Patrick Georgi · 9 years ago
  76. 2eaa0d4 intel: Correct MMIO related ACPI table settings by Dave Frodin · 9 years ago
  77. 9616f3c kbuild: Don't require intel/common changes for every soc by Stefan Reinauer · 9 years ago
  78. aae53ab kbuild: automatically include SOCs by Stefan Reinauer · 9 years ago
  79. bd74a4b coreboot: common stage cache by Aaron Durbin · 9 years ago
  80. 195a3f7 soc/baytrail: Use microcode from the blobs repository by Marc Jones · 9 years ago
  81. bae8608 baytrail: correct NC pin to GPO pin according to BYT platform design guide by Kane Chen · 9 years ago
  82. ba9b7bf baytrail: add code for supporting 2x ddr refresh rate by Kane Chen · 10 years ago
  83. 5c8d43e baytrail: fix the coding error on PCIe L1 exit latency by Kevin L Lee · 10 years ago
  84. d946f5e Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 ms by Kevin Hsieh · 10 years ago
  85. 9afc5c0 baytrail: Switch from ACPI mode to PCI mode for legacy support by Marc Jones · 10 years ago
  86. 18ea2d3 baytrail: Change all SoC headers to <soc/headername.h> system by Julius Werner · 10 years ago
  87. d3b40bf baytrail: Fix hdmi audio choppy issue by Kein Yuan · 10 years ago
  88. 2088571 baytrail: reinitialize spi controller in SMM finalization by Aaron Durbin · 10 years ago
  89. 97acc5e Baytrail: Fix no_dev_behind_port not executed for RP1/2/3. by Kenji Chen · 10 years ago
  90. 460703b rmodule: use struct prog while loading rmodules by Aaron Durbin · 9 years ago
  91. c9bf446 baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPU by Kein Yuan · 10 years ago
  92. e237f5a Baytrail: Change PCIe root disable algorithm by Kenji Chen · 10 years ago
  93. 6ecaf65 Baytrail: add _PRT to each PCIe root port device by Ted Kuo · 10 years ago
  94. a30f7e6 cbfs: correct types used for accessing files by Aaron Durbin · 9 years ago
  95. 43b7db7 baytrail: fix HAVE_REFCODE_BLOB build errors by Aaron Durbin · 9 years ago
  96. 72a8e5e Update hex values to CBFS binary name types in Makefiles by Martin Roth · 9 years ago
  97. 9ef9d85 bootstate: use structure pointers for scheduling callbacks by Aaron Durbin · 9 years ago
  98. 9e94dbf ACPI: Get S3 resume state from romstage_handoff by Kyösti Mälkki · 10 years ago
  99. 2c4aab3 coreboot: fix munged license text by Aaron Durbin · 9 years ago
  100. 21a5309 soc/intel/baytrail/Kconfig: Remove explicit `HAVE_MONOTONIC_TIMER` by Paul Menzel · 9 years ago