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43b7f416783ccc98952a4eb5f9274907442b03e5
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mainboard
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siemens
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mc_apl1
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variants
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1e67f07
siemens/mc_apl1: Activate clock spreading for PTN3460
by Mario Scheithauer
· 6 years ago
66038c8
siemens/mc_apl1: Add new mainboard variant mc_apl2
by Mario Scheithauer
· 6 years ago
7e15e87
siemens/mc_apl1: Make the DDR memory swizzle data configurable
by Mario Scheithauer
· 6 years ago
e27c096
siemens/mc_apl1: Correct the Tx signal from SATA interface
by Mario Scheithauer
· 6 years ago
403458e
siemens/mc_apl1: Extend circuit life by clock gating and power gating
by Mario Scheithauer
· 6 years ago
5650896
siemens/mc_apl1: Disable PCI clock outputs on XIO bridge
by Mario Scheithauer
· 6 years ago
16ebc98
siemens/mc_apl1: Select DDR50 mode for eMMC
by Mario Scheithauer
· 6 years ago
0e1a526
siemens/mc_apl1: Make adjustments for the 1st redesign of this mainboard
by Mario Scheithauer
· 6 years ago
053851f
siemens/mc_apl1: Move board specific things to mc_apl1 variant
by Mario Scheithauer
· 6 years ago
c4986eb
soc/intel/common/block: Add common chip config block
by Subrata Banik
· 6 years ago
6141353
siemens/mc_apl1: Move board specific things to mc_apl1 variant
by Mario Scheithauer
· 6 years ago
d127be1
siemens/mc_apl1: Provide baseboard and variant concepts
by Mario Scheithauer
· 6 years ago