blob: 13da3e87042103350fcd80f02fb69ce9d8320af9 [file] [log] [blame]
Damien Zammitcbe7a8e2015-08-19 15:23:32 +10001#
2# This file is part of the coreboot project.
3#
4# Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
8# the Free Software Foundation; either version 2 of the License, or
9# (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16
17chip northbridge/intel/x4x # Northbridge
18 device cpu_cluster 0 on # APIC cluster
19 chip cpu/intel/socket_LGA775
20 device lapic 0 on end
21 end
22 chip cpu/intel/model_1067x # CPU
23 device lapic 0xACAC off end
Damien Zammitcbe7a8e2015-08-19 15:23:32 +100024 end
25 end
26 device domain 0 on # PCI domain
27 subsystemid 0x1458 0x5000 inherit
28 device pci 0.0 on # Host Bridge
29 subsystemid 0x1458 0x5000
30 end
Elyes HAOUAS6284c7e2018-05-28 13:28:48 +020031 device pci 2.0 on # Integrated graphics controller
Damien Zammitcbe7a8e2015-08-19 15:23:32 +100032 subsystemid 0x1458 0xd000
33 end
34 device pci 2.1 on # Integrated graphics controller 2
35 subsystemid 0x1458 0xd001
36 end
37 device pci 3.0 off end # ME
38 device pci 3.1 off end # ME
39 chip southbridge/intel/i82801gx # Southbridge
40 register "pirqa_routing" = "0x0b"
41 register "pirqb_routing" = "0x0b"
42 register "pirqc_routing" = "0x0b"
43 register "pirqd_routing" = "0x0b"
44 register "pirqe_routing" = "0x0b"
45 register "pirqf_routing" = "0x0b"
46 register "pirqg_routing" = "0x0b"
47 register "pirqh_routing" = "0x0b"
Damien Zammitcbe7a8e2015-08-19 15:23:32 +100048 register "ide_enable_primary" = "0x1"
49 register "ide_enable_secondary" = "0x0"
Damien Zammitcbe7a8e2015-08-19 15:23:32 +100050 register "sata_ports_implemented" = "0x3"
51 register "gpe0_en" = "0x40"
52
Arthur Heymansfecf7772019-11-09 14:19:04 +010053 register "gen2_dec" = "0x007c0291" # HWM
54
Damien Zammitcbe7a8e2015-08-19 15:23:32 +100055 device pci 1b.0 on # Audio
56 subsystemid 0x1458 0xa002
57 end
58 device pci 1c.0 on end # PCIe 1
59 device pci 1c.1 on # PCIe 2 (NIC)
60 device pci 00.0 on # PCI 10ec:8168
61 subsystemid 0x1458 0xe000
62 end
63 end
Arthur Heymansd2510992019-01-07 15:30:21 +010064 device pci 1c.2 off end # PCIe 3
Arthur Heymansb9d25892018-06-15 22:02:28 +020065 device pci 1c.3 off end # PCIe 4
Damien Zammitcbe7a8e2015-08-19 15:23:32 +100066 device pci 1d.0 on # USB
67 subsystemid 0x1458 0x5004
68 end
69 device pci 1d.1 on # USB
70 subsystemid 0x1458 0x5004
71 end
72 device pci 1d.2 on # USB
73 subsystemid 0x1458 0x5004
74 end
75 device pci 1d.3 on # USB
76 subsystemid 0x1458 0x5004
77 end
78 device pci 1d.7 on # USB
79 subsystemid 0x1458 0x5006
80 end
81 device pci 1e.0 on end # PCI bridge
Arthur Heymansb9d25892018-06-15 22:02:28 +020082 device pci 1e.2 off end # AC'97 Audio
83 device pci 1e.3 off end # AC'97 Modem
Damien Zammitcbe7a8e2015-08-19 15:23:32 +100084 device pci 1f.0 on # ISA bridge
85 subsystemid 0x1458 0x5001
86 chip superio/ite/it8718f # Super I/O
Vagiz Trakhanov17c57712017-09-28 14:21:54 +000087 register "TMPIN1.mode" = "THERMAL_RESISTOR"
88 register "TMPIN2.mode" = "THERMAL_RESISTOR"
89 register "TMPIN3.mode" = "THERMAL_DIODE"
90 register "TMPIN3.offset" = "0"
Damien Zammite808fb22016-11-25 22:10:19 +110091 register "ec.vin_mask" = "VIN7 | VIN4 | VIN3 | VIN2 | VIN1 | VIN0"
92
93 register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
94 register "FAN1.smart.tmpin" = "3"
95 register "FAN1.smart.tmp_off" = "25"
96 register "FAN1.smart.tmp_start" = "30"
97 register "FAN1.smart.tmp_full" = "65"
98 register "FAN1.smart.tmp_delta" = "3"
99 register "FAN1.smart.smoothing" = "1"
100 register "FAN1.smart.pwm_start" = "0"
101 register "FAN1.smart.slope" = "10"
102
103 register "FAN2.mode" = "FAN_SMART_AUTOMATIC"
104 register "FAN2.smart.tmpin" = "3"
105 register "FAN2.smart.tmp_off" = "25"
106 register "FAN2.smart.tmp_start" = "30"
107 register "FAN2.smart.tmp_full" = "65"
108 register "FAN2.smart.tmp_delta" = "3"
109 register "FAN2.smart.smoothing" = "1"
110 register "FAN2.smart.pwm_start" = "0"
111 register "FAN2.smart.slope" = "10"
112
Damien Zammitcbe7a8e2015-08-19 15:23:32 +1000113 device pnp 2e.0 on # Floppy
114 io 0x60 = 0x3f0
115 irq 0x70 = 6
116 drq 0x74 = 2
117 irq 0xf0 = 0x00
118 irq 0xf1 = 0x80
119 end
120 device pnp 2e.1 on # COM1
121 io 0x60 = 0x3f8
122 irq 0x70 = 4
123 end
124 device pnp 2e.2 on # COM2
125 io 0x60 = 0x2f8
126 irq 0x70 = 3
127 end
128 device pnp 2e.3 on # Parallel port
129 io 0x60 = 0x378
130 irq 0x70 = 7
131 io 0x62 = 0x000
132 drq 0x74 = 4
133 irq 0xf0 = 0x08
134 end
135 device pnp 2e.4 on # Environment controller
136 io 0x60 = 0x290
137 irq 0x70 = 0x00
138 io 0x62 = 0x000
139 irq 0xf0 = 0x80
140 irq 0xf1 = 0x00
141 irq 0xf2 = 0x0a
142 irq 0xf3 = 0x80
143 irq 0xf4 = 0x00
144 irq 0xf5 = 0x00
145 irq 0xf6 = 0xff
146 end
147 device pnp 2e.5 on # Keyboard
148 io 0x60 = 0x60
149 irq 0x70 = 1
150 io 0x62 = 0x64
151 irq 0xf0 = 0x48
152 end
153 device pnp 2e.6 on # Mouse
154 irq 0x70 = 12
155 irq 0x71 = 2
156 irq 0xf0 = 0
157 end
158 end
159 end
160 device pci 1f.1 on # PATA/IDE
161 subsystemid 0x1458 0xb004
162 end
163 device pci 1f.2 on # SATA
164 subsystemid 0x1458 0xb005
165 end
166 device pci 1f.3 on # SMbus
167 subsystemid 0x1458 0x5001
168 end
Damien Zammitcbe7a8e2015-08-19 15:23:32 +1000169 end
170 end
171end