| commit | fecf77770b8e68b9ef82021ca53c31db93736d93 | [log] [tgz] |
|---|---|---|
| author | Arthur Heymans <arthur@aheymans.xyz> | Sat Nov 09 14:19:04 2019 +0100 |
| committer | Patrick Georgi <pgeorgi@google.com> | Tue Nov 12 18:22:57 2019 +0000 |
| tree | 001fba539061f4075699fc98e02b3153259477e9 | |
| parent | 675cb9152e6704383cf402c55758ddea2c7a1e05 [diff] [blame] |
sb/intel/i82801gx: Add common LPC decode code Generic LPC decode ranges can now be set from the devicetree. Change-Id: I1065ec770ad3a743286859efa39dca09ccb733a1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36700 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb index 7045dbf..13da3e8 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
@@ -50,6 +50,8 @@ register "sata_ports_implemented" = "0x3" register "gpe0_en" = "0x40" + register "gen2_dec" = "0x007c0291" # HWM + device pci 1b.0 on # Audio subsystemid 0x1458 0xa002 end