| Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 2 | |
| Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 3 | #include <device/pci_ops.h> |
| Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 4 | #include <device/pci_def.h> |
| Elyes HAOUAS | 4ad1446 | 2018-06-16 18:29:33 +0200 | [diff] [blame] | 5 | #include <southbridge/intel/bd82x6x/pch.h> |
| 6 | |
| Arthur Heymans | 2b28a16 | 2019-11-12 17:21:08 +0100 | [diff] [blame] | 7 | void mainboard_pch_lpc_setup(void) |
| Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 8 | { |
| Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 9 | pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xac, 0x00010000); |
| 10 | } |
| 11 | |
| Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 12 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 13 | { 1, 0, 0 }, |
| 14 | { 1, 0, 0 }, |
| 15 | { 1, 0, 1 }, |
| 16 | { 1, 0, 1 }, |
| 17 | { 1, 0, 2 }, |
| 18 | { 1, 0, 2 }, |
| 19 | { 1, 0, 3 }, |
| 20 | { 1, 0, 3 }, |
| 21 | { 1, 0, 4 }, |
| 22 | { 1, 0, 4 }, |
| 23 | { 1, 0, 6 }, |
| 24 | { 1, 0, 5 }, |
| 25 | { 1, 0, 5 }, |
| 26 | { 1, 0, 6 }, |
| 27 | }; |