Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2017 Nicola Corna <nicola@corna.info> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #include <stdint.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 18 | #include <device/pci_ops.h> |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 19 | #include <device/pci_def.h> |
Elyes HAOUAS | 4ad1446 | 2018-06-16 18:29:33 +0200 | [diff] [blame] | 20 | #include <northbridge/intel/sandybridge/sandybridge.h> |
| 21 | #include <northbridge/intel/sandybridge/raminit_native.h> |
| 22 | #include <southbridge/intel/bd82x6x/pch.h> |
| 23 | |
Arthur Heymans | 2b28a16 | 2019-11-12 17:21:08 +0100 | [diff] [blame^] | 24 | void mainboard_pch_lpc_setup(void) |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 25 | { |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 26 | pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xac, 0x00010000); |
| 27 | } |
| 28 | |
Arthur Heymans | 9c53834 | 2019-11-12 16:42:33 +0100 | [diff] [blame] | 29 | void mainboard_late_rcba_config(void) |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 30 | { |
| 31 | /* Disable devices. */ |
| 32 | RCBA32(0x3414) = 0x00000020; |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 33 | } |
| 34 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 35 | { 1, 0, 0 }, |
| 36 | { 1, 0, 0 }, |
| 37 | { 1, 0, 1 }, |
| 38 | { 1, 0, 1 }, |
| 39 | { 1, 0, 2 }, |
| 40 | { 1, 0, 2 }, |
| 41 | { 1, 0, 3 }, |
| 42 | { 1, 0, 3 }, |
| 43 | { 1, 0, 4 }, |
| 44 | { 1, 0, 4 }, |
| 45 | { 1, 0, 6 }, |
| 46 | { 1, 0, 5 }, |
| 47 | { 1, 0, 5 }, |
| 48 | { 1, 0, 6 }, |
| 49 | }; |
| 50 | |
Nicola Corna | 1bea5b7 | 2017-03-03 18:04:48 +0100 | [diff] [blame] | 51 | void mainboard_config_superio(void) |
| 52 | { |
| 53 | } |
| 54 | |
| 55 | void mainboard_get_spd(spd_raw_data *spd, bool id_only) |
| 56 | { |
| 57 | read_spd(&spd[0], 0x50, id_only); |
| 58 | read_spd(&spd[2], 0x51, id_only); |
| 59 | } |