blob: 6f9109af0f9bce92ec64795779b9f466d80f98f3 [file] [log] [blame]
Angel Pons8dcc8182020-04-03 01:21:52 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Angel Pons963500f2018-04-29 19:56:49 +02002
Arthur Heymansfa5d0f82019-11-12 19:11:50 +01003#include <bootblock_common.h>
Keith Hui45e4ab42023-07-22 12:49:05 -04004#include <northbridge/intel/sandybridge/raminit.h>
Angel Pons963500f2018-04-29 19:56:49 +02005#include <southbridge/intel/bd82x6x/pch.h>
6#include <superio/ite/common/ite.h>
7#include <superio/ite/it8728f/it8728f.h>
8
9#define SUPERIO_GPIO PNP_DEV(0x2e, IT8728F_GPIO)
10#define SERIAL_DEV PNP_DEV(0x2e, 0x01)
11
Angel Pons963500f2018-04-29 19:56:49 +020012const struct southbridge_usb_port mainboard_usb_ports[] = {
13 { 1, 0, 0 },
14 { 1, 0, 0 },
15 { 1, 0, 1 },
16 { 1, 0, 1 },
17 { 1, 0, 2 },
18 { 1, 0, 2 },
19 { 1, 0, 3 },
20 { 1, 0, 3 },
21 { 1, 0, 4 },
22 { 1, 0, 4 },
23 { 1, 0, 6 },
24 { 1, 0, 5 },
25 { 1, 0, 5 },
26 { 1, 0, 6 },
27};
28
Arthur Heymansfa5d0f82019-11-12 19:11:50 +010029void bootblock_mainboard_early_init(void)
Angel Pons963500f2018-04-29 19:56:49 +020030{
Angel Ponsc6b44cd2019-03-10 13:21:12 +010031 if (!CONFIG(NO_UART_ON_SUPERIO)) {
32 /* Enable serial port */
33 ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
34 }
Angel Pons963500f2018-04-29 19:56:49 +020035
Angel Pons940bb4e2018-06-24 12:02:59 +020036 /* Disable SIO WDT which kicks in DualBIOS */
37 ite_reg_write(SUPERIO_GPIO, 0xEF, 0x7E);
Angel Pons963500f2018-04-29 19:56:49 +020038}