blob: 5be96b57544cd5a2f373a3bb9e429db740b17a49 [file] [log] [blame]
Angel Pons4b429832020-04-02 23:48:50 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Martin Roth3b2653b2013-02-24 10:46:11 -07002
3#ifndef _NB_AGESA_CHIP_H_
4#define _NB_AGESA_CHIP_H_
5
6struct northbridge_amd_agesa_family14_config
7{
8 /*
9 * Here is an example of how this would be put into the devicetree.cb file
10 * Note that only Socket 0, Channel 0 is used for the Ontario
11 * (family 14, Fam 0x00-0x0F) parts.
12 * This should be placed after the device pci 18.x statements
13 *
14 * register "spdAddrLookup" = "
15 * { // Use 8-bit SPD addresses here
Elyes HAOUASb0f19882018-06-09 11:59:00 +020016 * { {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1
17 * { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 (Unused)
Martin Roth3b2653b2013-02-24 10:46:11 -070018 * }"
19 *
20 */
21
22 u8 spdAddrLookup[2][2][4];
23};
24
25#endif