Angel Pons | 3bd1e3d | 2020-04-05 15:47:17 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Kyösti Mälkki | 0c1dd9c | 2020-06-17 23:37:49 +0300 | [diff] [blame] | 4 | #include <acpi/acpi_gnvs.h> |
Kyösti Mälkki | 2787237 | 2021-01-21 16:05:26 +0200 | [diff] [blame] | 5 | #include <acpi/acpi_pm.h> |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 6 | #include <acpi/acpigen.h> |
robbie zhang | b45dde0 | 2015-10-01 17:21:33 -0700 | [diff] [blame] | 7 | #include <arch/cpu.h> |
Duncan Laurie | db54a67 | 2015-09-04 14:19:35 -0700 | [diff] [blame] | 8 | #include <arch/ioapic.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 9 | #include <arch/smp/mpspec.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 10 | #include <console/console.h> |
| 11 | #include <cpu/x86/smm.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 12 | #include <cpu/x86/msr.h> |
Matt Delco | 9084c3c | 2018-07-27 14:17:29 -0700 | [diff] [blame] | 13 | #include <cpu/intel/common/common.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 14 | #include <cpu/intel/turbo.h> |
Kyösti Mälkki | ca71e13 | 2021-01-15 05:06:35 +0200 | [diff] [blame] | 15 | #include <intelblocks/acpi_wake_source.h> |
Barnali Sarkar | 0a203d1 | 2017-05-04 18:02:17 +0530 | [diff] [blame] | 16 | #include <intelblocks/cpulib.h> |
Ravi Sarawadi | 1483d1f | 2017-09-28 17:06:01 -0700 | [diff] [blame] | 17 | #include <intelblocks/lpc_lib.h> |
Pratik Prajapati | 418535e | 2017-10-11 16:12:21 -0700 | [diff] [blame] | 18 | #include <intelblocks/sgx.h> |
Duncan Laurie | 93bbd41 | 2017-11-11 20:03:29 -0800 | [diff] [blame] | 19 | #include <intelblocks/uart.h> |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 20 | #include <intelblocks/systemagent.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 21 | #include <soc/acpi.h> |
| 22 | #include <soc/cpu.h> |
| 23 | #include <soc/iomap.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 24 | #include <soc/msr.h> |
Kyösti Mälkki | d6c5714 | 2020-12-21 15:17:01 +0200 | [diff] [blame] | 25 | #include <soc/nvs.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 26 | #include <soc/pci_devs.h> |
| 27 | #include <soc/pm.h> |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 28 | #include <soc/ramstage.h> |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 29 | #include <soc/systemagent.h> |
robbie zhang | b45dde0 | 2015-10-01 17:21:33 -0700 | [diff] [blame] | 30 | #include <string.h> |
| 31 | #include <types.h> |
Patrick Rudolph | e56189c | 2018-04-18 10:11:59 +0200 | [diff] [blame] | 32 | #include <device/pci_ops.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 33 | |
Elyes HAOUAS | c338507 | 2019-03-21 15:38:06 +0100 | [diff] [blame] | 34 | #include "chip.h" |
| 35 | |
Michael Niewöhner | d5a4547 | 2020-10-15 00:27:59 +0200 | [diff] [blame] | 36 | #define CPUID_6_EAX_ISST (1 << 7) |
| 37 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 38 | /* |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 39 | * List of suported C-states in this processor. |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 40 | */ |
| 41 | enum { |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 42 | C_STATE_C0, /* 0 */ |
| 43 | C_STATE_C1, /* 1 */ |
| 44 | C_STATE_C1E, /* 2 */ |
| 45 | C_STATE_C3, /* 3 */ |
| 46 | C_STATE_C6_SHORT_LAT, /* 4 */ |
| 47 | C_STATE_C6_LONG_LAT, /* 5 */ |
| 48 | C_STATE_C7_SHORT_LAT, /* 6 */ |
| 49 | C_STATE_C7_LONG_LAT, /* 7 */ |
| 50 | C_STATE_C7S_SHORT_LAT, /* 8 */ |
| 51 | C_STATE_C7S_LONG_LAT, /* 9 */ |
| 52 | C_STATE_C8, /* 10 */ |
| 53 | C_STATE_C9, /* 11 */ |
| 54 | C_STATE_C10, /* 12 */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 55 | NUM_C_STATES |
| 56 | }; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 57 | #define MWAIT_RES(state, sub_state) \ |
| 58 | { \ |
| 59 | .addrl = (((state) << 4) | (sub_state)), \ |
| 60 | .space_id = ACPI_ADDRESS_SPACE_FIXED, \ |
| 61 | .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \ |
| 62 | .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \ |
| 63 | .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | static acpi_cstate_t cstate_map[NUM_C_STATES] = { |
| 67 | [C_STATE_C0] = { }, |
| 68 | [C_STATE_C1] = { |
| 69 | .latency = 0, |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 70 | .power = C1_POWER, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 71 | .resource = MWAIT_RES(0, 0), |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 72 | }, |
| 73 | [C_STATE_C1E] = { |
| 74 | .latency = 0, |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 75 | .power = C1_POWER, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 76 | .resource = MWAIT_RES(0, 1), |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 77 | }, |
| 78 | [C_STATE_C3] = { |
| 79 | .latency = C_STATE_LATENCY_FROM_LAT_REG(0), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 80 | .power = C3_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 81 | .resource = MWAIT_RES(1, 0), |
| 82 | }, |
| 83 | [C_STATE_C6_SHORT_LAT] = { |
| 84 | .latency = C_STATE_LATENCY_FROM_LAT_REG(1), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 85 | .power = C6_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 86 | .resource = MWAIT_RES(2, 0), |
| 87 | }, |
| 88 | [C_STATE_C6_LONG_LAT] = { |
| 89 | .latency = C_STATE_LATENCY_FROM_LAT_REG(2), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 90 | .power = C6_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 91 | .resource = MWAIT_RES(2, 1), |
| 92 | }, |
| 93 | [C_STATE_C7_SHORT_LAT] = { |
| 94 | .latency = C_STATE_LATENCY_FROM_LAT_REG(1), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 95 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 96 | .resource = MWAIT_RES(3, 0), |
| 97 | }, |
| 98 | [C_STATE_C7_LONG_LAT] = { |
| 99 | .latency = C_STATE_LATENCY_FROM_LAT_REG(2), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 100 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 101 | .resource = MWAIT_RES(3, 1), |
| 102 | }, |
| 103 | [C_STATE_C7S_SHORT_LAT] = { |
| 104 | .latency = C_STATE_LATENCY_FROM_LAT_REG(1), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 105 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 106 | .resource = MWAIT_RES(3, 2), |
| 107 | }, |
| 108 | [C_STATE_C7S_LONG_LAT] = { |
| 109 | .latency = C_STATE_LATENCY_FROM_LAT_REG(2), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 110 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 111 | .resource = MWAIT_RES(3, 3), |
| 112 | }, |
| 113 | [C_STATE_C8] = { |
| 114 | .latency = C_STATE_LATENCY_FROM_LAT_REG(3), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 115 | .power = C8_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 116 | .resource = MWAIT_RES(4, 0), |
| 117 | }, |
| 118 | [C_STATE_C9] = { |
| 119 | .latency = C_STATE_LATENCY_FROM_LAT_REG(4), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 120 | .power = C9_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 121 | .resource = MWAIT_RES(5, 0), |
| 122 | }, |
| 123 | [C_STATE_C10] = { |
| 124 | .latency = C_STATE_LATENCY_FROM_LAT_REG(5), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 125 | .power = C10_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 126 | .resource = MWAIT_RES(6, 0), |
| 127 | }, |
| 128 | }; |
| 129 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 130 | static int cstate_set_s0ix[] = { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 131 | C_STATE_C1E, |
| 132 | C_STATE_C7S_LONG_LAT, |
| 133 | C_STATE_C10 |
| 134 | }; |
| 135 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 136 | static int cstate_set_non_s0ix[] = { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 137 | C_STATE_C1E, |
| 138 | C_STATE_C3, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 139 | C_STATE_C7S_LONG_LAT, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 140 | }; |
| 141 | |
| 142 | static int get_cores_per_package(void) |
| 143 | { |
| 144 | struct cpuinfo_x86 c; |
| 145 | struct cpuid_result result; |
| 146 | int cores = 1; |
| 147 | |
| 148 | get_fms(&c, cpuid_eax(1)); |
| 149 | if (c.x86 != 6) |
| 150 | return 1; |
| 151 | |
| 152 | result = cpuid_ext(0xb, 1); |
| 153 | cores = result.ebx & 0xff; |
| 154 | |
| 155 | return cores; |
| 156 | } |
| 157 | |
Kyösti Mälkki | c2b0a4f | 2020-06-28 22:39:59 +0300 | [diff] [blame] | 158 | void soc_fill_gnvs(struct global_nvs *gnvs) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 159 | { |
Kyösti Mälkki | d5f645c | 2019-09-28 00:20:27 +0300 | [diff] [blame] | 160 | const struct soc_intel_skylake_config *config = config_of_soc(); |
Duncan Laurie | 7fce30c | 2015-09-04 13:53:14 -0700 | [diff] [blame] | 161 | |
Duncan Laurie | 7fce30c | 2015-09-04 13:53:14 -0700 | [diff] [blame] | 162 | /* Enable DPTF based on mainboard configuration */ |
| 163 | gnvs->dpte = config->dptf_enable; |
Duncan Laurie | 3d3b76b | 2016-02-25 08:45:43 -0800 | [diff] [blame] | 164 | |
Furquan Shaikh | 3bfe340 | 2016-10-18 14:25:25 -0700 | [diff] [blame] | 165 | /* Set USB2/USB3 wake enable bitmaps. */ |
| 166 | gnvs->u2we = config->usb2_wake_enable_bitmap; |
| 167 | gnvs->u3we = config->usb3_wake_enable_bitmap; |
Pratik Prajapati | 418535e | 2017-10-11 16:12:21 -0700 | [diff] [blame] | 168 | |
Michael Niewöhner | 7736bfc | 2019-10-22 23:05:06 +0200 | [diff] [blame] | 169 | if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE)) |
Pratik Prajapati | 418535e | 2017-10-11 16:12:21 -0700 | [diff] [blame] | 170 | sgx_fill_gnvs(gnvs); |
Subrata Banik | b6df6b0 | 2020-01-03 15:29:02 +0530 | [diff] [blame] | 171 | |
| 172 | /* Fill in Above 4GB MMIO resource */ |
| 173 | sa_fill_gnvs(gnvs); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 174 | } |
| 175 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 176 | unsigned long acpi_fill_mcfg(unsigned long current) |
| 177 | { |
| 178 | current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, |
Duncan Laurie | 50f06a1 | 2018-03-02 14:56:38 -0800 | [diff] [blame] | 179 | CONFIG_MMCONF_BASE_ADDRESS, 0, 0, |
Angel Pons | 9849488 | 2021-01-29 11:35:16 +0100 | [diff] [blame] | 180 | CONFIG_MMCONF_BUS_NUMBER - 1); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 181 | return current; |
| 182 | } |
| 183 | |
Duncan Laurie | db54a67 | 2015-09-04 14:19:35 -0700 | [diff] [blame] | 184 | unsigned long acpi_fill_madt(unsigned long current) |
| 185 | { |
| 186 | /* Local APICs */ |
| 187 | current = acpi_create_madt_lapics(current); |
| 188 | |
| 189 | /* IOAPIC */ |
| 190 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, |
| 191 | 2, IO_APIC_ADDR, 0); |
| 192 | |
| 193 | return acpi_madt_irq_overrides(current); |
| 194 | } |
| 195 | |
Jacob Garber | 9172b69 | 2019-06-26 16:18:16 -0600 | [diff] [blame] | 196 | static void write_c_state_entries(acpi_cstate_t *map, const int *set, size_t max_c_state) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 197 | { |
Jacob Garber | 9172b69 | 2019-06-26 16:18:16 -0600 | [diff] [blame] | 198 | for (size_t i = 0; i < max_c_state; i++) { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 199 | memcpy(&map[i], &cstate_map[set[i]], sizeof(acpi_cstate_t)); |
| 200 | map[i].ctype = i + 1; |
| 201 | } |
| 202 | |
| 203 | /* Generate C-state tables */ |
Jacob Garber | 9172b69 | 2019-06-26 16:18:16 -0600 | [diff] [blame] | 204 | acpigen_write_CST_package(map, max_c_state); |
| 205 | } |
| 206 | |
| 207 | static void generate_c_state_entries(int s0ix_enable) |
| 208 | { |
| 209 | if (s0ix_enable) { |
| 210 | acpi_cstate_t map[ARRAY_SIZE(cstate_set_s0ix)]; |
| 211 | write_c_state_entries(map, cstate_set_s0ix, ARRAY_SIZE(map)); |
| 212 | } else { |
| 213 | acpi_cstate_t map[ARRAY_SIZE(cstate_set_non_s0ix)]; |
| 214 | write_c_state_entries(map, cstate_set_non_s0ix, ARRAY_SIZE(map)); |
| 215 | } |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 216 | } |
| 217 | |
| 218 | static int calculate_power(int tdp, int p1_ratio, int ratio) |
| 219 | { |
| 220 | u32 m; |
| 221 | u32 power; |
| 222 | |
| 223 | /* |
| 224 | * M = ((1.1 - ((p1_ratio - ratio) * 0.00625)) / 1.1) ^ 2 |
| 225 | * |
| 226 | * Power = (ratio / p1_ratio) * m * tdp |
| 227 | */ |
| 228 | |
| 229 | m = (110000 - ((p1_ratio - ratio) * 625)) / 11; |
| 230 | m = (m * m) / 1000; |
| 231 | |
| 232 | power = ((ratio * 100000 / p1_ratio) / 100); |
| 233 | power *= (m / 100) * (tdp / 1000); |
| 234 | power /= 1000; |
| 235 | |
| 236 | return (int)power; |
| 237 | } |
| 238 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 239 | static void generate_p_state_entries(int core, int cores_per_package) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 240 | { |
| 241 | int ratio_min, ratio_max, ratio_turbo, ratio_step; |
| 242 | int coord_type, power_max, power_unit, num_entries; |
| 243 | int ratio, power, clock, clock_max; |
| 244 | msr_t msr; |
| 245 | |
| 246 | /* Determine P-state coordination type from MISC_PWR_MGMT[0] */ |
| 247 | msr = rdmsr(MSR_MISC_PWR_MGMT); |
| 248 | if (msr.lo & MISC_PWR_MGMT_EIST_HW_DIS) |
| 249 | coord_type = SW_ANY; |
| 250 | else |
| 251 | coord_type = HW_ALL; |
| 252 | |
| 253 | /* Get bus ratio limits and calculate clock speeds */ |
| 254 | msr = rdmsr(MSR_PLATFORM_INFO); |
| 255 | ratio_min = (msr.hi >> (40-32)) & 0xff; /* Max Efficiency Ratio */ |
| 256 | |
| 257 | /* Determine if this CPU has configurable TDP */ |
| 258 | if (cpu_config_tdp_levels()) { |
| 259 | /* Set max ratio to nominal TDP ratio */ |
| 260 | msr = rdmsr(MSR_CONFIG_TDP_NOMINAL); |
| 261 | ratio_max = msr.lo & 0xff; |
| 262 | } else { |
| 263 | /* Max Non-Turbo Ratio */ |
| 264 | ratio_max = (msr.lo >> 8) & 0xff; |
| 265 | } |
Aamir Bohra | 1041d39 | 2017-06-02 11:56:14 +0530 | [diff] [blame] | 266 | clock_max = ratio_max * CONFIG_CPU_BCLK_MHZ; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 267 | |
| 268 | /* Calculate CPU TDP in mW */ |
| 269 | msr = rdmsr(MSR_PKG_POWER_SKU_UNIT); |
| 270 | power_unit = 2 << ((msr.lo & 0xf) - 1); |
| 271 | msr = rdmsr(MSR_PKG_POWER_SKU); |
| 272 | power_max = ((msr.lo & 0x7fff) / power_unit) * 1000; |
| 273 | |
| 274 | /* Write _PCT indicating use of FFixedHW */ |
| 275 | acpigen_write_empty_PCT(); |
| 276 | |
| 277 | /* Write _PPC with no limit on supported P-state */ |
| 278 | acpigen_write_PPC_NVS(); |
| 279 | |
| 280 | /* Write PSD indicating configured coordination type */ |
| 281 | acpigen_write_PSD_package(core, 1, coord_type); |
| 282 | |
| 283 | /* Add P-state entries in _PSS table */ |
| 284 | acpigen_write_name("_PSS"); |
| 285 | |
| 286 | /* Determine ratio points */ |
| 287 | ratio_step = PSS_RATIO_STEP; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 288 | num_entries = ((ratio_max - ratio_min) / ratio_step) + 1; |
| 289 | if (num_entries > PSS_MAX_ENTRIES) { |
| 290 | ratio_step += 1; |
| 291 | num_entries = ((ratio_max - ratio_min) / ratio_step) + 1; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 292 | } |
| 293 | |
| 294 | /* P[T] is Turbo state if enabled */ |
| 295 | if (get_turbo_state() == TURBO_ENABLED) { |
| 296 | /* _PSS package count including Turbo */ |
| 297 | acpigen_write_package(num_entries + 2); |
| 298 | |
| 299 | msr = rdmsr(MSR_TURBO_RATIO_LIMIT); |
| 300 | ratio_turbo = msr.lo & 0xff; |
| 301 | |
| 302 | /* Add entry for Turbo ratio */ |
| 303 | acpigen_write_PSS_package( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 304 | clock_max + 1, /* MHz */ |
| 305 | power_max, /* mW */ |
| 306 | PSS_LATENCY_TRANSITION, /* lat1 */ |
| 307 | PSS_LATENCY_BUSMASTER, /* lat2 */ |
| 308 | ratio_turbo << 8, /* control */ |
| 309 | ratio_turbo << 8); /* status */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 310 | } else { |
| 311 | /* _PSS package count without Turbo */ |
| 312 | acpigen_write_package(num_entries + 1); |
| 313 | } |
| 314 | |
| 315 | /* First regular entry is max non-turbo ratio */ |
| 316 | acpigen_write_PSS_package( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 317 | clock_max, /* MHz */ |
| 318 | power_max, /* mW */ |
| 319 | PSS_LATENCY_TRANSITION, /* lat1 */ |
| 320 | PSS_LATENCY_BUSMASTER, /* lat2 */ |
| 321 | ratio_max << 8, /* control */ |
| 322 | ratio_max << 8); /* status */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 323 | |
| 324 | /* Generate the remaining entries */ |
| 325 | for (ratio = ratio_min + ((num_entries - 1) * ratio_step); |
| 326 | ratio >= ratio_min; ratio -= ratio_step) { |
| 327 | |
| 328 | /* Calculate power at this ratio */ |
| 329 | power = calculate_power(power_max, ratio_max, ratio); |
Aamir Bohra | 1041d39 | 2017-06-02 11:56:14 +0530 | [diff] [blame] | 330 | clock = ratio * CONFIG_CPU_BCLK_MHZ; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 331 | |
| 332 | acpigen_write_PSS_package( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 333 | clock, /* MHz */ |
| 334 | power, /* mW */ |
| 335 | PSS_LATENCY_TRANSITION, /* lat1 */ |
| 336 | PSS_LATENCY_BUSMASTER, /* lat2 */ |
| 337 | ratio << 8, /* control */ |
| 338 | ratio << 8); /* status */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 339 | } |
| 340 | |
| 341 | /* Fix package length */ |
| 342 | acpigen_pop_len(); |
| 343 | } |
| 344 | |
Michael Niewöhner | b20aac0 | 2020-10-14 19:30:46 +0200 | [diff] [blame] | 345 | static void generate_cppc_entries(int core_id) |
| 346 | { |
| 347 | /* Generate GCPC table in first logical core */ |
| 348 | if (core_id == 0) { |
| 349 | struct cppc_config cppc_config; |
| 350 | cpu_init_cppc_config(&cppc_config, CPPC_VERSION_2); |
| 351 | acpigen_write_CPPC_package(&cppc_config); |
| 352 | } |
| 353 | |
| 354 | /* Write _CST entry for each logical core */ |
| 355 | acpigen_write_CPPC_method(); |
| 356 | } |
| 357 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 358 | void generate_cpu_entries(const struct device *device) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 359 | { |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 360 | int core_id, cpu_id, pcontrol_blk = ACPI_BASE_ADDRESS, plen = 6; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 361 | int totalcores = dev_count_cpu(); |
| 362 | int cores_per_package = get_cores_per_package(); |
| 363 | int numcpus = totalcores/cores_per_package; |
Kyösti Mälkki | d5f645c | 2019-09-28 00:20:27 +0300 | [diff] [blame] | 364 | config_t *config = config_of_soc(); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 365 | int is_s0ix_enable = config->s0ix_enable; |
Michael Niewöhner | b20aac0 | 2020-10-14 19:30:46 +0200 | [diff] [blame] | 366 | const bool isst_supported = cpuid_eax(6) & CPUID_6_EAX_ISST; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 367 | |
| 368 | printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", |
| 369 | numcpus, cores_per_package); |
| 370 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 371 | for (cpu_id = 0; cpu_id < numcpus; cpu_id++) { |
| 372 | for (core_id = 0; core_id < cores_per_package; core_id++) { |
| 373 | if (core_id > 0) { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 374 | pcontrol_blk = 0; |
| 375 | plen = 0; |
| 376 | } |
| 377 | |
Christian Walter | be3979c | 2019-12-18 15:07:59 +0100 | [diff] [blame] | 378 | /* Generate processor \_SB.CPUx */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 379 | acpigen_write_processor( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 380 | cpu_id*cores_per_package+core_id, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 381 | pcontrol_blk, plen); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 382 | /* Generate C-state tables */ |
Jacob Garber | 9172b69 | 2019-06-26 16:18:16 -0600 | [diff] [blame] | 383 | generate_c_state_entries(is_s0ix_enable); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 384 | |
Matt Delco | 9084c3c | 2018-07-27 14:17:29 -0700 | [diff] [blame] | 385 | if (config->eist_enable) { |
Subrata Banik | 6b45ee4 | 2017-05-12 11:43:57 +0530 | [diff] [blame] | 386 | /* Generate P-state tables */ |
| 387 | generate_p_state_entries(core_id, |
| 388 | cores_per_package); |
Matt Delco | 9084c3c | 2018-07-27 14:17:29 -0700 | [diff] [blame] | 389 | } |
Michael Niewöhner | 30c5d21 | 2020-08-03 15:01:18 +0200 | [diff] [blame] | 390 | |
Michael Niewöhner | b20aac0 | 2020-10-14 19:30:46 +0200 | [diff] [blame] | 391 | if (isst_supported) |
| 392 | generate_cppc_entries(core_id); |
Michael Niewöhner | 30c5d21 | 2020-08-03 15:01:18 +0200 | [diff] [blame] | 393 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 394 | acpigen_pop_len(); |
| 395 | } |
| 396 | } |
Arthur Heymans | 8afc135 | 2018-11-28 12:07:19 +0100 | [diff] [blame] | 397 | |
| 398 | /* PPKG is usually used for thermal management |
| 399 | of the first and only package. */ |
| 400 | acpigen_write_processor_package("PPKG", 0, cores_per_package); |
| 401 | |
| 402 | /* Add a method to notify processor nodes */ |
| 403 | acpigen_write_processor_cnot(cores_per_package); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 404 | } |
| 405 | |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 406 | static unsigned long acpi_fill_dmar(unsigned long current) |
| 407 | { |
Kyösti Mälkki | 903b40a | 2019-07-03 07:25:59 +0300 | [diff] [blame] | 408 | struct device *const igfx_dev = pcidev_path_on_root(SA_DEVFN_IGD); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 409 | const u32 gfx_vtbar = MCHBAR32(GFXVTBAR) & ~0xfff; |
| 410 | const bool gfxvten = MCHBAR32(GFXVTBAR) & 1; |
| 411 | |
| 412 | /* iGFX has to be enabled, GFXVTBAR set and in 32-bit space. */ |
Angel Pons | 96a8013 | 2020-08-03 12:29:41 +0200 | [diff] [blame] | 413 | const bool emit_igd = |
| 414 | igfx_dev && igfx_dev->enabled && |
| 415 | gfx_vtbar && gfxvten && |
| 416 | !MCHBAR32(GFXVTBAR + 4); |
| 417 | |
| 418 | /* First, add DRHD entries */ |
| 419 | if (emit_igd) { |
| 420 | const unsigned long tmp = current; |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 421 | |
| 422 | current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar); |
Matt DeVillier | 7866d49 | 2018-03-29 14:59:57 +0200 | [diff] [blame] | 423 | current += acpi_create_dmar_ds_pci(current, 0, 2, 0); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 424 | |
| 425 | acpi_dmar_drhd_fixup(tmp, current); |
| 426 | } |
| 427 | |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 428 | const u32 vtvc0bar = MCHBAR32(VTVC0BAR) & ~0xfff; |
| 429 | const bool vtvc0en = MCHBAR32(VTVC0BAR) & 1; |
| 430 | |
| 431 | /* General VTBAR has to be set and in 32-bit space. */ |
Angel Pons | ef879a8 | 2019-08-30 19:42:23 +0200 | [diff] [blame] | 432 | if (vtvc0bar && vtvc0en && !MCHBAR32(VTVC0BAR + 4)) { |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 433 | const unsigned long tmp = current; |
| 434 | |
Angel Pons | ef879a8 | 2019-08-30 19:42:23 +0200 | [diff] [blame] | 435 | current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 436 | |
Angel Pons | ef879a8 | 2019-08-30 19:42:23 +0200 | [diff] [blame] | 437 | current += acpi_create_dmar_ds_ioapic(current, 2, V_P2SB_IBDF_BUS, |
| 438 | V_P2SB_IBDF_DEV, V_P2SB_IBDF_FUN); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 439 | |
Angel Pons | ef879a8 | 2019-08-30 19:42:23 +0200 | [diff] [blame] | 440 | current += acpi_create_dmar_ds_msi_hpet(current, 0, V_P2SB_HBDF_BUS, |
| 441 | V_P2SB_HBDF_DEV, V_P2SB_HBDF_FUN); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 442 | |
| 443 | acpi_dmar_drhd_fixup(tmp, current); |
| 444 | } |
| 445 | |
Angel Pons | 96a8013 | 2020-08-03 12:29:41 +0200 | [diff] [blame] | 446 | /* Then, add RMRR entries after all DRHD entries */ |
| 447 | if (emit_igd) { |
| 448 | const unsigned long tmp = current; |
| 449 | |
| 450 | current += acpi_create_dmar_rmrr(current, 0, |
| 451 | sa_get_gsm_base(), sa_get_tolud_base() - 1); |
| 452 | current += acpi_create_dmar_ds_pci(current, 0, 2, 0); |
| 453 | acpi_dmar_rmrr_fixup(tmp, current); |
| 454 | } |
| 455 | |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 456 | return current; |
| 457 | } |
| 458 | |
Furquan Shaikh | 0f007d8 | 2020-04-24 06:41:18 -0700 | [diff] [blame] | 459 | unsigned long northbridge_write_acpi_tables(const struct device *const dev, |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 460 | unsigned long current, |
| 461 | struct acpi_rsdp *const rsdp) |
| 462 | { |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 463 | acpi_dmar_t *const dmar = (acpi_dmar_t *)current; |
| 464 | |
| 465 | /* Create DMAR table only if we have VT-d capability. */ |
Angel Pons | 00f53a8 | 2021-04-05 12:03:08 +0200 | [diff] [blame] | 466 | if (!soc_is_vtd_capable()) |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 467 | return current; |
| 468 | |
| 469 | printk(BIOS_DEBUG, "ACPI: * DMAR\n"); |
| 470 | acpi_create_dmar(dmar, DMAR_INTR_REMAP, acpi_fill_dmar); |
| 471 | current += dmar->header.length; |
| 472 | current = acpi_align_current(current); |
| 473 | acpi_add_table(rsdp, dmar); |
| 474 | |
| 475 | return current; |
| 476 | } |
| 477 | |
Angel Pons | e4844ce | 2021-04-17 12:49:08 +0200 | [diff] [blame^] | 478 | int acpi_sci_irq(void) |
| 479 | { |
| 480 | int scis = pci_read_config32(PCH_DEV_PMC, ACTL) & SCI_IRQ_SEL; |
| 481 | int sci_irq = 9; |
| 482 | |
| 483 | /* Determine how SCI is routed. */ |
| 484 | switch (scis) { |
| 485 | case SCIS_IRQ9: |
| 486 | case SCIS_IRQ10: |
| 487 | case SCIS_IRQ11: |
| 488 | sci_irq = scis - SCIS_IRQ9 + 9; |
| 489 | break; |
| 490 | case SCIS_IRQ20: |
| 491 | case SCIS_IRQ21: |
| 492 | case SCIS_IRQ22: |
| 493 | case SCIS_IRQ23: |
| 494 | sci_irq = scis - SCIS_IRQ20 + 20; |
| 495 | break; |
| 496 | default: |
| 497 | printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n"); |
| 498 | sci_irq = 9; |
| 499 | break; |
| 500 | } |
| 501 | |
| 502 | printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq); |
| 503 | return sci_irq; |
| 504 | } |
| 505 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 506 | unsigned long acpi_madt_irq_overrides(unsigned long current) |
| 507 | { |
| 508 | int sci = acpi_sci_irq(); |
| 509 | acpi_madt_irqoverride_t *irqovr; |
| 510 | uint16_t flags = MP_IRQ_TRIGGER_LEVEL; |
| 511 | |
| 512 | /* INT_SRC_OVR */ |
| 513 | irqovr = (void *)current; |
| 514 | current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0); |
| 515 | |
| 516 | if (sci >= 20) |
| 517 | flags |= MP_IRQ_POLARITY_LOW; |
| 518 | else |
| 519 | flags |= MP_IRQ_POLARITY_HIGH; |
| 520 | |
| 521 | /* SCI */ |
| 522 | irqovr = (void *)current; |
| 523 | current += acpi_create_madt_irqoverride(irqovr, 0, sci, sci, flags); |
| 524 | |
Michael Niewöhner | 14512f9 | 2020-11-23 15:53:28 +0100 | [diff] [blame] | 525 | /* NMI */ |
| 526 | current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 5, 1); |
| 527 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 528 | return current; |
| 529 | } |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 530 | |
Furquan Shaikh | 0f007d8 | 2020-04-24 06:41:18 -0700 | [diff] [blame] | 531 | unsigned long southbridge_write_acpi_tables(const struct device *device, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 532 | unsigned long current, |
| 533 | struct acpi_rsdp *rsdp) |
| 534 | { |
Duncan Laurie | 93bbd41 | 2017-11-11 20:03:29 -0800 | [diff] [blame] | 535 | current = acpi_write_dbg2_pci_uart(rsdp, current, |
Subrata Banik | afa07f7 | 2018-05-24 12:21:06 +0530 | [diff] [blame] | 536 | uart_get_device(), |
Duncan Laurie | 93bbd41 | 2017-11-11 20:03:29 -0800 | [diff] [blame] | 537 | ACPI_ACCESS_SIZE_DWORD_ACCESS); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 538 | current = acpi_write_hpet(device, current, rsdp); |
Aaron Durbin | 07a1b28 | 2015-12-10 17:07:38 -0600 | [diff] [blame] | 539 | return acpi_align_current(current); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 540 | } |
| 541 | |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 542 | /* Save wake source information for calculating ACPI _SWS values */ |
Kyösti Mälkki | f67e6751 | 2021-01-22 19:59:07 +0200 | [diff] [blame] | 543 | int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0) |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 544 | { |
Kyösti Mälkki | d5f645c | 2019-09-28 00:20:27 +0300 | [diff] [blame] | 545 | const struct soc_intel_skylake_config *config = config_of_soc(); |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 546 | static uint32_t gpe0_sts[GPE0_REG_MAX]; |
| 547 | uint32_t pm1_en; |
Duncan Laurie | 95f9020 | 2016-10-25 20:07:22 -0700 | [diff] [blame] | 548 | uint32_t gpe0_std; |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 549 | int i; |
Aaron Durbin | 64606ce | 2016-10-27 09:53:17 -0500 | [diff] [blame] | 550 | const int last_index = GPE0_REG_MAX - 1; |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 551 | |
Duncan Laurie | 95f9020 | 2016-10-25 20:07:22 -0700 | [diff] [blame] | 552 | pm1_en = ps->pm1_en; |
| 553 | gpe0_std = ps->gpe0_en[3]; |
| 554 | |
| 555 | /* |
| 556 | * Chipset state in the suspend well (but not RTC) is lost in Deep S3 |
| 557 | * so enable Deep S3 wake events that are configured by the mainboard |
| 558 | */ |
Duncan Laurie | 1fe32d6 | 2017-04-10 21:02:13 -0700 | [diff] [blame] | 559 | if (ps->prev_sleep_state == ACPI_S3 && |
| 560 | (config->deep_s3_enable_ac || config->deep_s3_enable_dc)) { |
Duncan Laurie | 95f9020 | 2016-10-25 20:07:22 -0700 | [diff] [blame] | 561 | pm1_en |= PWRBTN_STS; /* Always enabled as wake source */ |
| 562 | if (config->deep_sx_config & DSX_EN_LAN_WAKE_PIN) |
| 563 | gpe0_std |= LAN_WAK_EN; |
| 564 | if (config->deep_sx_config & DSX_EN_WAKE_PIN) |
| 565 | pm1_en |= PCIEXPWAK_STS; |
| 566 | } |
| 567 | |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 568 | *pm1 = ps->pm1_sts & pm1_en; |
| 569 | |
| 570 | /* Mask off GPE0 status bits that are not enabled */ |
| 571 | *gpe0 = &gpe0_sts[0]; |
Aaron Durbin | 64606ce | 2016-10-27 09:53:17 -0500 | [diff] [blame] | 572 | for (i = 0; i < last_index; i++) |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 573 | gpe0_sts[i] = ps->gpe0_sts[i] & ps->gpe0_en[i]; |
Aaron Durbin | 64606ce | 2016-10-27 09:53:17 -0500 | [diff] [blame] | 574 | gpe0_sts[last_index] = ps->gpe0_sts[last_index] & gpe0_std; |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 575 | |
| 576 | return GPE0_REG_MAX; |
| 577 | } |