Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2009 coresystems GmbH |
| 5 | * Copyright (C) 2014 Google Inc. |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 6 | * Copyright (C) 2015 Intel Corporation. |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #include <arch/acpi.h> |
| 19 | #include <arch/acpigen.h> |
robbie zhang | b45dde0 | 2015-10-01 17:21:33 -0700 | [diff] [blame] | 20 | #include <arch/cpu.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 21 | #include <arch/io.h> |
Duncan Laurie | db54a67 | 2015-09-04 14:19:35 -0700 | [diff] [blame] | 22 | #include <arch/ioapic.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 23 | #include <arch/smp/mpspec.h> |
| 24 | #include <cbmem.h> |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 25 | #include <chip.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 26 | #include <console/console.h> |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 27 | #include <cpu/cpu.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 28 | #include <cpu/x86/smm.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 29 | #include <cpu/x86/msr.h> |
| 30 | #include <cpu/x86/tsc.h> |
| 31 | #include <cpu/intel/turbo.h> |
| 32 | #include <ec/google/chromeec/ec.h> |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 33 | #include <soc/intel/common/acpi.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 34 | #include <soc/acpi.h> |
| 35 | #include <soc/cpu.h> |
| 36 | #include <soc/iomap.h> |
| 37 | #include <soc/lpc.h> |
| 38 | #include <soc/msr.h> |
| 39 | #include <soc/pci_devs.h> |
| 40 | #include <soc/pm.h> |
robbie zhang | b45dde0 | 2015-10-01 17:21:33 -0700 | [diff] [blame] | 41 | #include <string.h> |
| 42 | #include <types.h> |
| 43 | #include <vendorcode/google/chromeos/gnvs.h> |
Duncan Laurie | 3d3b76b | 2016-02-25 08:45:43 -0800 | [diff] [blame^] | 44 | #include <wrdd.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 45 | |
| 46 | /* |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 47 | * List of suported C-states in this processor. |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 48 | */ |
| 49 | enum { |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 50 | C_STATE_C0, /* 0 */ |
| 51 | C_STATE_C1, /* 1 */ |
| 52 | C_STATE_C1E, /* 2 */ |
| 53 | C_STATE_C3, /* 3 */ |
| 54 | C_STATE_C6_SHORT_LAT, /* 4 */ |
| 55 | C_STATE_C6_LONG_LAT, /* 5 */ |
| 56 | C_STATE_C7_SHORT_LAT, /* 6 */ |
| 57 | C_STATE_C7_LONG_LAT, /* 7 */ |
| 58 | C_STATE_C7S_SHORT_LAT, /* 8 */ |
| 59 | C_STATE_C7S_LONG_LAT, /* 9 */ |
| 60 | C_STATE_C8, /* 10 */ |
| 61 | C_STATE_C9, /* 11 */ |
| 62 | C_STATE_C10, /* 12 */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 63 | NUM_C_STATES |
| 64 | }; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 65 | #define MWAIT_RES(state, sub_state) \ |
| 66 | { \ |
| 67 | .addrl = (((state) << 4) | (sub_state)), \ |
| 68 | .space_id = ACPI_ADDRESS_SPACE_FIXED, \ |
| 69 | .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \ |
| 70 | .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \ |
| 71 | .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 72 | } |
| 73 | |
| 74 | static acpi_cstate_t cstate_map[NUM_C_STATES] = { |
| 75 | [C_STATE_C0] = { }, |
| 76 | [C_STATE_C1] = { |
| 77 | .latency = 0, |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 78 | .power = C1_POWER, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 79 | .resource = MWAIT_RES(0, 0), |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 80 | }, |
| 81 | [C_STATE_C1E] = { |
| 82 | .latency = 0, |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 83 | .power = C1_POWER, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 84 | .resource = MWAIT_RES(0, 1), |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 85 | }, |
| 86 | [C_STATE_C3] = { |
| 87 | .latency = C_STATE_LATENCY_FROM_LAT_REG(0), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 88 | .power = C3_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 89 | .resource = MWAIT_RES(1, 0), |
| 90 | }, |
| 91 | [C_STATE_C6_SHORT_LAT] = { |
| 92 | .latency = C_STATE_LATENCY_FROM_LAT_REG(1), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 93 | .power = C6_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 94 | .resource = MWAIT_RES(2, 0), |
| 95 | }, |
| 96 | [C_STATE_C6_LONG_LAT] = { |
| 97 | .latency = C_STATE_LATENCY_FROM_LAT_REG(2), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 98 | .power = C6_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 99 | .resource = MWAIT_RES(2, 1), |
| 100 | }, |
| 101 | [C_STATE_C7_SHORT_LAT] = { |
| 102 | .latency = C_STATE_LATENCY_FROM_LAT_REG(1), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 103 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 104 | .resource = MWAIT_RES(3, 0), |
| 105 | }, |
| 106 | [C_STATE_C7_LONG_LAT] = { |
| 107 | .latency = C_STATE_LATENCY_FROM_LAT_REG(2), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 108 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 109 | .resource = MWAIT_RES(3, 1), |
| 110 | }, |
| 111 | [C_STATE_C7S_SHORT_LAT] = { |
| 112 | .latency = C_STATE_LATENCY_FROM_LAT_REG(1), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 113 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 114 | .resource = MWAIT_RES(3, 2), |
| 115 | }, |
| 116 | [C_STATE_C7S_LONG_LAT] = { |
| 117 | .latency = C_STATE_LATENCY_FROM_LAT_REG(2), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 118 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 119 | .resource = MWAIT_RES(3, 3), |
| 120 | }, |
| 121 | [C_STATE_C8] = { |
| 122 | .latency = C_STATE_LATENCY_FROM_LAT_REG(3), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 123 | .power = C8_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 124 | .resource = MWAIT_RES(4, 0), |
| 125 | }, |
| 126 | [C_STATE_C9] = { |
| 127 | .latency = C_STATE_LATENCY_FROM_LAT_REG(4), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 128 | .power = C9_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 129 | .resource = MWAIT_RES(5, 0), |
| 130 | }, |
| 131 | [C_STATE_C10] = { |
| 132 | .latency = C_STATE_LATENCY_FROM_LAT_REG(5), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 133 | .power = C10_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 134 | .resource = MWAIT_RES(6, 0), |
| 135 | }, |
| 136 | }; |
| 137 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 138 | static int cstate_set_s0ix[] = { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 139 | C_STATE_C1E, |
| 140 | C_STATE_C7S_LONG_LAT, |
| 141 | C_STATE_C10 |
| 142 | }; |
| 143 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 144 | static int cstate_set_non_s0ix[] = { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 145 | C_STATE_C1E, |
| 146 | C_STATE_C3, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 147 | C_STATE_C7S_LONG_LAT, |
| 148 | C_STATE_C8, |
| 149 | C_STATE_C9, |
| 150 | C_STATE_C10 |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 151 | }; |
| 152 | |
| 153 | static int get_cores_per_package(void) |
| 154 | { |
| 155 | struct cpuinfo_x86 c; |
| 156 | struct cpuid_result result; |
| 157 | int cores = 1; |
| 158 | |
| 159 | get_fms(&c, cpuid_eax(1)); |
| 160 | if (c.x86 != 6) |
| 161 | return 1; |
| 162 | |
| 163 | result = cpuid_ext(0xb, 1); |
| 164 | cores = result.ebx & 0xff; |
| 165 | |
| 166 | return cores; |
| 167 | } |
| 168 | |
Duncan Laurie | db54a67 | 2015-09-04 14:19:35 -0700 | [diff] [blame] | 169 | static void acpi_create_gnvs(global_nvs_t *gnvs) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 170 | { |
Duncan Laurie | 7fce30c | 2015-09-04 13:53:14 -0700 | [diff] [blame] | 171 | const struct device *dev = dev_find_slot(0, PCH_DEVFN_LPC); |
| 172 | const struct soc_intel_skylake_config *config = dev->chip_info; |
| 173 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 174 | /* Set unknown wake source */ |
| 175 | gnvs->pm1i = -1; |
| 176 | |
| 177 | /* CPU core count */ |
| 178 | gnvs->pcnt = dev_count_cpu(); |
| 179 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 180 | #if IS_ENABLED(CONFIG_CONSOLE_CBMEM) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 181 | /* Update the mem console pointer. */ |
| 182 | gnvs->cbmc = (u32)cbmem_find(CBMEM_ID_CONSOLE); |
| 183 | #endif |
| 184 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 185 | #if IS_ENABLED(CONFIG_CHROMEOS) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 186 | /* Initialize Verified Boot data */ |
| 187 | chromeos_init_vboot(&(gnvs->chromeos)); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 188 | #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 189 | gnvs->chromeos.vbt2 = google_ec_running_ro() ? |
| 190 | ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; |
| 191 | #endif |
| 192 | gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; |
| 193 | #endif |
Duncan Laurie | 7fce30c | 2015-09-04 13:53:14 -0700 | [diff] [blame] | 194 | |
| 195 | /* Enable DPTF based on mainboard configuration */ |
| 196 | gnvs->dpte = config->dptf_enable; |
Duncan Laurie | 3d3b76b | 2016-02-25 08:45:43 -0800 | [diff] [blame^] | 197 | |
| 198 | /* Fill in the Wifi Region id */ |
| 199 | gnvs->cid1 = wifi_regulatory_domain(); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 200 | } |
| 201 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 202 | unsigned long acpi_fill_mcfg(unsigned long current) |
| 203 | { |
| 204 | current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, |
| 205 | MCFG_BASE_ADDRESS, 0, 0, 255); |
| 206 | return current; |
| 207 | } |
| 208 | |
Duncan Laurie | db54a67 | 2015-09-04 14:19:35 -0700 | [diff] [blame] | 209 | unsigned long acpi_fill_madt(unsigned long current) |
| 210 | { |
| 211 | /* Local APICs */ |
| 212 | current = acpi_create_madt_lapics(current); |
| 213 | |
| 214 | /* IOAPIC */ |
| 215 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, |
| 216 | 2, IO_APIC_ADDR, 0); |
| 217 | |
| 218 | return acpi_madt_irq_overrides(current); |
| 219 | } |
| 220 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 221 | void acpi_fill_in_fadt(acpi_fadt_t *fadt) |
| 222 | { |
| 223 | const uint16_t pmbase = ACPI_BASE_ADDRESS; |
Archana Patni | 6c1bf27 | 2015-12-18 23:38:21 +0530 | [diff] [blame] | 224 | const struct device *dev = dev_find_slot(0, PCH_DEVFN_LPC); |
| 225 | config_t *config = dev->chip_info; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 226 | |
| 227 | fadt->sci_int = acpi_sci_irq(); |
| 228 | fadt->smi_cmd = APM_CNT; |
| 229 | fadt->acpi_enable = APM_CNT_ACPI_ENABLE; |
| 230 | fadt->acpi_disable = APM_CNT_ACPI_DISABLE; |
| 231 | fadt->s4bios_req = 0x0; |
| 232 | fadt->pstate_cnt = 0; |
| 233 | |
| 234 | fadt->pm1a_evt_blk = pmbase + PM1_STS; |
| 235 | fadt->pm1b_evt_blk = 0x0; |
| 236 | fadt->pm1a_cnt_blk = pmbase + PM1_CNT; |
| 237 | fadt->pm1b_cnt_blk = 0x0; |
| 238 | fadt->pm2_cnt_blk = pmbase + PM2_CNT; |
Archana Patni | 6c1bf27 | 2015-12-18 23:38:21 +0530 | [diff] [blame] | 239 | if (config->PmTimerDisabled == 0) |
| 240 | fadt->pm_tmr_blk = pmbase + PM1_TMR; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 241 | fadt->gpe0_blk = pmbase + GPE0_STS(0); |
| 242 | fadt->gpe1_blk = 0; |
| 243 | |
| 244 | fadt->pm1_evt_len = 4; |
| 245 | fadt->pm1_cnt_len = 2; |
| 246 | fadt->pm2_cnt_len = 1; |
Archana Patni | 6c1bf27 | 2015-12-18 23:38:21 +0530 | [diff] [blame] | 247 | if (config->PmTimerDisabled == 0) |
| 248 | fadt->pm_tmr_len = 4; |
Aaron Durbin | 71e0ac8 | 2015-08-07 23:00:22 -0500 | [diff] [blame] | 249 | /* There are 4 GPE0 STS/EN pairs each 32 bits wide. */ |
| 250 | fadt->gpe0_blk_len = 2 * GPE0_REG_MAX * sizeof(uint32_t); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 251 | fadt->gpe1_blk_len = 0; |
| 252 | fadt->gpe1_base = 0; |
| 253 | fadt->cst_cnt = 0; |
| 254 | fadt->p_lvl2_lat = 1; |
| 255 | fadt->p_lvl3_lat = 87; |
| 256 | fadt->flush_size = 1024; |
| 257 | fadt->flush_stride = 16; |
| 258 | fadt->duty_offset = 1; |
| 259 | fadt->duty_width = 0; |
| 260 | fadt->day_alrm = 0xd; |
| 261 | fadt->mon_alrm = 0x00; |
| 262 | fadt->century = 0x00; |
| 263 | fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; |
| 264 | |
| 265 | fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | |
| 266 | ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | |
| 267 | ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE | |
| 268 | ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK; |
| 269 | |
| 270 | fadt->reset_reg.space_id = 1; |
| 271 | fadt->reset_reg.bit_width = 8; |
| 272 | fadt->reset_reg.bit_offset = 0; |
| 273 | fadt->reset_reg.resv = 0; |
| 274 | fadt->reset_reg.addrl = 0xcf9; |
| 275 | fadt->reset_reg.addrh = 0; |
| 276 | fadt->reset_value = 6; |
| 277 | |
| 278 | fadt->x_pm1a_evt_blk.space_id = 1; |
| 279 | fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; |
| 280 | fadt->x_pm1a_evt_blk.bit_offset = 0; |
| 281 | fadt->x_pm1a_evt_blk.resv = 0; |
| 282 | fadt->x_pm1a_evt_blk.addrl = pmbase + PM1_STS; |
| 283 | fadt->x_pm1a_evt_blk.addrh = 0x0; |
| 284 | |
| 285 | fadt->x_pm1b_evt_blk.space_id = 1; |
| 286 | fadt->x_pm1b_evt_blk.bit_width = 0; |
| 287 | fadt->x_pm1b_evt_blk.bit_offset = 0; |
| 288 | fadt->x_pm1b_evt_blk.resv = 0; |
| 289 | fadt->x_pm1b_evt_blk.addrl = 0x0; |
| 290 | fadt->x_pm1b_evt_blk.addrh = 0x0; |
| 291 | |
| 292 | fadt->x_pm1a_cnt_blk.space_id = 1; |
| 293 | fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; |
| 294 | fadt->x_pm1a_cnt_blk.bit_offset = 0; |
| 295 | fadt->x_pm1a_cnt_blk.resv = 0; |
| 296 | fadt->x_pm1a_cnt_blk.addrl = pmbase + PM1_CNT; |
| 297 | fadt->x_pm1a_cnt_blk.addrh = 0x0; |
| 298 | |
| 299 | fadt->x_pm1b_cnt_blk.space_id = 1; |
| 300 | fadt->x_pm1b_cnt_blk.bit_width = 0; |
| 301 | fadt->x_pm1b_cnt_blk.bit_offset = 0; |
| 302 | fadt->x_pm1b_cnt_blk.resv = 0; |
| 303 | fadt->x_pm1b_cnt_blk.addrl = 0x0; |
| 304 | fadt->x_pm1b_cnt_blk.addrh = 0x0; |
| 305 | |
| 306 | fadt->x_pm2_cnt_blk.space_id = 1; |
| 307 | fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8; |
| 308 | fadt->x_pm2_cnt_blk.bit_offset = 0; |
| 309 | fadt->x_pm2_cnt_blk.resv = 0; |
| 310 | fadt->x_pm2_cnt_blk.addrl = pmbase + PM2_CNT; |
| 311 | fadt->x_pm2_cnt_blk.addrh = 0x0; |
| 312 | |
Archana Patni | 6c1bf27 | 2015-12-18 23:38:21 +0530 | [diff] [blame] | 313 | if (config->PmTimerDisabled == 0) { |
| 314 | fadt->x_pm_tmr_blk.space_id = 1; |
| 315 | fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; |
| 316 | fadt->x_pm_tmr_blk.bit_offset = 0; |
| 317 | fadt->x_pm_tmr_blk.resv = 0; |
| 318 | fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; |
| 319 | fadt->x_pm_tmr_blk.addrh = 0x0; |
| 320 | } |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 321 | |
| 322 | fadt->x_gpe0_blk.space_id = 0; |
| 323 | fadt->x_gpe0_blk.bit_width = 0; |
| 324 | fadt->x_gpe0_blk.bit_offset = 0; |
| 325 | fadt->x_gpe0_blk.resv = 0; |
| 326 | fadt->x_gpe0_blk.addrl = 0; |
| 327 | fadt->x_gpe0_blk.addrh = 0; |
| 328 | |
| 329 | fadt->x_gpe1_blk.space_id = 1; |
| 330 | fadt->x_gpe1_blk.bit_width = 0; |
| 331 | fadt->x_gpe1_blk.bit_offset = 0; |
| 332 | fadt->x_gpe1_blk.resv = 0; |
| 333 | fadt->x_gpe1_blk.addrl = 0x0; |
| 334 | fadt->x_gpe1_blk.addrh = 0x0; |
| 335 | } |
| 336 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 337 | static void generate_c_state_entries(int s0ix_enable, int max_cstate) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 338 | { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 339 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 340 | acpi_cstate_t map[max_cstate]; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 341 | int *set; |
| 342 | int i; |
| 343 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 344 | if (s0ix_enable) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 345 | set = cstate_set_s0ix; |
| 346 | else |
| 347 | set = cstate_set_non_s0ix; |
| 348 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 349 | for (i = 0; i < max_cstate; i++) { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 350 | memcpy(&map[i], &cstate_map[set[i]], sizeof(acpi_cstate_t)); |
| 351 | map[i].ctype = i + 1; |
| 352 | } |
| 353 | |
| 354 | /* Generate C-state tables */ |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 355 | acpigen_write_CST_package(map, ARRAY_SIZE(map)); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 356 | } |
| 357 | |
| 358 | static int calculate_power(int tdp, int p1_ratio, int ratio) |
| 359 | { |
| 360 | u32 m; |
| 361 | u32 power; |
| 362 | |
| 363 | /* |
| 364 | * M = ((1.1 - ((p1_ratio - ratio) * 0.00625)) / 1.1) ^ 2 |
| 365 | * |
| 366 | * Power = (ratio / p1_ratio) * m * tdp |
| 367 | */ |
| 368 | |
| 369 | m = (110000 - ((p1_ratio - ratio) * 625)) / 11; |
| 370 | m = (m * m) / 1000; |
| 371 | |
| 372 | power = ((ratio * 100000 / p1_ratio) / 100); |
| 373 | power *= (m / 100) * (tdp / 1000); |
| 374 | power /= 1000; |
| 375 | |
| 376 | return (int)power; |
| 377 | } |
| 378 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 379 | static void generate_p_state_entries(int core, int cores_per_package) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 380 | { |
| 381 | int ratio_min, ratio_max, ratio_turbo, ratio_step; |
| 382 | int coord_type, power_max, power_unit, num_entries; |
| 383 | int ratio, power, clock, clock_max; |
| 384 | msr_t msr; |
| 385 | |
| 386 | /* Determine P-state coordination type from MISC_PWR_MGMT[0] */ |
| 387 | msr = rdmsr(MSR_MISC_PWR_MGMT); |
| 388 | if (msr.lo & MISC_PWR_MGMT_EIST_HW_DIS) |
| 389 | coord_type = SW_ANY; |
| 390 | else |
| 391 | coord_type = HW_ALL; |
| 392 | |
| 393 | /* Get bus ratio limits and calculate clock speeds */ |
| 394 | msr = rdmsr(MSR_PLATFORM_INFO); |
| 395 | ratio_min = (msr.hi >> (40-32)) & 0xff; /* Max Efficiency Ratio */ |
| 396 | |
| 397 | /* Determine if this CPU has configurable TDP */ |
| 398 | if (cpu_config_tdp_levels()) { |
| 399 | /* Set max ratio to nominal TDP ratio */ |
| 400 | msr = rdmsr(MSR_CONFIG_TDP_NOMINAL); |
| 401 | ratio_max = msr.lo & 0xff; |
| 402 | } else { |
| 403 | /* Max Non-Turbo Ratio */ |
| 404 | ratio_max = (msr.lo >> 8) & 0xff; |
| 405 | } |
| 406 | clock_max = ratio_max * CPU_BCLK; |
| 407 | |
| 408 | /* Calculate CPU TDP in mW */ |
| 409 | msr = rdmsr(MSR_PKG_POWER_SKU_UNIT); |
| 410 | power_unit = 2 << ((msr.lo & 0xf) - 1); |
| 411 | msr = rdmsr(MSR_PKG_POWER_SKU); |
| 412 | power_max = ((msr.lo & 0x7fff) / power_unit) * 1000; |
| 413 | |
| 414 | /* Write _PCT indicating use of FFixedHW */ |
| 415 | acpigen_write_empty_PCT(); |
| 416 | |
| 417 | /* Write _PPC with no limit on supported P-state */ |
| 418 | acpigen_write_PPC_NVS(); |
| 419 | |
| 420 | /* Write PSD indicating configured coordination type */ |
| 421 | acpigen_write_PSD_package(core, 1, coord_type); |
| 422 | |
| 423 | /* Add P-state entries in _PSS table */ |
| 424 | acpigen_write_name("_PSS"); |
| 425 | |
| 426 | /* Determine ratio points */ |
| 427 | ratio_step = PSS_RATIO_STEP; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 428 | num_entries = ((ratio_max - ratio_min) / ratio_step) + 1; |
| 429 | if (num_entries > PSS_MAX_ENTRIES) { |
| 430 | ratio_step += 1; |
| 431 | num_entries = ((ratio_max - ratio_min) / ratio_step) + 1; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 432 | } |
| 433 | |
| 434 | /* P[T] is Turbo state if enabled */ |
| 435 | if (get_turbo_state() == TURBO_ENABLED) { |
| 436 | /* _PSS package count including Turbo */ |
| 437 | acpigen_write_package(num_entries + 2); |
| 438 | |
| 439 | msr = rdmsr(MSR_TURBO_RATIO_LIMIT); |
| 440 | ratio_turbo = msr.lo & 0xff; |
| 441 | |
| 442 | /* Add entry for Turbo ratio */ |
| 443 | acpigen_write_PSS_package( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 444 | clock_max + 1, /* MHz */ |
| 445 | power_max, /* mW */ |
| 446 | PSS_LATENCY_TRANSITION, /* lat1 */ |
| 447 | PSS_LATENCY_BUSMASTER, /* lat2 */ |
| 448 | ratio_turbo << 8, /* control */ |
| 449 | ratio_turbo << 8); /* status */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 450 | } else { |
| 451 | /* _PSS package count without Turbo */ |
| 452 | acpigen_write_package(num_entries + 1); |
| 453 | } |
| 454 | |
| 455 | /* First regular entry is max non-turbo ratio */ |
| 456 | acpigen_write_PSS_package( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 457 | clock_max, /* MHz */ |
| 458 | power_max, /* mW */ |
| 459 | PSS_LATENCY_TRANSITION, /* lat1 */ |
| 460 | PSS_LATENCY_BUSMASTER, /* lat2 */ |
| 461 | ratio_max << 8, /* control */ |
| 462 | ratio_max << 8); /* status */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 463 | |
| 464 | /* Generate the remaining entries */ |
| 465 | for (ratio = ratio_min + ((num_entries - 1) * ratio_step); |
| 466 | ratio >= ratio_min; ratio -= ratio_step) { |
| 467 | |
| 468 | /* Calculate power at this ratio */ |
| 469 | power = calculate_power(power_max, ratio_max, ratio); |
| 470 | clock = ratio * CPU_BCLK; |
| 471 | |
| 472 | acpigen_write_PSS_package( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 473 | clock, /* MHz */ |
| 474 | power, /* mW */ |
| 475 | PSS_LATENCY_TRANSITION, /* lat1 */ |
| 476 | PSS_LATENCY_BUSMASTER, /* lat2 */ |
| 477 | ratio << 8, /* control */ |
| 478 | ratio << 8); /* status */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 479 | } |
| 480 | |
| 481 | /* Fix package length */ |
| 482 | acpigen_pop_len(); |
| 483 | } |
| 484 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 485 | void generate_cpu_entries(device_t device) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 486 | { |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 487 | int core_id, cpu_id, pcontrol_blk = ACPI_BASE_ADDRESS, plen = 6; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 488 | int totalcores = dev_count_cpu(); |
| 489 | int cores_per_package = get_cores_per_package(); |
| 490 | int numcpus = totalcores/cores_per_package; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 491 | device_t dev = SA_DEV_ROOT; |
| 492 | config_t *config = dev->chip_info; |
| 493 | int is_s0ix_enable = config->s0ix_enable; |
| 494 | int max_c_state; |
| 495 | |
| 496 | if (is_s0ix_enable) |
| 497 | max_c_state = ARRAY_SIZE(cstate_set_s0ix); |
| 498 | else |
| 499 | max_c_state = ARRAY_SIZE(cstate_set_non_s0ix); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 500 | |
| 501 | printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", |
| 502 | numcpus, cores_per_package); |
| 503 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 504 | for (cpu_id = 0; cpu_id < numcpus; cpu_id++) { |
| 505 | for (core_id = 0; core_id < cores_per_package; core_id++) { |
| 506 | if (core_id > 0) { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 507 | pcontrol_blk = 0; |
| 508 | plen = 0; |
| 509 | } |
| 510 | |
| 511 | /* Generate processor \_PR.CPUx */ |
| 512 | acpigen_write_processor( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 513 | cpu_id*cores_per_package+core_id, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 514 | pcontrol_blk, plen); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 515 | /* Generate C-state tables */ |
| 516 | generate_c_state_entries(is_s0ix_enable, |
| 517 | max_c_state); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 518 | |
| 519 | /* Generate P-state tables */ |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 520 | generate_p_state_entries(core_id, |
| 521 | cores_per_package); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 522 | |
| 523 | acpigen_pop_len(); |
| 524 | } |
| 525 | } |
| 526 | } |
| 527 | |
| 528 | unsigned long acpi_madt_irq_overrides(unsigned long current) |
| 529 | { |
| 530 | int sci = acpi_sci_irq(); |
| 531 | acpi_madt_irqoverride_t *irqovr; |
| 532 | uint16_t flags = MP_IRQ_TRIGGER_LEVEL; |
| 533 | |
| 534 | /* INT_SRC_OVR */ |
| 535 | irqovr = (void *)current; |
| 536 | current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0); |
| 537 | |
| 538 | if (sci >= 20) |
| 539 | flags |= MP_IRQ_POLARITY_LOW; |
| 540 | else |
| 541 | flags |= MP_IRQ_POLARITY_HIGH; |
| 542 | |
| 543 | /* SCI */ |
| 544 | irqovr = (void *)current; |
| 545 | current += acpi_create_madt_irqoverride(irqovr, 0, sci, sci, flags); |
| 546 | |
| 547 | return current; |
| 548 | } |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 549 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 550 | unsigned long southcluster_write_acpi_tables(device_t device, |
| 551 | unsigned long current, |
| 552 | struct acpi_rsdp *rsdp) |
| 553 | { |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 554 | current = acpi_write_hpet(device, current, rsdp); |
Aaron Durbin | 07a1b28 | 2015-12-10 17:07:38 -0600 | [diff] [blame] | 555 | return acpi_align_current(current); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 556 | } |
| 557 | |
| 558 | void southcluster_inject_dsdt(device_t device) |
| 559 | { |
| 560 | global_nvs_t *gnvs; |
| 561 | |
| 562 | gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); |
| 563 | if (!gnvs) { |
| 564 | gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); |
| 565 | if (gnvs) |
| 566 | memset(gnvs, 0, sizeof(*gnvs)); |
| 567 | } |
| 568 | |
| 569 | if (gnvs) { |
| 570 | acpi_create_gnvs(gnvs); |
Duncan Laurie | db54a67 | 2015-09-04 14:19:35 -0700 | [diff] [blame] | 571 | acpi_mainboard_gnvs(gnvs); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 572 | acpi_save_gnvs((unsigned long)gnvs); |
| 573 | /* And tell SMI about it */ |
| 574 | smm_setup_structures(gnvs, NULL, NULL); |
| 575 | |
| 576 | /* Add it to DSDT. */ |
| 577 | acpigen_write_scope("\\"); |
| 578 | acpigen_write_name_dword("NVSA", (u32) gnvs); |
| 579 | acpigen_pop_len(); |
| 580 | } |
| 581 | } |
| 582 | |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 583 | /* Save wake source information for calculating ACPI _SWS values */ |
| 584 | int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) |
| 585 | { |
Naresh G Solanki | a1b3547 | 2015-12-11 18:13:02 +0530 | [diff] [blame] | 586 | struct chipset_power_state *ps; |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 587 | static uint32_t gpe0_sts[GPE0_REG_MAX]; |
| 588 | uint32_t pm1_en; |
| 589 | int i; |
| 590 | |
Naresh G Solanki | a1b3547 | 2015-12-11 18:13:02 +0530 | [diff] [blame] | 591 | ps = cbmem_find(CBMEM_ID_POWER_STATE); |
| 592 | if (ps == NULL) |
| 593 | return -1; |
| 594 | |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 595 | /* PM1_EN state is lost in Deep S3 so enable basic wake events */ |
| 596 | pm1_en = ps->pm1_en | PCIEXPWAK_STS | RTC_STS | PWRBTN_STS | BM_STS; |
| 597 | *pm1 = ps->pm1_sts & pm1_en; |
| 598 | |
| 599 | /* Mask off GPE0 status bits that are not enabled */ |
| 600 | *gpe0 = &gpe0_sts[0]; |
| 601 | for (i = 0; i < GPE0_REG_MAX; i++) |
| 602 | gpe0_sts[i] = ps->gpe0_sts[i] & ps->gpe0_en[i]; |
| 603 | |
| 604 | return GPE0_REG_MAX; |
| 605 | } |
| 606 | |
Duncan Laurie | db54a67 | 2015-09-04 14:19:35 -0700 | [diff] [blame] | 607 | __attribute__((weak)) void acpi_mainboard_gnvs(global_nvs_t *gnvs) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 608 | { |
| 609 | } |