Angel Pons | 3bd1e3d | 2020-04-05 15:47:17 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Kyösti Mälkki | 0c1dd9c | 2020-06-17 23:37:49 +0300 | [diff] [blame] | 4 | #include <acpi/acpi_gnvs.h> |
Kyösti Mälkki | 2787237 | 2021-01-21 16:05:26 +0200 | [diff] [blame^] | 5 | #include <acpi/acpi_pm.h> |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 6 | #include <acpi/acpigen.h> |
robbie zhang | b45dde0 | 2015-10-01 17:21:33 -0700 | [diff] [blame] | 7 | #include <arch/cpu.h> |
Duncan Laurie | db54a67 | 2015-09-04 14:19:35 -0700 | [diff] [blame] | 8 | #include <arch/ioapic.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 9 | #include <arch/smp/mpspec.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 10 | #include <console/console.h> |
| 11 | #include <cpu/x86/smm.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 12 | #include <cpu/x86/msr.h> |
Matt Delco | 9084c3c | 2018-07-27 14:17:29 -0700 | [diff] [blame] | 13 | #include <cpu/intel/common/common.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 14 | #include <cpu/intel/turbo.h> |
Barnali Sarkar | 0a203d1 | 2017-05-04 18:02:17 +0530 | [diff] [blame] | 15 | #include <intelblocks/cpulib.h> |
Ravi Sarawadi | 1483d1f | 2017-09-28 17:06:01 -0700 | [diff] [blame] | 16 | #include <intelblocks/lpc_lib.h> |
Pratik Prajapati | 418535e | 2017-10-11 16:12:21 -0700 | [diff] [blame] | 17 | #include <intelblocks/sgx.h> |
Duncan Laurie | 93bbd41 | 2017-11-11 20:03:29 -0800 | [diff] [blame] | 18 | #include <intelblocks/uart.h> |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 19 | #include <intelblocks/systemagent.h> |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 20 | #include <soc/intel/common/acpi.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 21 | #include <soc/acpi.h> |
| 22 | #include <soc/cpu.h> |
| 23 | #include <soc/iomap.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 24 | #include <soc/msr.h> |
Kyösti Mälkki | d6c5714 | 2020-12-21 15:17:01 +0200 | [diff] [blame] | 25 | #include <soc/nvs.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 26 | #include <soc/pci_devs.h> |
| 27 | #include <soc/pm.h> |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 28 | #include <soc/ramstage.h> |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 29 | #include <soc/systemagent.h> |
robbie zhang | b45dde0 | 2015-10-01 17:21:33 -0700 | [diff] [blame] | 30 | #include <string.h> |
| 31 | #include <types.h> |
Duncan Laurie | 3d3b76b | 2016-02-25 08:45:43 -0800 | [diff] [blame] | 32 | #include <wrdd.h> |
Patrick Rudolph | e56189c | 2018-04-18 10:11:59 +0200 | [diff] [blame] | 33 | #include <device/pci_ops.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 34 | |
Elyes HAOUAS | c338507 | 2019-03-21 15:38:06 +0100 | [diff] [blame] | 35 | #include "chip.h" |
| 36 | |
Michael Niewöhner | d5a4547 | 2020-10-15 00:27:59 +0200 | [diff] [blame] | 37 | #define CPUID_6_EAX_ISST (1 << 7) |
| 38 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 39 | /* |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 40 | * List of suported C-states in this processor. |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 41 | */ |
| 42 | enum { |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 43 | C_STATE_C0, /* 0 */ |
| 44 | C_STATE_C1, /* 1 */ |
| 45 | C_STATE_C1E, /* 2 */ |
| 46 | C_STATE_C3, /* 3 */ |
| 47 | C_STATE_C6_SHORT_LAT, /* 4 */ |
| 48 | C_STATE_C6_LONG_LAT, /* 5 */ |
| 49 | C_STATE_C7_SHORT_LAT, /* 6 */ |
| 50 | C_STATE_C7_LONG_LAT, /* 7 */ |
| 51 | C_STATE_C7S_SHORT_LAT, /* 8 */ |
| 52 | C_STATE_C7S_LONG_LAT, /* 9 */ |
| 53 | C_STATE_C8, /* 10 */ |
| 54 | C_STATE_C9, /* 11 */ |
| 55 | C_STATE_C10, /* 12 */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 56 | NUM_C_STATES |
| 57 | }; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 58 | #define MWAIT_RES(state, sub_state) \ |
| 59 | { \ |
| 60 | .addrl = (((state) << 4) | (sub_state)), \ |
| 61 | .space_id = ACPI_ADDRESS_SPACE_FIXED, \ |
| 62 | .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \ |
| 63 | .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \ |
| 64 | .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | static acpi_cstate_t cstate_map[NUM_C_STATES] = { |
| 68 | [C_STATE_C0] = { }, |
| 69 | [C_STATE_C1] = { |
| 70 | .latency = 0, |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 71 | .power = C1_POWER, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 72 | .resource = MWAIT_RES(0, 0), |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 73 | }, |
| 74 | [C_STATE_C1E] = { |
| 75 | .latency = 0, |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 76 | .power = C1_POWER, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 77 | .resource = MWAIT_RES(0, 1), |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 78 | }, |
| 79 | [C_STATE_C3] = { |
| 80 | .latency = C_STATE_LATENCY_FROM_LAT_REG(0), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 81 | .power = C3_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 82 | .resource = MWAIT_RES(1, 0), |
| 83 | }, |
| 84 | [C_STATE_C6_SHORT_LAT] = { |
| 85 | .latency = C_STATE_LATENCY_FROM_LAT_REG(1), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 86 | .power = C6_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 87 | .resource = MWAIT_RES(2, 0), |
| 88 | }, |
| 89 | [C_STATE_C6_LONG_LAT] = { |
| 90 | .latency = C_STATE_LATENCY_FROM_LAT_REG(2), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 91 | .power = C6_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 92 | .resource = MWAIT_RES(2, 1), |
| 93 | }, |
| 94 | [C_STATE_C7_SHORT_LAT] = { |
| 95 | .latency = C_STATE_LATENCY_FROM_LAT_REG(1), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 96 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 97 | .resource = MWAIT_RES(3, 0), |
| 98 | }, |
| 99 | [C_STATE_C7_LONG_LAT] = { |
| 100 | .latency = C_STATE_LATENCY_FROM_LAT_REG(2), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 101 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 102 | .resource = MWAIT_RES(3, 1), |
| 103 | }, |
| 104 | [C_STATE_C7S_SHORT_LAT] = { |
| 105 | .latency = C_STATE_LATENCY_FROM_LAT_REG(1), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 106 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 107 | .resource = MWAIT_RES(3, 2), |
| 108 | }, |
| 109 | [C_STATE_C7S_LONG_LAT] = { |
| 110 | .latency = C_STATE_LATENCY_FROM_LAT_REG(2), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 111 | .power = C7_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 112 | .resource = MWAIT_RES(3, 3), |
| 113 | }, |
| 114 | [C_STATE_C8] = { |
| 115 | .latency = C_STATE_LATENCY_FROM_LAT_REG(3), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 116 | .power = C8_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 117 | .resource = MWAIT_RES(4, 0), |
| 118 | }, |
| 119 | [C_STATE_C9] = { |
| 120 | .latency = C_STATE_LATENCY_FROM_LAT_REG(4), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 121 | .power = C9_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 122 | .resource = MWAIT_RES(5, 0), |
| 123 | }, |
| 124 | [C_STATE_C10] = { |
| 125 | .latency = C_STATE_LATENCY_FROM_LAT_REG(5), |
robbie zhang | c16b1fd | 2015-09-11 14:25:15 -0700 | [diff] [blame] | 126 | .power = C10_POWER, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 127 | .resource = MWAIT_RES(6, 0), |
| 128 | }, |
| 129 | }; |
| 130 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 131 | static int cstate_set_s0ix[] = { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 132 | C_STATE_C1E, |
| 133 | C_STATE_C7S_LONG_LAT, |
| 134 | C_STATE_C10 |
| 135 | }; |
| 136 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 137 | static int cstate_set_non_s0ix[] = { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 138 | C_STATE_C1E, |
| 139 | C_STATE_C3, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 140 | C_STATE_C7S_LONG_LAT, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 141 | }; |
| 142 | |
| 143 | static int get_cores_per_package(void) |
| 144 | { |
| 145 | struct cpuinfo_x86 c; |
| 146 | struct cpuid_result result; |
| 147 | int cores = 1; |
| 148 | |
| 149 | get_fms(&c, cpuid_eax(1)); |
| 150 | if (c.x86 != 6) |
| 151 | return 1; |
| 152 | |
| 153 | result = cpuid_ext(0xb, 1); |
| 154 | cores = result.ebx & 0xff; |
| 155 | |
| 156 | return cores; |
| 157 | } |
| 158 | |
Kyösti Mälkki | c2b0a4f | 2020-06-28 22:39:59 +0300 | [diff] [blame] | 159 | void soc_fill_gnvs(struct global_nvs *gnvs) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 160 | { |
Kyösti Mälkki | d5f645c | 2019-09-28 00:20:27 +0300 | [diff] [blame] | 161 | const struct soc_intel_skylake_config *config = config_of_soc(); |
Duncan Laurie | 7fce30c | 2015-09-04 13:53:14 -0700 | [diff] [blame] | 162 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 163 | /* Set unknown wake source */ |
| 164 | gnvs->pm1i = -1; |
| 165 | |
Duncan Laurie | 7fce30c | 2015-09-04 13:53:14 -0700 | [diff] [blame] | 166 | /* Enable DPTF based on mainboard configuration */ |
| 167 | gnvs->dpte = config->dptf_enable; |
Duncan Laurie | 3d3b76b | 2016-02-25 08:45:43 -0800 | [diff] [blame] | 168 | |
| 169 | /* Fill in the Wifi Region id */ |
| 170 | gnvs->cid1 = wifi_regulatory_domain(); |
Furquan Shaikh | 3bfe340 | 2016-10-18 14:25:25 -0700 | [diff] [blame] | 171 | |
| 172 | /* Set USB2/USB3 wake enable bitmaps. */ |
| 173 | gnvs->u2we = config->usb2_wake_enable_bitmap; |
| 174 | gnvs->u3we = config->usb3_wake_enable_bitmap; |
Pratik Prajapati | 418535e | 2017-10-11 16:12:21 -0700 | [diff] [blame] | 175 | |
Michael Niewöhner | 7736bfc | 2019-10-22 23:05:06 +0200 | [diff] [blame] | 176 | if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE)) |
Pratik Prajapati | 418535e | 2017-10-11 16:12:21 -0700 | [diff] [blame] | 177 | sgx_fill_gnvs(gnvs); |
Subrata Banik | b6df6b0 | 2020-01-03 15:29:02 +0530 | [diff] [blame] | 178 | |
| 179 | /* Fill in Above 4GB MMIO resource */ |
| 180 | sa_fill_gnvs(gnvs); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 181 | } |
| 182 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 183 | unsigned long acpi_fill_mcfg(unsigned long current) |
| 184 | { |
| 185 | current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, |
Duncan Laurie | 50f06a1 | 2018-03-02 14:56:38 -0800 | [diff] [blame] | 186 | CONFIG_MMCONF_BASE_ADDRESS, 0, 0, |
Duncan Laurie | fd50b7c | 2018-03-02 14:47:11 -0800 | [diff] [blame] | 187 | (CONFIG_SA_PCIEX_LENGTH >> 20) - 1); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 188 | return current; |
| 189 | } |
| 190 | |
Duncan Laurie | db54a67 | 2015-09-04 14:19:35 -0700 | [diff] [blame] | 191 | unsigned long acpi_fill_madt(unsigned long current) |
| 192 | { |
| 193 | /* Local APICs */ |
| 194 | current = acpi_create_madt_lapics(current); |
| 195 | |
| 196 | /* IOAPIC */ |
| 197 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, |
| 198 | 2, IO_APIC_ADDR, 0); |
| 199 | |
| 200 | return acpi_madt_irq_overrides(current); |
| 201 | } |
| 202 | |
Jacob Garber | 9172b69 | 2019-06-26 16:18:16 -0600 | [diff] [blame] | 203 | static void write_c_state_entries(acpi_cstate_t *map, const int *set, size_t max_c_state) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 204 | { |
Jacob Garber | 9172b69 | 2019-06-26 16:18:16 -0600 | [diff] [blame] | 205 | for (size_t i = 0; i < max_c_state; i++) { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 206 | memcpy(&map[i], &cstate_map[set[i]], sizeof(acpi_cstate_t)); |
| 207 | map[i].ctype = i + 1; |
| 208 | } |
| 209 | |
| 210 | /* Generate C-state tables */ |
Jacob Garber | 9172b69 | 2019-06-26 16:18:16 -0600 | [diff] [blame] | 211 | acpigen_write_CST_package(map, max_c_state); |
| 212 | } |
| 213 | |
| 214 | static void generate_c_state_entries(int s0ix_enable) |
| 215 | { |
| 216 | if (s0ix_enable) { |
| 217 | acpi_cstate_t map[ARRAY_SIZE(cstate_set_s0ix)]; |
| 218 | write_c_state_entries(map, cstate_set_s0ix, ARRAY_SIZE(map)); |
| 219 | } else { |
| 220 | acpi_cstate_t map[ARRAY_SIZE(cstate_set_non_s0ix)]; |
| 221 | write_c_state_entries(map, cstate_set_non_s0ix, ARRAY_SIZE(map)); |
| 222 | } |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 223 | } |
| 224 | |
| 225 | static int calculate_power(int tdp, int p1_ratio, int ratio) |
| 226 | { |
| 227 | u32 m; |
| 228 | u32 power; |
| 229 | |
| 230 | /* |
| 231 | * M = ((1.1 - ((p1_ratio - ratio) * 0.00625)) / 1.1) ^ 2 |
| 232 | * |
| 233 | * Power = (ratio / p1_ratio) * m * tdp |
| 234 | */ |
| 235 | |
| 236 | m = (110000 - ((p1_ratio - ratio) * 625)) / 11; |
| 237 | m = (m * m) / 1000; |
| 238 | |
| 239 | power = ((ratio * 100000 / p1_ratio) / 100); |
| 240 | power *= (m / 100) * (tdp / 1000); |
| 241 | power /= 1000; |
| 242 | |
| 243 | return (int)power; |
| 244 | } |
| 245 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 246 | static void generate_p_state_entries(int core, int cores_per_package) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 247 | { |
| 248 | int ratio_min, ratio_max, ratio_turbo, ratio_step; |
| 249 | int coord_type, power_max, power_unit, num_entries; |
| 250 | int ratio, power, clock, clock_max; |
| 251 | msr_t msr; |
| 252 | |
| 253 | /* Determine P-state coordination type from MISC_PWR_MGMT[0] */ |
| 254 | msr = rdmsr(MSR_MISC_PWR_MGMT); |
| 255 | if (msr.lo & MISC_PWR_MGMT_EIST_HW_DIS) |
| 256 | coord_type = SW_ANY; |
| 257 | else |
| 258 | coord_type = HW_ALL; |
| 259 | |
| 260 | /* Get bus ratio limits and calculate clock speeds */ |
| 261 | msr = rdmsr(MSR_PLATFORM_INFO); |
| 262 | ratio_min = (msr.hi >> (40-32)) & 0xff; /* Max Efficiency Ratio */ |
| 263 | |
| 264 | /* Determine if this CPU has configurable TDP */ |
| 265 | if (cpu_config_tdp_levels()) { |
| 266 | /* Set max ratio to nominal TDP ratio */ |
| 267 | msr = rdmsr(MSR_CONFIG_TDP_NOMINAL); |
| 268 | ratio_max = msr.lo & 0xff; |
| 269 | } else { |
| 270 | /* Max Non-Turbo Ratio */ |
| 271 | ratio_max = (msr.lo >> 8) & 0xff; |
| 272 | } |
Aamir Bohra | 1041d39 | 2017-06-02 11:56:14 +0530 | [diff] [blame] | 273 | clock_max = ratio_max * CONFIG_CPU_BCLK_MHZ; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 274 | |
| 275 | /* Calculate CPU TDP in mW */ |
| 276 | msr = rdmsr(MSR_PKG_POWER_SKU_UNIT); |
| 277 | power_unit = 2 << ((msr.lo & 0xf) - 1); |
| 278 | msr = rdmsr(MSR_PKG_POWER_SKU); |
| 279 | power_max = ((msr.lo & 0x7fff) / power_unit) * 1000; |
| 280 | |
| 281 | /* Write _PCT indicating use of FFixedHW */ |
| 282 | acpigen_write_empty_PCT(); |
| 283 | |
| 284 | /* Write _PPC with no limit on supported P-state */ |
| 285 | acpigen_write_PPC_NVS(); |
| 286 | |
| 287 | /* Write PSD indicating configured coordination type */ |
| 288 | acpigen_write_PSD_package(core, 1, coord_type); |
| 289 | |
| 290 | /* Add P-state entries in _PSS table */ |
| 291 | acpigen_write_name("_PSS"); |
| 292 | |
| 293 | /* Determine ratio points */ |
| 294 | ratio_step = PSS_RATIO_STEP; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 295 | num_entries = ((ratio_max - ratio_min) / ratio_step) + 1; |
| 296 | if (num_entries > PSS_MAX_ENTRIES) { |
| 297 | ratio_step += 1; |
| 298 | num_entries = ((ratio_max - ratio_min) / ratio_step) + 1; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 299 | } |
| 300 | |
| 301 | /* P[T] is Turbo state if enabled */ |
| 302 | if (get_turbo_state() == TURBO_ENABLED) { |
| 303 | /* _PSS package count including Turbo */ |
| 304 | acpigen_write_package(num_entries + 2); |
| 305 | |
| 306 | msr = rdmsr(MSR_TURBO_RATIO_LIMIT); |
| 307 | ratio_turbo = msr.lo & 0xff; |
| 308 | |
| 309 | /* Add entry for Turbo ratio */ |
| 310 | acpigen_write_PSS_package( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 311 | clock_max + 1, /* MHz */ |
| 312 | power_max, /* mW */ |
| 313 | PSS_LATENCY_TRANSITION, /* lat1 */ |
| 314 | PSS_LATENCY_BUSMASTER, /* lat2 */ |
| 315 | ratio_turbo << 8, /* control */ |
| 316 | ratio_turbo << 8); /* status */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 317 | } else { |
| 318 | /* _PSS package count without Turbo */ |
| 319 | acpigen_write_package(num_entries + 1); |
| 320 | } |
| 321 | |
| 322 | /* First regular entry is max non-turbo ratio */ |
| 323 | acpigen_write_PSS_package( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 324 | clock_max, /* MHz */ |
| 325 | power_max, /* mW */ |
| 326 | PSS_LATENCY_TRANSITION, /* lat1 */ |
| 327 | PSS_LATENCY_BUSMASTER, /* lat2 */ |
| 328 | ratio_max << 8, /* control */ |
| 329 | ratio_max << 8); /* status */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 330 | |
| 331 | /* Generate the remaining entries */ |
| 332 | for (ratio = ratio_min + ((num_entries - 1) * ratio_step); |
| 333 | ratio >= ratio_min; ratio -= ratio_step) { |
| 334 | |
| 335 | /* Calculate power at this ratio */ |
| 336 | power = calculate_power(power_max, ratio_max, ratio); |
Aamir Bohra | 1041d39 | 2017-06-02 11:56:14 +0530 | [diff] [blame] | 337 | clock = ratio * CONFIG_CPU_BCLK_MHZ; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 338 | |
| 339 | acpigen_write_PSS_package( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 340 | clock, /* MHz */ |
| 341 | power, /* mW */ |
| 342 | PSS_LATENCY_TRANSITION, /* lat1 */ |
| 343 | PSS_LATENCY_BUSMASTER, /* lat2 */ |
| 344 | ratio << 8, /* control */ |
| 345 | ratio << 8); /* status */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 346 | } |
| 347 | |
| 348 | /* Fix package length */ |
| 349 | acpigen_pop_len(); |
| 350 | } |
| 351 | |
Michael Niewöhner | b20aac0 | 2020-10-14 19:30:46 +0200 | [diff] [blame] | 352 | static void generate_cppc_entries(int core_id) |
| 353 | { |
| 354 | /* Generate GCPC table in first logical core */ |
| 355 | if (core_id == 0) { |
| 356 | struct cppc_config cppc_config; |
| 357 | cpu_init_cppc_config(&cppc_config, CPPC_VERSION_2); |
| 358 | acpigen_write_CPPC_package(&cppc_config); |
| 359 | } |
| 360 | |
| 361 | /* Write _CST entry for each logical core */ |
| 362 | acpigen_write_CPPC_method(); |
| 363 | } |
| 364 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 365 | void generate_cpu_entries(const struct device *device) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 366 | { |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 367 | int core_id, cpu_id, pcontrol_blk = ACPI_BASE_ADDRESS, plen = 6; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 368 | int totalcores = dev_count_cpu(); |
| 369 | int cores_per_package = get_cores_per_package(); |
| 370 | int numcpus = totalcores/cores_per_package; |
Kyösti Mälkki | d5f645c | 2019-09-28 00:20:27 +0300 | [diff] [blame] | 371 | config_t *config = config_of_soc(); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 372 | int is_s0ix_enable = config->s0ix_enable; |
Michael Niewöhner | b20aac0 | 2020-10-14 19:30:46 +0200 | [diff] [blame] | 373 | const bool isst_supported = cpuid_eax(6) & CPUID_6_EAX_ISST; |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 374 | |
| 375 | printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", |
| 376 | numcpus, cores_per_package); |
| 377 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 378 | for (cpu_id = 0; cpu_id < numcpus; cpu_id++) { |
| 379 | for (core_id = 0; core_id < cores_per_package; core_id++) { |
| 380 | if (core_id > 0) { |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 381 | pcontrol_blk = 0; |
| 382 | plen = 0; |
| 383 | } |
| 384 | |
Christian Walter | be3979c | 2019-12-18 15:07:59 +0100 | [diff] [blame] | 385 | /* Generate processor \_SB.CPUx */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 386 | acpigen_write_processor( |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 387 | cpu_id*cores_per_package+core_id, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 388 | pcontrol_blk, plen); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 389 | /* Generate C-state tables */ |
Jacob Garber | 9172b69 | 2019-06-26 16:18:16 -0600 | [diff] [blame] | 390 | generate_c_state_entries(is_s0ix_enable); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 391 | |
Matt Delco | 9084c3c | 2018-07-27 14:17:29 -0700 | [diff] [blame] | 392 | if (config->eist_enable) { |
Subrata Banik | 6b45ee4 | 2017-05-12 11:43:57 +0530 | [diff] [blame] | 393 | /* Generate P-state tables */ |
| 394 | generate_p_state_entries(core_id, |
| 395 | cores_per_package); |
Matt Delco | 9084c3c | 2018-07-27 14:17:29 -0700 | [diff] [blame] | 396 | } |
Michael Niewöhner | 30c5d21 | 2020-08-03 15:01:18 +0200 | [diff] [blame] | 397 | |
Michael Niewöhner | b20aac0 | 2020-10-14 19:30:46 +0200 | [diff] [blame] | 398 | if (isst_supported) |
| 399 | generate_cppc_entries(core_id); |
Michael Niewöhner | 30c5d21 | 2020-08-03 15:01:18 +0200 | [diff] [blame] | 400 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 401 | acpigen_pop_len(); |
| 402 | } |
| 403 | } |
Arthur Heymans | 8afc135 | 2018-11-28 12:07:19 +0100 | [diff] [blame] | 404 | |
| 405 | /* PPKG is usually used for thermal management |
| 406 | of the first and only package. */ |
| 407 | acpigen_write_processor_package("PPKG", 0, cores_per_package); |
| 408 | |
| 409 | /* Add a method to notify processor nodes */ |
| 410 | acpigen_write_processor_cnot(cores_per_package); |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 411 | } |
| 412 | |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 413 | static unsigned long acpi_fill_dmar(unsigned long current) |
| 414 | { |
Kyösti Mälkki | 903b40a | 2019-07-03 07:25:59 +0300 | [diff] [blame] | 415 | struct device *const igfx_dev = pcidev_path_on_root(SA_DEVFN_IGD); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 416 | const u32 gfx_vtbar = MCHBAR32(GFXVTBAR) & ~0xfff; |
| 417 | const bool gfxvten = MCHBAR32(GFXVTBAR) & 1; |
| 418 | |
| 419 | /* iGFX has to be enabled, GFXVTBAR set and in 32-bit space. */ |
Angel Pons | 96a8013 | 2020-08-03 12:29:41 +0200 | [diff] [blame] | 420 | const bool emit_igd = |
| 421 | igfx_dev && igfx_dev->enabled && |
| 422 | gfx_vtbar && gfxvten && |
| 423 | !MCHBAR32(GFXVTBAR + 4); |
| 424 | |
| 425 | /* First, add DRHD entries */ |
| 426 | if (emit_igd) { |
| 427 | const unsigned long tmp = current; |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 428 | |
| 429 | current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar); |
Matt DeVillier | 7866d49 | 2018-03-29 14:59:57 +0200 | [diff] [blame] | 430 | current += acpi_create_dmar_ds_pci(current, 0, 2, 0); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 431 | |
| 432 | acpi_dmar_drhd_fixup(tmp, current); |
| 433 | } |
| 434 | |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 435 | const u32 vtvc0bar = MCHBAR32(VTVC0BAR) & ~0xfff; |
| 436 | const bool vtvc0en = MCHBAR32(VTVC0BAR) & 1; |
| 437 | |
| 438 | /* General VTBAR has to be set and in 32-bit space. */ |
Angel Pons | ef879a8 | 2019-08-30 19:42:23 +0200 | [diff] [blame] | 439 | if (vtvc0bar && vtvc0en && !MCHBAR32(VTVC0BAR + 4)) { |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 440 | const unsigned long tmp = current; |
| 441 | |
Angel Pons | ef879a8 | 2019-08-30 19:42:23 +0200 | [diff] [blame] | 442 | current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 443 | |
Angel Pons | ef879a8 | 2019-08-30 19:42:23 +0200 | [diff] [blame] | 444 | current += acpi_create_dmar_ds_ioapic(current, 2, V_P2SB_IBDF_BUS, |
| 445 | V_P2SB_IBDF_DEV, V_P2SB_IBDF_FUN); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 446 | |
Angel Pons | ef879a8 | 2019-08-30 19:42:23 +0200 | [diff] [blame] | 447 | current += acpi_create_dmar_ds_msi_hpet(current, 0, V_P2SB_HBDF_BUS, |
| 448 | V_P2SB_HBDF_DEV, V_P2SB_HBDF_FUN); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 449 | |
| 450 | acpi_dmar_drhd_fixup(tmp, current); |
| 451 | } |
| 452 | |
Angel Pons | 96a8013 | 2020-08-03 12:29:41 +0200 | [diff] [blame] | 453 | /* Then, add RMRR entries after all DRHD entries */ |
| 454 | if (emit_igd) { |
| 455 | const unsigned long tmp = current; |
| 456 | |
| 457 | current += acpi_create_dmar_rmrr(current, 0, |
| 458 | sa_get_gsm_base(), sa_get_tolud_base() - 1); |
| 459 | current += acpi_create_dmar_ds_pci(current, 0, 2, 0); |
| 460 | acpi_dmar_rmrr_fixup(tmp, current); |
| 461 | } |
| 462 | |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 463 | return current; |
| 464 | } |
| 465 | |
Furquan Shaikh | 0f007d8 | 2020-04-24 06:41:18 -0700 | [diff] [blame] | 466 | unsigned long northbridge_write_acpi_tables(const struct device *const dev, |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 467 | unsigned long current, |
| 468 | struct acpi_rsdp *const rsdp) |
| 469 | { |
Kyösti Mälkki | 28dc7dc | 2019-07-12 13:10:19 +0300 | [diff] [blame] | 470 | const struct soc_intel_skylake_config *const config = config_of(dev); |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 471 | acpi_dmar_t *const dmar = (acpi_dmar_t *)current; |
| 472 | |
| 473 | /* Create DMAR table only if we have VT-d capability. */ |
Kyösti Mälkki | 28dc7dc | 2019-07-12 13:10:19 +0300 | [diff] [blame] | 474 | if (config->ignore_vtd || !soc_is_vtd_capable()) |
Nico Huber | c37b0e3 | 2017-09-18 20:03:46 +0200 | [diff] [blame] | 475 | return current; |
| 476 | |
| 477 | printk(BIOS_DEBUG, "ACPI: * DMAR\n"); |
| 478 | acpi_create_dmar(dmar, DMAR_INTR_REMAP, acpi_fill_dmar); |
| 479 | current += dmar->header.length; |
| 480 | current = acpi_align_current(current); |
| 481 | acpi_add_table(rsdp, dmar); |
| 482 | |
| 483 | return current; |
| 484 | } |
| 485 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 486 | unsigned long acpi_madt_irq_overrides(unsigned long current) |
| 487 | { |
| 488 | int sci = acpi_sci_irq(); |
| 489 | acpi_madt_irqoverride_t *irqovr; |
| 490 | uint16_t flags = MP_IRQ_TRIGGER_LEVEL; |
| 491 | |
| 492 | /* INT_SRC_OVR */ |
| 493 | irqovr = (void *)current; |
| 494 | current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0); |
| 495 | |
| 496 | if (sci >= 20) |
| 497 | flags |= MP_IRQ_POLARITY_LOW; |
| 498 | else |
| 499 | flags |= MP_IRQ_POLARITY_HIGH; |
| 500 | |
| 501 | /* SCI */ |
| 502 | irqovr = (void *)current; |
| 503 | current += acpi_create_madt_irqoverride(irqovr, 0, sci, sci, flags); |
| 504 | |
Michael Niewöhner | 14512f9 | 2020-11-23 15:53:28 +0100 | [diff] [blame] | 505 | /* NMI */ |
| 506 | current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 5, 1); |
| 507 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 508 | return current; |
| 509 | } |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 510 | |
Furquan Shaikh | 0f007d8 | 2020-04-24 06:41:18 -0700 | [diff] [blame] | 511 | unsigned long southbridge_write_acpi_tables(const struct device *device, |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 512 | unsigned long current, |
| 513 | struct acpi_rsdp *rsdp) |
| 514 | { |
Duncan Laurie | 93bbd41 | 2017-11-11 20:03:29 -0800 | [diff] [blame] | 515 | current = acpi_write_dbg2_pci_uart(rsdp, current, |
Subrata Banik | afa07f7 | 2018-05-24 12:21:06 +0530 | [diff] [blame] | 516 | uart_get_device(), |
Duncan Laurie | 93bbd41 | 2017-11-11 20:03:29 -0800 | [diff] [blame] | 517 | ACPI_ACCESS_SIZE_DWORD_ACCESS); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 518 | current = acpi_write_hpet(device, current, rsdp); |
Aaron Durbin | 07a1b28 | 2015-12-10 17:07:38 -0600 | [diff] [blame] | 519 | return acpi_align_current(current); |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 520 | } |
| 521 | |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 522 | /* Save wake source information for calculating ACPI _SWS values */ |
| 523 | int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) |
| 524 | { |
Kyösti Mälkki | d5f645c | 2019-09-28 00:20:27 +0300 | [diff] [blame] | 525 | const struct soc_intel_skylake_config *config = config_of_soc(); |
Naresh G Solanki | a1b3547 | 2015-12-11 18:13:02 +0530 | [diff] [blame] | 526 | struct chipset_power_state *ps; |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 527 | static uint32_t gpe0_sts[GPE0_REG_MAX]; |
| 528 | uint32_t pm1_en; |
Duncan Laurie | 95f9020 | 2016-10-25 20:07:22 -0700 | [diff] [blame] | 529 | uint32_t gpe0_std; |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 530 | int i; |
Aaron Durbin | 64606ce | 2016-10-27 09:53:17 -0500 | [diff] [blame] | 531 | const int last_index = GPE0_REG_MAX - 1; |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 532 | |
Kyösti Mälkki | 2787237 | 2021-01-21 16:05:26 +0200 | [diff] [blame^] | 533 | ps = acpi_get_pm_state(); |
Naresh G Solanki | a1b3547 | 2015-12-11 18:13:02 +0530 | [diff] [blame] | 534 | if (ps == NULL) |
| 535 | return -1; |
| 536 | |
Duncan Laurie | 95f9020 | 2016-10-25 20:07:22 -0700 | [diff] [blame] | 537 | pm1_en = ps->pm1_en; |
| 538 | gpe0_std = ps->gpe0_en[3]; |
| 539 | |
| 540 | /* |
| 541 | * Chipset state in the suspend well (but not RTC) is lost in Deep S3 |
| 542 | * so enable Deep S3 wake events that are configured by the mainboard |
| 543 | */ |
Duncan Laurie | 1fe32d6 | 2017-04-10 21:02:13 -0700 | [diff] [blame] | 544 | if (ps->prev_sleep_state == ACPI_S3 && |
| 545 | (config->deep_s3_enable_ac || config->deep_s3_enable_dc)) { |
Duncan Laurie | 95f9020 | 2016-10-25 20:07:22 -0700 | [diff] [blame] | 546 | pm1_en |= PWRBTN_STS; /* Always enabled as wake source */ |
| 547 | if (config->deep_sx_config & DSX_EN_LAN_WAKE_PIN) |
| 548 | gpe0_std |= LAN_WAK_EN; |
| 549 | if (config->deep_sx_config & DSX_EN_WAKE_PIN) |
| 550 | pm1_en |= PCIEXPWAK_STS; |
| 551 | } |
| 552 | |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 553 | *pm1 = ps->pm1_sts & pm1_en; |
| 554 | |
| 555 | /* Mask off GPE0 status bits that are not enabled */ |
| 556 | *gpe0 = &gpe0_sts[0]; |
Aaron Durbin | 64606ce | 2016-10-27 09:53:17 -0500 | [diff] [blame] | 557 | for (i = 0; i < last_index; i++) |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 558 | gpe0_sts[i] = ps->gpe0_sts[i] & ps->gpe0_en[i]; |
Aaron Durbin | 64606ce | 2016-10-27 09:53:17 -0500 | [diff] [blame] | 559 | gpe0_sts[last_index] = ps->gpe0_sts[last_index] & gpe0_std; |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 560 | |
| 561 | return GPE0_REG_MAX; |
| 562 | } |
| 563 | |
Aaron Durbin | aa090cb | 2017-09-13 16:01:52 -0600 | [diff] [blame] | 564 | const char *soc_acpi_name(const struct device *dev) |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 565 | { |
| 566 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 567 | return "PCI0"; |
| 568 | |
Duncan Laurie | bf713b0 | 2018-05-07 15:33:18 -0700 | [diff] [blame] | 569 | if (dev->path.type == DEVICE_PATH_USB) { |
| 570 | switch (dev->path.usb.port_type) { |
| 571 | case 0: |
| 572 | /* Root Hub */ |
| 573 | return "RHUB"; |
| 574 | case 2: |
| 575 | /* USB2 ports */ |
| 576 | switch (dev->path.usb.port_id) { |
| 577 | case 0: return "HS01"; |
| 578 | case 1: return "HS02"; |
| 579 | case 2: return "HS03"; |
| 580 | case 3: return "HS04"; |
| 581 | case 4: return "HS05"; |
| 582 | case 5: return "HS06"; |
| 583 | case 6: return "HS07"; |
| 584 | case 7: return "HS08"; |
| 585 | case 8: return "HS09"; |
| 586 | case 9: return "HS10"; |
| 587 | } |
| 588 | break; |
| 589 | case 3: |
| 590 | /* USB3 ports */ |
| 591 | switch (dev->path.usb.port_id) { |
| 592 | case 0: return "SS01"; |
| 593 | case 1: return "SS02"; |
| 594 | case 2: return "SS03"; |
| 595 | case 3: return "SS04"; |
| 596 | case 4: return "SS05"; |
| 597 | case 5: return "SS06"; |
| 598 | } |
| 599 | break; |
| 600 | } |
| 601 | return NULL; |
| 602 | } |
| 603 | |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 604 | if (dev->path.type != DEVICE_PATH_PCI) |
| 605 | return NULL; |
| 606 | |
Benjamin Doron | 2875df1 | 2020-08-06 19:13:09 +0000 | [diff] [blame] | 607 | /* Match functions 0 and 1 for possible GPUs on a secondary bus */ |
| 608 | if (dev->bus && dev->bus->secondary > 0) { |
| 609 | switch (PCI_FUNC(dev->path.pci.devfn)) { |
| 610 | case 0: return "DEV0"; |
| 611 | case 1: return "DEV1"; |
| 612 | } |
Patrick Rudolph | 45ffee8 | 2019-09-26 14:45:29 +0200 | [diff] [blame] | 613 | return NULL; |
Benjamin Doron | 2875df1 | 2020-08-06 19:13:09 +0000 | [diff] [blame] | 614 | } |
Patrick Rudolph | 45ffee8 | 2019-09-26 14:45:29 +0200 | [diff] [blame] | 615 | |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 616 | switch (dev->path.pci.devfn) { |
| 617 | case SA_DEVFN_ROOT: return "MCHC"; |
Benjamin Doron | 2875df1 | 2020-08-06 19:13:09 +0000 | [diff] [blame] | 618 | case SA_DEVFN_PEG0: return "PEGP"; |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 619 | case SA_DEVFN_IGD: return "GFX0"; |
| 620 | case PCH_DEVFN_ISH: return "ISHB"; |
| 621 | case PCH_DEVFN_XHCI: return "XHCI"; |
| 622 | case PCH_DEVFN_USBOTG: return "XDCI"; |
| 623 | case PCH_DEVFN_THERMAL: return "THRM"; |
| 624 | case PCH_DEVFN_CIO: return "ICIO"; |
| 625 | case PCH_DEVFN_I2C0: return "I2C0"; |
| 626 | case PCH_DEVFN_I2C1: return "I2C1"; |
| 627 | case PCH_DEVFN_I2C2: return "I2C2"; |
| 628 | case PCH_DEVFN_I2C3: return "I2C3"; |
Subrata Banik | 2ee54db | 2017-03-05 12:37:00 +0530 | [diff] [blame] | 629 | case PCH_DEVFN_CSE: return "CSE1"; |
| 630 | case PCH_DEVFN_CSE_2: return "CSE2"; |
| 631 | case PCH_DEVFN_CSE_IDER: return "CSED"; |
| 632 | case PCH_DEVFN_CSE_KT: return "CSKT"; |
| 633 | case PCH_DEVFN_CSE_3: return "CSE3"; |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 634 | case PCH_DEVFN_SATA: return "SATA"; |
| 635 | case PCH_DEVFN_UART2: return "UAR2"; |
| 636 | case PCH_DEVFN_I2C4: return "I2C4"; |
| 637 | case PCH_DEVFN_I2C5: return "I2C5"; |
| 638 | case PCH_DEVFN_PCIE1: return "RP01"; |
| 639 | case PCH_DEVFN_PCIE2: return "RP02"; |
| 640 | case PCH_DEVFN_PCIE3: return "RP03"; |
| 641 | case PCH_DEVFN_PCIE4: return "RP04"; |
| 642 | case PCH_DEVFN_PCIE5: return "RP05"; |
| 643 | case PCH_DEVFN_PCIE6: return "RP06"; |
| 644 | case PCH_DEVFN_PCIE7: return "RP07"; |
| 645 | case PCH_DEVFN_PCIE8: return "RP08"; |
| 646 | case PCH_DEVFN_PCIE9: return "RP09"; |
| 647 | case PCH_DEVFN_PCIE10: return "RP10"; |
| 648 | case PCH_DEVFN_PCIE11: return "RP11"; |
| 649 | case PCH_DEVFN_PCIE12: return "RP12"; |
Maxim Polyakov | c6f2b61 | 2019-08-23 15:22:21 +0300 | [diff] [blame] | 650 | case PCH_DEVFN_PCIE13: return "RP13"; |
| 651 | case PCH_DEVFN_PCIE14: return "RP14"; |
| 652 | case PCH_DEVFN_PCIE15: return "RP15"; |
| 653 | case PCH_DEVFN_PCIE16: return "RP16"; |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 654 | case PCH_DEVFN_UART0: return "UAR0"; |
| 655 | case PCH_DEVFN_UART1: return "UAR1"; |
| 656 | case PCH_DEVFN_GSPI0: return "SPI0"; |
| 657 | case PCH_DEVFN_GSPI1: return "SPI1"; |
| 658 | case PCH_DEVFN_EMMC: return "EMMC"; |
| 659 | case PCH_DEVFN_SDIO: return "SDIO"; |
| 660 | case PCH_DEVFN_SDCARD: return "SDXC"; |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 661 | case PCH_DEVFN_P2SB: return "P2SB"; |
| 662 | case PCH_DEVFN_PMC: return "PMC_"; |
| 663 | case PCH_DEVFN_HDA: return "HDAS"; |
| 664 | case PCH_DEVFN_SMBUS: return "SBUS"; |
| 665 | case PCH_DEVFN_SPI: return "FSPI"; |
| 666 | case PCH_DEVFN_GBE: return "IGBE"; |
| 667 | case PCH_DEVFN_TRACEHUB:return "THUB"; |
| 668 | } |
| 669 | |
| 670 | return NULL; |
| 671 | } |
Furquan Shaikh | a6f0b27 | 2017-05-23 11:53:47 -0700 | [diff] [blame] | 672 | |
| 673 | static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num) |
| 674 | { |
| 675 | /* op (gpio_num) */ |
| 676 | acpigen_emit_namestring(op); |
| 677 | acpigen_write_integer(gpio_num); |
| 678 | return 0; |
| 679 | } |
| 680 | |
| 681 | static int acpigen_soc_get_gpio_state(const char *op, unsigned int gpio_num) |
| 682 | { |
| 683 | /* Store (op (gpio_num), Local0) */ |
| 684 | acpigen_write_store(); |
| 685 | acpigen_soc_gpio_op(op, gpio_num); |
| 686 | acpigen_emit_byte(LOCAL0_OP); |
| 687 | return 0; |
| 688 | } |
| 689 | |
| 690 | int acpigen_soc_read_rx_gpio(unsigned int gpio_num) |
| 691 | { |
| 692 | return acpigen_soc_get_gpio_state("\\_SB.PCI0.GRXS", gpio_num); |
| 693 | } |
| 694 | |
| 695 | int acpigen_soc_get_tx_gpio(unsigned int gpio_num) |
| 696 | { |
| 697 | return acpigen_soc_get_gpio_state("\\_SB.PCI0.GTXS", gpio_num); |
| 698 | } |
| 699 | |
| 700 | int acpigen_soc_set_tx_gpio(unsigned int gpio_num) |
| 701 | { |
| 702 | return acpigen_soc_gpio_op("\\_SB.PCI0.STXS", gpio_num); |
| 703 | } |
| 704 | |
| 705 | int acpigen_soc_clear_tx_gpio(unsigned int gpio_num) |
| 706 | { |
| 707 | return acpigen_soc_gpio_op("\\_SB.PCI0.CTXS", gpio_num); |
| 708 | } |