blob: 3de469ecacb83b8e5d2d3644607c2f1376484083 [file] [log] [blame]
Matt DeVillierae011222020-03-30 13:21:45 -05001chip soc/intel/broadwell
2
3 # Enable DDI2 Hotplug with 6ms pulse
4 register "gpu_dp_c_hotplug" = "0x06"
5
Michael Niewöhner97e21d32020-12-28 00:49:33 +01006 register "panel_cfg" = "{
7 .up_delay_ms = 200,
8 .down_delay_ms = 50,
9 .cycle_delay_ms = 500,
10 .backlight_on_delay_ms = 200,
11 .backlight_off_delay_ms = 200,
12 .backlight_pwm_hz = 200,
13 }"
Matt DeVillierae011222020-03-30 13:21:45 -050014
Arthur Heymansdd96ab62021-11-15 20:11:12 +010015 chip cpu/intel/haswell
16 device cpu_cluster 0 on end
Matt DeVillierae011222020-03-30 13:21:45 -050017
Arthur Heymansdd96ab62021-11-15 20:11:12 +010018 # Disable S0ix for now
19 register "s0ix_enable" = "0"
Angel Pons739a6ad12020-10-29 11:02:21 +010020
Arthur Heymansdd96ab62021-11-15 20:11:12 +010021 register "vr_config" = "{
22 .slow_ramp_rate_set = 3,
23 .slow_ramp_rate_enable = true,
24 }"
25
Angel Pons739a6ad12020-10-29 11:02:21 +010026 end
Matt DeVillierae011222020-03-30 13:21:45 -050027
Matt DeVillierae011222020-03-30 13:21:45 -050028 device domain 0 on
Angel Pons3cc2c382020-10-23 20:38:23 +020029 chip soc/intel/broadwell/pch
Angel Pons99af2102020-10-23 20:39:17 +020030 register "sata_port0_gen3_tx" = "0x72"
31
32 # Set I2C0 to 1.8V
33 register "sio_i2c0_voltage" = "1"
34
35 # Force enable ASPM for PCIe Port 3
36 register "pcie_port_force_aspm" = "0x04"
Angel Ponsaf4bd562021-12-28 13:05:56 +010037 register "pcie_port_coalesce" = "true"
Angel Pons99af2102020-10-23 20:39:17 +020038
39 # Disable PCIe CLKOUT 1-5 and CLKOUT_XDP
40 register "icc_clock_disable" = "0x013b0000"
41
42 device pci 13.0 on end # Smart Sound Audio DSP
43 device pci 15.3 on end # GSPI0
44 device pci 1b.0 off end # High Definition Audio
45 device pci 1c.0 off end # PCIe Port #1
46 device pci 1c.2 on end # PCIe Port #3
47 device pci 1d.0 off end # USB2 EHCI
Angel Ponsd79b87a2020-10-25 16:44:22 +010048 device pci 1f.2 on end # SATA Controller
Angel Pons3cc2c382020-10-23 20:38:23 +020049 end
Matt DeVillierae011222020-03-30 13:21:45 -050050 end
51end