soc/intel/broadwell: Separate PCH in devicetree
Flesh out the PCH configuration into a separate chip. Keep it within the
Broadwell SoC directory for now, to ease moving files around. The boards
were prepared beforehand and the devicetrees require next to no changes.
Tested on out-of-tree Acer Aspire E5-573, still boots.
Change-Id: I28d948f3e6d85e669d12b29516d867c1d1ae9e1a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46700
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/google/auron/variants/samus/overridetree.cb b/src/mainboard/google/auron/variants/samus/overridetree.cb
index 9344575..d8aec0a 100644
--- a/src/mainboard/google/auron/variants/samus/overridetree.cb
+++ b/src/mainboard/google/auron/variants/samus/overridetree.cb
@@ -17,7 +17,7 @@
register "s0ix_enable" = "0"
device domain 0 on
-# chip soc/intel/broadwell/pch
+ chip soc/intel/broadwell/pch
register "sata_port0_gen3_tx" = "0x72"
# Set I2C0 to 1.8V
@@ -37,6 +37,6 @@
device pci 1c.2 on end # PCIe Port #3
device pci 1d.0 off end # USB2 EHCI
device pci 1f.2 on end # SATA Controller
-# end
+ end
end
end