blob: c01486d3a88579ceb2e49beead2cd1a6b545e056 [file] [log] [blame]
Patrick Georgic49d7a32020-05-08 22:50:46 +02001## SPDX-License-Identifier: GPL-2.0-only
Vadim Bendebury0b341b32014-04-23 11:09:44 -07002
Stefan Reinaueraae53ab2015-04-27 14:03:57 -07003ifeq ($(CONFIG_SOC_QC_IPQ806X),y)
4
Vadim Bendeburydb3e2f02014-04-09 19:23:54 -07005bootblock-y += clock.c
Furquan Shaikh9d91aba2014-04-10 20:35:05 -07006bootblock-y += gpio.c
Vadim Bendebury0e2d9b62014-05-01 19:37:18 -07007bootblock-$(CONFIG_SPI_FLASH) += spi.c
Marc Jones017287a2014-12-29 16:52:59 -07008bootblock-y += timer.c
Nico Huber755db952018-11-11 01:42:17 +01009bootblock-y += uart.c
Furquan Shaikh76570572014-03-19 14:29:48 -070010
Vadim Bendeburyfa00ae72014-12-10 20:11:30 -080011verstage-y += clock.c
12verstage-y += gpio.c
Julius Wernere91d1702017-03-20 15:32:15 -070013verstage-y += gsbi.c
14verstage-y += i2c.c
15verstage-y += qup.c
16verstage-y += spi.c
Vadim Bendeburyfa00ae72014-12-10 20:11:30 -080017verstage-y += timer.c
Nico Huber755db952018-11-11 01:42:17 +010018verstage-y += uart.c
Vadim Bendeburyfa00ae72014-12-10 20:11:30 -080019
Vadim Bendeburydb3e2f02014-04-09 19:23:54 -070020romstage-y += clock.c
Vadim Bendeburyef77f872014-12-10 20:42:58 -080021romstage-y += blobs_init.c
Furquan Shaikh9d91aba2014-04-10 20:35:05 -070022romstage-y += gpio.c
Vadim Bendebury0e2d9b62014-05-01 19:37:18 -070023romstage-$(CONFIG_SPI_FLASH) += spi.c
Marc Jones017287a2014-12-29 16:52:59 -070024romstage-y += timer.c
Nico Huber755db952018-11-11 01:42:17 +010025romstage-y += uart.c
Vadim Bendebury15c98b02014-05-01 14:45:56 -070026romstage-y += cbmem.c
Philipp Deppenwiese545ed7a2018-02-14 16:47:12 +010027romstage-y += i2c.c
28romstage-y += gsbi.c
29romstage-y += qup.c
Furquan Shaikh76570572014-03-19 14:29:48 -070030
Vikas Das08f249e2014-09-22 17:49:56 -070031ramstage-y += blobs_init.c
Vadim Bendeburydb3e2f02014-04-09 19:23:54 -070032ramstage-y += clock.c
Furquan Shaikh9d91aba2014-04-10 20:35:05 -070033ramstage-y += gpio.c
Vadim Bendebury3cfb6a02015-02-11 15:13:04 -080034ramstage-y += lcc.c
Vadim Bendebury41a5d0d2014-05-13 17:47:57 -070035ramstage-y += soc.c
Vadim Bendebury0e2d9b62014-05-01 19:37:18 -070036ramstage-$(CONFIG_SPI_FLASH) += spi.c
Vadim Bendeburyf4b209f2014-04-09 19:23:04 -070037ramstage-y += timer.c
Vadim Bendebury7c256402015-01-13 13:07:48 -080038ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk
Julius Werner028cba92014-05-30 18:01:44 -070039ramstage-y += usb.c
Vikas Das08f249e2014-09-22 17:49:56 -070040ramstage-y += tz_wrapper.S
Furquan Shaikha7f11b82016-07-25 16:57:46 -070041ramstage-y += gsbi.c
42ramstage-y += i2c.c
43ramstage-y += qup.c
44ramstage-y += spi.c
Vadim Bendeburyb1709bd2014-04-07 15:26:39 -070045
Vadim Bendebury9cb70ae2014-04-07 18:59:53 -070046ifeq ($(CONFIG_USE_BLOBS),y)
Vadim Bendeburyb1709bd2014-04-07 15:26:39 -070047
Vadim Bendebury9cb70ae2014-04-07 18:59:53 -070048# Add MBN header to allow SBL3 to start coreboot bootblock
Aaron Durbind972f782015-09-17 17:02:53 -050049$(objcbfs)/bootblock.mbn: $(objcbfs)/bootblock.raw.bin
Vadim Bendebury9cb70ae2014-04-07 18:59:53 -070050 @printf " ADD MBN $(subst $(obj)/,,$(@))\n"
T Michael Turney101098c2018-05-01 15:59:37 -070051 ./util/qualcomm/ipqheader.py $(call loadaddr,bootblock) $< $@.tmp
Vadim Bendebury9cb70ae2014-04-07 18:59:53 -070052 @mv $@.tmp $@
53
54# Create a complete bootblock which will start up the system
Vadim Bendeburye83c80c2014-04-15 14:42:30 -070055$(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_BLOB)) \
Vadim Bendebury9cb70ae2014-04-07 18:59:53 -070056 $(objcbfs)/bootblock.mbn
Vadim Bendeburye39ac752014-11-30 16:10:46 -080057 @printf " MBNCAT $(subst $(obj)/,,$(@))\n"
T Michael Turney101098c2018-05-01 15:59:37 -070058 @util/qualcomm/mbncat.py -o $@.tmp $^
Vadim Bendebury9cb70ae2014-04-07 18:59:53 -070059 @mv $@.tmp $@
60
Vadim Bendeburyb1709bd2014-04-07 15:26:39 -070061endif
Furquan Shaikh75b4beb2014-04-10 20:53:32 -070062
Furquan Shaikh9d91aba2014-04-10 20:35:05 -070063CPPFLAGS_common += -Isrc/soc/qualcomm/ipq806x/include
Vadim Bendeburyf85640d2014-12-06 18:24:56 -080064
65# List of binary blobs coreboot needs in CBFS to be able to boot up this SOC
66mbn-files := cdt.mbn ddr.mbn rpm.mbn tz.mbn
67
68# Location of the binary blobs
Patrick Georgi26e24cc2015-05-05 22:27:25 +020069mbn-root := 3rdparty/blobs/cpu/qualcomm/ipq806x
Vadim Bendeburyf85640d2014-12-06 18:24:56 -080070
71# Create make variables to aid cbfs-files-handler in processing the blobs (add
72# them all as raw binaries at the root level).
73$(foreach f,$(mbn-files),$(eval cbfs-files-y += $(f))\
74 $(eval $(f)-file := $(mbn-root)/$(f))\
75 $(eval $(f)-type := raw))
Stefan Reinaueraae53ab2015-04-27 14:03:57 -070076
77endif