blob: 73ec9c1dba592ed839998f442d0f7afaca4973cd [file] [log] [blame]
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -07001/* SPDX-License-Identifier: GPL-2.0-only */
2
Elyes Haouas04c3b5a2022-10-07 10:08:05 +02003#include <commonlib/bsd/helpers.h>
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -07004#include <console/console.h>
5#include <device/device.h>
6#include <memrange.h>
7#include <post.h>
Elyes Haouas04c3b5a2022-10-07 10:08:05 +02008#include <types.h>
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -07009
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070010static const char *resource2str(const struct resource *res)
11{
12 if (res->flags & IORESOURCE_IO)
13 return "io";
14 if (res->flags & IORESOURCE_PREFETCH)
15 return "prefmem";
16 if (res->flags & IORESOURCE_MEM)
17 return "mem";
18 return "undefined";
19}
20
Nico Huberee570652020-05-24 17:56:51 +020021static void print_domain_res(const struct device *dev,
22 const struct resource *res, const char *suffix)
23{
24 printk(BIOS_DEBUG, "%s %s: base: %llx size: %llx align: %u gran: %u limit: %llx%s\n",
25 dev_path(dev), resource2str(res), res->base, res->size,
26 res->align, res->gran, res->limit, suffix);
27}
28
29#define res_printk(depth, str, ...) printk(BIOS_DEBUG, "%*c"str, depth, ' ', __VA_ARGS__)
30
31static void print_bridge_res(const struct device *dev, const struct resource *res,
32 int depth, const char *suffix)
33{
34 res_printk(depth, "%s %s: size: %llx align: %u gran: %u limit: %llx%s\n", dev_path(dev),
35 resource2str(res), res->size, res->align, res->gran, res->limit, suffix);
36}
37
38static void print_child_res(const struct device *dev, const struct resource *res, int depth)
39{
40 res_printk(depth + 1, "%s %02lx * [0x%llx - 0x%llx] %s\n", dev_path(dev),
41 res->index, res->base, res->base + res->size - 1, resource2str(res));
42}
43
44static void print_fixed_res(const struct device *dev,
45 const struct resource *res, const char *prefix)
46{
47 printk(BIOS_DEBUG, " %s: %s %02lx base %08llx limit %08llx %s (fixed)\n",
48 prefix, dev_path(dev), res->index, res->base, res->base + res->size - 1,
49 resource2str(res));
50}
51
52static void print_assigned_res(const struct device *dev, const struct resource *res)
53{
54 printk(BIOS_DEBUG, " %s %02lx * [0x%llx - 0x%llx] limit: %llx %s\n",
55 dev_path(dev), res->index, res->base, res->limit, res->limit, resource2str(res));
56}
57
58static void print_failed_res(const struct device *dev, const struct resource *res)
59{
60 printk(BIOS_DEBUG, " %s %02lx * size: 0x%llx limit: %llx %s\n",
61 dev_path(dev), res->index, res->size, res->limit, resource2str(res));
62}
63
64static void print_resource_ranges(const struct device *dev, const struct memranges *ranges)
65{
66 const struct range_entry *r;
67
68 printk(BIOS_INFO, " %s: Resource ranges:\n", dev_path(dev));
69
70 if (memranges_is_empty(ranges))
71 printk(BIOS_INFO, " * EMPTY!!\n");
72
73 memranges_each_entry(r, ranges) {
74 printk(BIOS_INFO, " * Base: %llx, Size: %llx, Tag: %lx\n",
75 range_entry_base(r), range_entry_size(r), range_entry_tag(r));
76 }
77}
78
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070079static bool dev_has_children(const struct device *dev)
80{
81 const struct bus *bus = dev->link_list;
82 return bus && bus->children;
83}
84
Nico Huber52263012020-05-23 19:15:36 +020085static resource_t effective_limit(const struct resource *const res)
86{
Arthur Heymanscf6d9ac2023-08-31 18:08:02 +020087 if (CONFIG(ALWAYS_ALLOW_ABOVE_4G_ALLOCATION))
88 return res->limit;
89
Nico Huber52263012020-05-23 19:15:36 +020090 /* Always allow bridge resources above 4G. */
91 if (res->flags & IORESOURCE_BRIDGE)
92 return res->limit;
93
94 const resource_t quirk_4g_limit =
95 res->flags & IORESOURCE_ABOVE_4G ? UINT64_MAX : UINT32_MAX;
96 return MIN(res->limit, quirk_4g_limit);
97}
98
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070099/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200100 * During pass 1, once all the requirements for downstream devices of a
101 * bridge are gathered, this function calculates the overall resource
102 * requirement for the bridge. It starts by picking the largest resource
103 * requirement downstream for the given resource type and works by
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700104 * adding requirements in descending order.
105 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200106 * Additionally, it takes alignment and limits of the downstream devices
107 * into consideration and ensures that they get propagated to the bridge
108 * resource. This is required to guarantee that the upstream bridge/
109 * domain honors the limit and alignment requirements for this bridge
110 * based on the tightest constraints downstream.
Nico Huber9260ea62020-05-23 23:20:13 +0200111 *
112 * Last but not least, it stores the offset inside the bridge resource
113 * for each child resource in its base field. This simplifies pass 2
114 * for resources behind a bridge, as we only have to add offsets to the
115 * allocated base of the bridge resource.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700116 */
117static void update_bridge_resource(const struct device *bridge, struct resource *bridge_res,
Nico Huber58fe7032022-08-17 14:43:54 +0200118 int print_depth)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700119{
120 const struct device *child;
121 struct resource *child_res;
122 resource_t base;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700123 const unsigned long type_mask = IORESOURCE_TYPE_MASK | IORESOURCE_PREFETCH;
Nico Huber58fe7032022-08-17 14:43:54 +0200124 const unsigned long type_match = bridge_res->flags & type_mask;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700125 struct bus *bus = bridge->link_list;
126
127 child_res = NULL;
128
129 /*
Nico Huber9d7728a2020-05-23 18:00:10 +0200130 * `base` keeps track of where the next allocation for child resources
131 * can take place from within the bridge resource window. Since the
132 * bridge resource window allocation is not performed yet, it can start
133 * at 0. Base gets updated every time a resource requirement is
134 * accounted for in the loop below. After scanning all these resources,
135 * base will indicate the total size requirement for the current bridge
136 * resource window.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700137 */
138 base = 0;
139
Nico Huberee570652020-05-24 17:56:51 +0200140 print_bridge_res(bridge, bridge_res, print_depth, "");
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700141
142 while ((child = largest_resource(bus, &child_res, type_mask, type_match))) {
143
144 /* Size 0 resources can be skipped. */
145 if (!child_res->size)
146 continue;
147
Nico Huberec7b3132020-05-23 18:20:47 +0200148 /* Resources with 0 limit can't be assigned anything. */
149 if (!child_res->limit)
150 continue;
151
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700152 /*
Nico Huber74169c12020-05-23 18:15:34 +0200153 * Propagate the resource alignment to the bridge resource. The
154 * condition can only be true for the first (largest) resource. For all
Nico Huber9260ea62020-05-23 23:20:13 +0200155 * other child resources, alignment is taken care of by rounding their
156 * base up.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700157 */
Nico Huber74169c12020-05-23 18:15:34 +0200158 if (child_res->align > bridge_res->align)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700159 bridge_res->align = child_res->align;
160
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700161 /*
Nico Huberec7b3132020-05-23 18:20:47 +0200162 * Propagate the resource limit to the bridge resource. If a downstream
163 * device has stricter requirements w.r.t. limits for any resource, that
Nico Huber9260ea62020-05-23 23:20:13 +0200164 * constraint needs to be propagated back up to the bridges downstream
165 * of the domain. This way, the whole bridge resource fulfills the limit.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700166 */
Nico Huber52263012020-05-23 19:15:36 +0200167 if (effective_limit(child_res) < bridge_res->limit)
168 bridge_res->limit = effective_limit(child_res);
Furquan Shaikh1bb05ef302020-05-15 17:33:52 -0700169
170 /*
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700171 * Alignment value of 0 means that the child resource has no alignment
172 * requirements and so the base value remains unchanged here.
173 */
Nico Huberb3277042020-05-23 18:08:50 +0200174 base = ALIGN_UP(base, POWER_OF_2(child_res->align));
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700175
Nico Huber9260ea62020-05-23 23:20:13 +0200176 /*
177 * Store the relative offset inside the bridge resource for later
178 * consumption in allocate_bridge_resources(), and invalidate flags
179 * related to the base.
180 */
181 child_res->base = base;
182 child_res->flags &= ~(IORESOURCE_ASSIGNED | IORESOURCE_STORED);
183
Nico Huberee570652020-05-24 17:56:51 +0200184 print_child_res(child, child_res, print_depth);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700185
186 base += child_res->size;
187 }
188
189 /*
Nico Huber9d7728a2020-05-23 18:00:10 +0200190 * After all downstream device resources are scanned, `base` represents
191 * the total size requirement for the current bridge resource window.
192 * This size needs to be rounded up to the granularity requirement of
193 * the bridge to ensure that the upstream bridge/domain allocates big
194 * enough window.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700195 */
Nico Huberb3277042020-05-23 18:08:50 +0200196 bridge_res->size = ALIGN_UP(base, POWER_OF_2(bridge_res->gran));
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700197
Nico Huberee570652020-05-24 17:56:51 +0200198 print_bridge_res(bridge, bridge_res, print_depth, " done");
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700199}
200
201/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200202 * During pass 1, at the bridge level, the resource allocator gathers
203 * requirements from downstream devices and updates its own resource
204 * windows for the provided resource type.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700205 */
Furquan Shaikhc3568612020-05-16 15:18:23 -0700206static void compute_bridge_resources(const struct device *bridge, unsigned long type_match,
207 int print_depth)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700208{
209 const struct device *child;
210 struct resource *res;
211 struct bus *bus = bridge->link_list;
212 const unsigned long type_mask = IORESOURCE_TYPE_MASK | IORESOURCE_PREFETCH;
213
214 for (res = bridge->resource_list; res; res = res->next) {
215 if (!(res->flags & IORESOURCE_BRIDGE))
216 continue;
217
218 if ((res->flags & type_mask) != type_match)
219 continue;
220
221 /*
222 * Ensure that the resource requirements for all downstream bridges are
223 * gathered before updating the window for current bridge resource.
224 */
225 for (child = bus->children; child; child = child->sibling) {
226 if (!dev_has_children(child))
227 continue;
Furquan Shaikhc3568612020-05-16 15:18:23 -0700228 compute_bridge_resources(child, type_match, print_depth + 1);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700229 }
230
231 /*
232 * Update the window for current bridge resource now that all downstream
233 * requirements are gathered.
234 */
Nico Huber58fe7032022-08-17 14:43:54 +0200235 update_bridge_resource(bridge, res, print_depth);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700236 }
237}
238
239/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200240 * During pass 1, the resource allocator walks down the entire sub-tree
241 * of a domain. It gathers resource requirements for every downstream
242 * bridge by looking at the resource requests of its children. Thus, the
243 * requirement gathering begins at the leaf devices and is propagated
244 * back up to the downstream bridges of the domain.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700245 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200246 * At the domain level, it identifies every downstream bridge and walks
247 * down that bridge to gather requirements for each resource type i.e.
248 * i/o, mem and prefmem. Since bridges have separate windows for mem and
249 * prefmem, requirements for each need to be collected separately.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700250 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200251 * Domain resource windows are fixed ranges and hence requirement
252 * gathering does not result in any changes to these fixed ranges.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700253 */
254static void compute_domain_resources(const struct device *domain)
255{
256 const struct device *child;
Furquan Shaikhc3568612020-05-16 15:18:23 -0700257 const int print_depth = 1;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700258
259 if (domain->link_list == NULL)
260 return;
261
262 for (child = domain->link_list->children; child; child = child->sibling) {
263
264 /* Skip if this is not a bridge or has no children under it. */
265 if (!dev_has_children(child))
266 continue;
267
Furquan Shaikhc3568612020-05-16 15:18:23 -0700268 compute_bridge_resources(child, IORESOURCE_IO, print_depth);
269 compute_bridge_resources(child, IORESOURCE_MEM, print_depth);
270 compute_bridge_resources(child, IORESOURCE_MEM | IORESOURCE_PREFETCH,
271 print_depth);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700272 }
273}
274
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700275/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200276 * Scan the entire tree to identify any fixed resources allocated by
277 * any device to ensure that the address map for domain resources are
278 * appropriately updated.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700279 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200280 * Domains can typically provide a memrange for entire address space.
281 * So, this function punches holes in the address space for all fixed
282 * resources that are already defined. Both I/O and normal memory
283 * resources are added as fixed. Both need to be removed from address
284 * space where dynamic resource allocations are sourced.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700285 */
286static void avoid_fixed_resources(struct memranges *ranges, const struct device *dev,
287 unsigned long mask_match)
288{
289 const struct resource *res;
290 const struct device *child;
291 const struct bus *bus;
292
293 for (res = dev->resource_list; res != NULL; res = res->next) {
294 if ((res->flags & mask_match) != mask_match)
295 continue;
Nico Huber866eff02020-05-24 18:32:51 +0200296 if (!res->size)
297 continue;
298 print_fixed_res(dev, res, __func__);
299 memranges_create_hole(ranges, res->base, res->size);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700300 }
301
302 bus = dev->link_list;
303 if (bus == NULL)
304 return;
305
306 for (child = bus->children; child != NULL; child = child->sibling)
307 avoid_fixed_resources(ranges, child, mask_match);
308}
309
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700310/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200311 * This function creates a list of memranges of given type using the
Nico Huber9260ea62020-05-23 23:20:13 +0200312 * resource that is provided. It applies additional constraints to
313 * ensure that the memranges do not overlap any of the fixed resources
314 * under the domain. The domain typically provides a memrange for the
315 * entire address space. Thus, it is up to the chipset to add DRAM and
316 * all other windows which cannot be used for resource allocation as
317 * fixed resources.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700318 */
Nico Huber9260ea62020-05-23 23:20:13 +0200319static void setup_resource_ranges(const struct device *const domain,
320 const unsigned long type,
321 struct memranges *const ranges)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700322{
Nico Huber866eff02020-05-24 18:32:51 +0200323 /* Align mem resources to 2^12 (4KiB pages) at a minimum, so they
324 can be memory-mapped individually (e.g. for virtualization guests). */
325 const unsigned char alignment = type == IORESOURCE_MEM ? 12 : 0;
Nico Huber9260ea62020-05-23 23:20:13 +0200326 const unsigned long type_mask = IORESOURCE_TYPE_MASK | IORESOURCE_FIXED;
Nico Huber52263012020-05-23 19:15:36 +0200327
328 memranges_init_empty_with_alignment(ranges, NULL, 0, alignment);
329
Nico Huber9260ea62020-05-23 23:20:13 +0200330 for (struct resource *res = domain->resource_list; res != NULL; res = res->next) {
331 if ((res->flags & type_mask) != type)
Nico Huber52263012020-05-23 19:15:36 +0200332 continue;
Nico Huberee570652020-05-24 17:56:51 +0200333 print_domain_res(domain, res, "");
Nico Huber52263012020-05-23 19:15:36 +0200334 memranges_insert(ranges, res->base, res->limit - res->base + 1, type);
Nico Huber38aafa32022-09-04 22:20:21 +0200335 }
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700336
Nico Huber866eff02020-05-24 18:32:51 +0200337 if (type == IORESOURCE_IO) {
338 /*
339 * Don't allow allocations in the VGA I/O range. PCI has special
340 * cases for that.
341 */
342 memranges_create_hole(ranges, 0x3b0, 0x3df - 0x3b0 + 1);
343
344 /*
345 * Resource allocator no longer supports the legacy behavior where
346 * I/O resource allocation is guaranteed to avoid aliases over legacy
347 * PCI expansion card addresses.
348 */
349 }
350
351 avoid_fixed_resources(ranges, domain, type | IORESOURCE_FIXED);
Nico Huber52263012020-05-23 19:15:36 +0200352
Nico Huber9260ea62020-05-23 23:20:13 +0200353 print_resource_ranges(domain, ranges);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700354}
355
Arthur Heymans68b2b8f2022-12-19 15:04:50 +0100356static void cleanup_domain_resource_ranges(const struct device *dev, struct memranges *ranges,
357 unsigned long type)
358{
359 memranges_teardown(ranges);
360 for (struct resource *res = dev->resource_list; res != NULL; res = res->next) {
Arthur Heymans68b2b8f2022-12-19 15:04:50 +0100361 if (res->flags & IORESOURCE_FIXED)
362 continue;
363 if ((res->flags & IORESOURCE_TYPE_MASK) != type)
364 continue;
Nico Huberee570652020-05-24 17:56:51 +0200365 print_domain_res(dev, res, " done");
Arthur Heymans68b2b8f2022-12-19 15:04:50 +0100366 }
367}
368
Nico Huber9260ea62020-05-23 23:20:13 +0200369static void assign_resource(struct resource *const res, const resource_t base,
370 const struct device *const dev)
371{
372 res->base = base;
373 res->limit = res->base + res->size - 1;
374 res->flags |= IORESOURCE_ASSIGNED;
375 res->flags &= ~IORESOURCE_STORED;
376
Nico Huberee570652020-05-24 17:56:51 +0200377 print_assigned_res(dev, res);
Nico Huber9260ea62020-05-23 23:20:13 +0200378}
379
380/*
381 * This is where the actual allocation of resources happens during
382 * pass 2. We construct a list of memory ranges corresponding to the
383 * resource of a given type, then look for the biggest unallocated
384 * resource on the downstream bus. This continues in a descending order
385 * until all resources of a given type have space allocated within the
386 * domain's resource window.
387 */
388static void allocate_toplevel_resources(const struct device *const domain,
389 const unsigned long type)
390{
391 const unsigned long type_mask = IORESOURCE_TYPE_MASK;
392 struct resource *res = NULL;
393 const struct device *dev;
394 struct memranges ranges;
395 resource_t base;
396
397 if (!dev_has_children(domain))
398 return;
399
400 setup_resource_ranges(domain, type, &ranges);
401
402 while ((dev = largest_resource(domain->link_list, &res, type_mask, type))) {
403
404 if (!res->size)
405 continue;
406
Nico Huber0754e002023-06-22 23:17:40 +0200407 if (!memranges_steal(&ranges, effective_limit(res), res->size, res->align,
408 type, &base, CONFIG(RESOURCE_ALLOCATION_TOP_DOWN))) {
Nico Huberee570652020-05-24 17:56:51 +0200409 printk(BIOS_ERR, "Resource didn't fit!!!\n");
410 print_failed_res(dev, res);
Nico Huber9260ea62020-05-23 23:20:13 +0200411 continue;
412 }
413
414 assign_resource(res, base, dev);
415 }
416
417 cleanup_domain_resource_ranges(domain, &ranges, type);
418}
419
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700420/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200421 * Pass 2 of the resource allocator at the bridge level loops through
Nico Huber9260ea62020-05-23 23:20:13 +0200422 * all the resources for the bridge and assigns all the base addresses
423 * of its children's resources of the same type. update_bridge_resource()
424 * of pass 1 pre-calculated the offsets of these bases inside the bridge
425 * resource. Now that the bridge resource is allocated, all we have to
426 * do is to add its final base to these offsets.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700427 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200428 * Once allocation at the current bridge is complete, resource allocator
429 * continues walking down the downstream bridges until it hits the leaf
430 * devices.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700431 */
Nico Huber9260ea62020-05-23 23:20:13 +0200432static void assign_resource_cb(void *param, struct device *dev, struct resource *res)
433{
434 /* We have to filter the same resources as update_bridge_resource(). */
435 if (!res->size || !res->limit)
436 return;
437
438 assign_resource(res, *(const resource_t *)param + res->base, dev);
439}
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700440static void allocate_bridge_resources(const struct device *bridge)
441{
Nico Huber9260ea62020-05-23 23:20:13 +0200442 const unsigned long type_mask =
443 IORESOURCE_TYPE_MASK | IORESOURCE_PREFETCH | IORESOURCE_FIXED;
444 struct bus *const bus = bridge->link_list;
445 struct resource *res;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700446 struct device *child;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700447
Nico Huber9260ea62020-05-23 23:20:13 +0200448 for (res = bridge->resource_list; res != NULL; res = res->next) {
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700449 if (!res->size)
450 continue;
451
452 if (!(res->flags & IORESOURCE_BRIDGE))
453 continue;
454
Nico Huber9260ea62020-05-23 23:20:13 +0200455 if (!(res->flags & IORESOURCE_ASSIGNED))
456 continue;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700457
Nico Huber9260ea62020-05-23 23:20:13 +0200458 /* Run assign_resource_cb() for all downstream resources of the same type. */
459 search_bus_resources(bus, type_mask, res->flags & type_mask,
460 assign_resource_cb, &res->base);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700461 }
462
Nico Huber9260ea62020-05-23 23:20:13 +0200463 for (child = bus->children; child != NULL; child = child->sibling) {
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700464 if (!dev_has_children(child))
465 continue;
466
467 allocate_bridge_resources(child);
468 }
469}
470
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700471/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200472 * Pass 2 of resource allocator begins at the domain level. Every domain
473 * has two types of resources - io and mem. For each of these resources,
474 * this function creates a list of memory ranges that can be used for
475 * downstream resource allocation. This list is constrained to remove
476 * any fixed resources in the domain sub-tree of the given resource
477 * type. It then uses the memory ranges to apply best fit on the
478 * resource requirements of the downstream devices.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700479 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200480 * Once resources are allocated to all downstream devices of the domain,
Nico Huber9260ea62020-05-23 23:20:13 +0200481 * it walks down each downstream bridge to finish resource assignment
482 * of its children resources within its own window.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700483 */
484static void allocate_domain_resources(const struct device *domain)
485{
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700486 /* Resource type I/O */
Nico Huber9260ea62020-05-23 23:20:13 +0200487 allocate_toplevel_resources(domain, IORESOURCE_IO);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700488
489 /*
490 * Resource type Mem:
Nico Huber9d7728a2020-05-23 18:00:10 +0200491 * Domain does not distinguish between mem and prefmem resources. Thus,
492 * the resource allocation at domain level considers mem and prefmem
493 * together when finding the best fit based on the biggest resource
494 * requirement.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700495 */
Nico Huber9260ea62020-05-23 23:20:13 +0200496 allocate_toplevel_resources(domain, IORESOURCE_MEM);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700497
Nico Huber9260ea62020-05-23 23:20:13 +0200498 struct device *child;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700499 for (child = domain->link_list->children; child; child = child->sibling) {
500 if (!dev_has_children(child))
501 continue;
502
503 /* Continue allocation for all downstream bridges. */
504 allocate_bridge_resources(child);
505 }
506}
507
508/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200509 * This function forms the guts of the resource allocator. It walks
510 * through the entire device tree for each domain two times.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700511 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200512 * Every domain has a fixed set of ranges. These ranges cannot be
513 * relaxed based on the requirements of the downstream devices. They
514 * represent the available windows from which resources can be allocated
515 * to the different devices under the domain.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700516 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200517 * In order to identify the requirements of downstream devices, resource
518 * allocator walks in a DFS fashion. It gathers the requirements from
519 * leaf devices and propagates those back up to their upstream bridges
520 * until the requirements for all the downstream devices of the domain
521 * are gathered. This is referred to as pass 1 of the resource allocator.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700522 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200523 * Once the requirements for all the devices under the domain are
524 * gathered, the resource allocator walks a second time to allocate
525 * resources to downstream devices as per the requirements. It always
526 * picks the biggest resource request as per the type (i/o and mem) to
527 * allocate space from its fixed window to the immediate downstream
528 * device of the domain. In order to accomplish best fit for the
529 * resources, a list of ranges is maintained by each resource type (i/o
530 * and mem). At the domain level we don't differentiate between mem and
531 * prefmem. Since they are allocated space from the same window, the
532 * resource allocator at the domain level ensures that the biggest
533 * requirement is selected independent of the prefetch type. Once the
534 * resource allocation for all immediate downstream devices is complete
535 * at the domain level, the resource allocator walks down the subtree
536 * for each downstream bridge to continue the allocation process at the
Nico Huber9260ea62020-05-23 23:20:13 +0200537 * bridge level. Since bridges have either their whole window allocated
538 * or nothing, we only need to place downstream resources inside these
539 * windows by re-using offsets that were pre-calculated in pass 1. This
540 * continues until resource allocation is realized for all downstream
541 * bridges in the domain sub-tree. This is referred to as pass 2 of the
542 * resource allocator.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700543 *
544 * Some rules that are followed by the resource allocator:
Nico Huber9d7728a2020-05-23 18:00:10 +0200545 * - Allocate resource locations for every device as long as
546 * the requirements can be satisfied.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700547 * - Don't overlap with resources in fixed locations.
Nico Huber9d7728a2020-05-23 18:00:10 +0200548 * - Don't overlap and follow the rules of bridges -- downstream
549 * devices of bridges should use parts of the address space
550 * allocated to the bridge.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700551 */
552void allocate_resources(const struct device *root)
553{
554 const struct device *child;
555
556 if ((root == NULL) || (root->link_list == NULL))
557 return;
558
559 for (child = root->link_list->children; child; child = child->sibling) {
560
561 if (child->path.type != DEVICE_PATH_DOMAIN)
562 continue;
563
564 post_log_path(child);
565
Nico Huber9260ea62020-05-23 23:20:13 +0200566 /* Pass 1 - Relative placement. */
567 printk(BIOS_INFO, "=== Resource allocator: %s - Pass 1 (relative placement) ===\n",
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700568 dev_path(child));
569 compute_domain_resources(child);
570
571 /* Pass 2 - Allocate resources as per gathered requirements. */
Furquan Shaikhc3568612020-05-16 15:18:23 -0700572 printk(BIOS_INFO, "=== Resource allocator: %s - Pass 2 (allocating resources) ===\n",
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700573 dev_path(child));
574 allocate_domain_resources(child);
Furquan Shaikhc3568612020-05-16 15:18:23 -0700575
576 printk(BIOS_INFO, "=== Resource allocator: %s - resource allocation complete ===\n",
577 dev_path(child));
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700578 }
579}