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Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -07001/* SPDX-License-Identifier: GPL-2.0-only */
2
Elyes Haouas04c3b5a2022-10-07 10:08:05 +02003#include <commonlib/bsd/helpers.h>
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -07004#include <console/console.h>
5#include <device/device.h>
6#include <memrange.h>
7#include <post.h>
Elyes Haouas04c3b5a2022-10-07 10:08:05 +02008#include <types.h>
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -07009
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070010static const char *resource2str(const struct resource *res)
11{
12 if (res->flags & IORESOURCE_IO)
13 return "io";
14 if (res->flags & IORESOURCE_PREFETCH)
15 return "prefmem";
16 if (res->flags & IORESOURCE_MEM)
17 return "mem";
18 return "undefined";
19}
20
21static bool dev_has_children(const struct device *dev)
22{
23 const struct bus *bus = dev->link_list;
24 return bus && bus->children;
25}
26
Nico Huber52263012020-05-23 19:15:36 +020027static resource_t effective_limit(const struct resource *const res)
28{
29 /* Always allow bridge resources above 4G. */
30 if (res->flags & IORESOURCE_BRIDGE)
31 return res->limit;
32
33 const resource_t quirk_4g_limit =
34 res->flags & IORESOURCE_ABOVE_4G ? UINT64_MAX : UINT32_MAX;
35 return MIN(res->limit, quirk_4g_limit);
36}
37
Furquan Shaikhc3568612020-05-16 15:18:23 -070038#define res_printk(depth, str, ...) printk(BIOS_DEBUG, "%*c"str, depth, ' ', __VA_ARGS__)
39
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070040/*
Nico Huber9d7728a2020-05-23 18:00:10 +020041 * During pass 1, once all the requirements for downstream devices of a
42 * bridge are gathered, this function calculates the overall resource
43 * requirement for the bridge. It starts by picking the largest resource
44 * requirement downstream for the given resource type and works by
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070045 * adding requirements in descending order.
46 *
Nico Huber9d7728a2020-05-23 18:00:10 +020047 * Additionally, it takes alignment and limits of the downstream devices
48 * into consideration and ensures that they get propagated to the bridge
49 * resource. This is required to guarantee that the upstream bridge/
50 * domain honors the limit and alignment requirements for this bridge
51 * based on the tightest constraints downstream.
Nico Huber9260ea62020-05-23 23:20:13 +020052 *
53 * Last but not least, it stores the offset inside the bridge resource
54 * for each child resource in its base field. This simplifies pass 2
55 * for resources behind a bridge, as we only have to add offsets to the
56 * allocated base of the bridge resource.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070057 */
58static void update_bridge_resource(const struct device *bridge, struct resource *bridge_res,
Furquan Shaikhc3568612020-05-16 15:18:23 -070059 unsigned long type_match, int print_depth)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070060{
61 const struct device *child;
62 struct resource *child_res;
63 resource_t base;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070064 const unsigned long type_mask = IORESOURCE_TYPE_MASK | IORESOURCE_PREFETCH;
65 struct bus *bus = bridge->link_list;
66
67 child_res = NULL;
68
69 /*
Nico Huber9d7728a2020-05-23 18:00:10 +020070 * `base` keeps track of where the next allocation for child resources
71 * can take place from within the bridge resource window. Since the
72 * bridge resource window allocation is not performed yet, it can start
73 * at 0. Base gets updated every time a resource requirement is
74 * accounted for in the loop below. After scanning all these resources,
75 * base will indicate the total size requirement for the current bridge
76 * resource window.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070077 */
78 base = 0;
79
Arthur Heymansd436b162023-05-23 22:47:05 +020080 res_printk(print_depth, "%s %s: size: %llx align: %u gran: %u limit: %llx\n",
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070081 dev_path(bridge), resource2str(bridge_res), bridge_res->size,
82 bridge_res->align, bridge_res->gran, bridge_res->limit);
83
84 while ((child = largest_resource(bus, &child_res, type_mask, type_match))) {
85
86 /* Size 0 resources can be skipped. */
87 if (!child_res->size)
88 continue;
89
Nico Huberec7b3132020-05-23 18:20:47 +020090 /* Resources with 0 limit can't be assigned anything. */
91 if (!child_res->limit)
92 continue;
93
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070094 /*
Nico Huber74169c12020-05-23 18:15:34 +020095 * Propagate the resource alignment to the bridge resource. The
96 * condition can only be true for the first (largest) resource. For all
Nico Huber9260ea62020-05-23 23:20:13 +020097 * other child resources, alignment is taken care of by rounding their
98 * base up.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -070099 */
Nico Huber74169c12020-05-23 18:15:34 +0200100 if (child_res->align > bridge_res->align)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700101 bridge_res->align = child_res->align;
102
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700103 /*
Nico Huberec7b3132020-05-23 18:20:47 +0200104 * Propagate the resource limit to the bridge resource. If a downstream
105 * device has stricter requirements w.r.t. limits for any resource, that
Nico Huber9260ea62020-05-23 23:20:13 +0200106 * constraint needs to be propagated back up to the bridges downstream
107 * of the domain. This way, the whole bridge resource fulfills the limit.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700108 */
Nico Huber52263012020-05-23 19:15:36 +0200109 if (effective_limit(child_res) < bridge_res->limit)
110 bridge_res->limit = effective_limit(child_res);
Furquan Shaikh1bb05ef302020-05-15 17:33:52 -0700111
112 /*
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700113 * Alignment value of 0 means that the child resource has no alignment
114 * requirements and so the base value remains unchanged here.
115 */
Nico Huberb3277042020-05-23 18:08:50 +0200116 base = ALIGN_UP(base, POWER_OF_2(child_res->align));
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700117
Nico Huber9260ea62020-05-23 23:20:13 +0200118 /*
119 * Store the relative offset inside the bridge resource for later
120 * consumption in allocate_bridge_resources(), and invalidate flags
121 * related to the base.
122 */
123 child_res->base = base;
124 child_res->flags &= ~(IORESOURCE_ASSIGNED | IORESOURCE_STORED);
125
Furquan Shaikhc3568612020-05-16 15:18:23 -0700126 res_printk(print_depth + 1, "%s %02lx * [0x%llx - 0x%llx] %s\n",
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700127 dev_path(child), child_res->index, base, base + child_res->size - 1,
128 resource2str(child_res));
129
130 base += child_res->size;
131 }
132
133 /*
Nico Huber9d7728a2020-05-23 18:00:10 +0200134 * After all downstream device resources are scanned, `base` represents
135 * the total size requirement for the current bridge resource window.
136 * This size needs to be rounded up to the granularity requirement of
137 * the bridge to ensure that the upstream bridge/domain allocates big
138 * enough window.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700139 */
Nico Huberb3277042020-05-23 18:08:50 +0200140 bridge_res->size = ALIGN_UP(base, POWER_OF_2(bridge_res->gran));
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700141
Arthur Heymansd436b162023-05-23 22:47:05 +0200142 res_printk(print_depth, "%s %s: size: %llx align: %u gran: %u limit: %llx done\n",
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700143 dev_path(bridge), resource2str(bridge_res), bridge_res->size,
144 bridge_res->align, bridge_res->gran, bridge_res->limit);
145}
146
147/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200148 * During pass 1, at the bridge level, the resource allocator gathers
149 * requirements from downstream devices and updates its own resource
150 * windows for the provided resource type.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700151 */
Furquan Shaikhc3568612020-05-16 15:18:23 -0700152static void compute_bridge_resources(const struct device *bridge, unsigned long type_match,
153 int print_depth)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700154{
155 const struct device *child;
156 struct resource *res;
157 struct bus *bus = bridge->link_list;
158 const unsigned long type_mask = IORESOURCE_TYPE_MASK | IORESOURCE_PREFETCH;
159
160 for (res = bridge->resource_list; res; res = res->next) {
161 if (!(res->flags & IORESOURCE_BRIDGE))
162 continue;
163
164 if ((res->flags & type_mask) != type_match)
165 continue;
166
167 /*
168 * Ensure that the resource requirements for all downstream bridges are
169 * gathered before updating the window for current bridge resource.
170 */
171 for (child = bus->children; child; child = child->sibling) {
172 if (!dev_has_children(child))
173 continue;
Furquan Shaikhc3568612020-05-16 15:18:23 -0700174 compute_bridge_resources(child, type_match, print_depth + 1);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700175 }
176
177 /*
178 * Update the window for current bridge resource now that all downstream
179 * requirements are gathered.
180 */
Furquan Shaikhc3568612020-05-16 15:18:23 -0700181 update_bridge_resource(bridge, res, type_match, print_depth);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700182 }
183}
184
185/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200186 * During pass 1, the resource allocator walks down the entire sub-tree
187 * of a domain. It gathers resource requirements for every downstream
188 * bridge by looking at the resource requests of its children. Thus, the
189 * requirement gathering begins at the leaf devices and is propagated
190 * back up to the downstream bridges of the domain.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700191 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200192 * At the domain level, it identifies every downstream bridge and walks
193 * down that bridge to gather requirements for each resource type i.e.
194 * i/o, mem and prefmem. Since bridges have separate windows for mem and
195 * prefmem, requirements for each need to be collected separately.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700196 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200197 * Domain resource windows are fixed ranges and hence requirement
198 * gathering does not result in any changes to these fixed ranges.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700199 */
200static void compute_domain_resources(const struct device *domain)
201{
202 const struct device *child;
Furquan Shaikhc3568612020-05-16 15:18:23 -0700203 const int print_depth = 1;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700204
205 if (domain->link_list == NULL)
206 return;
207
208 for (child = domain->link_list->children; child; child = child->sibling) {
209
210 /* Skip if this is not a bridge or has no children under it. */
211 if (!dev_has_children(child))
212 continue;
213
Furquan Shaikhc3568612020-05-16 15:18:23 -0700214 compute_bridge_resources(child, IORESOURCE_IO, print_depth);
215 compute_bridge_resources(child, IORESOURCE_MEM, print_depth);
216 compute_bridge_resources(child, IORESOURCE_MEM | IORESOURCE_PREFETCH,
217 print_depth);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700218 }
219}
220
Arthur Heymans68b2b8f2022-12-19 15:04:50 +0100221static unsigned char get_alignment_by_resource_type(const unsigned long type)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700222{
Arthur Heymans68b2b8f2022-12-19 15:04:50 +0100223 if (type & IORESOURCE_MEM)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700224 return 12; /* Page-aligned --> log2(4KiB) */
Arthur Heymans68b2b8f2022-12-19 15:04:50 +0100225 else if (type & IORESOURCE_IO)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700226 return 0; /* No special alignment required --> log2(1) */
227
Arthur Heymans68b2b8f2022-12-19 15:04:50 +0100228 die("Unexpected resource type: flags(%lu)!\n", type);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700229}
230
Furquan Shaikhc3568612020-05-16 15:18:23 -0700231static void print_resource_ranges(const struct device *dev, const struct memranges *ranges)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700232{
233 const struct range_entry *r;
234
Furquan Shaikhc3568612020-05-16 15:18:23 -0700235 printk(BIOS_INFO, " %s: Resource ranges:\n", dev_path(dev));
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700236
237 if (memranges_is_empty(ranges))
Furquan Shaikhc3568612020-05-16 15:18:23 -0700238 printk(BIOS_INFO, " * EMPTY!!\n");
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700239
240 memranges_each_entry(r, ranges) {
Furquan Shaikhc3568612020-05-16 15:18:23 -0700241 printk(BIOS_INFO, " * Base: %llx, Size: %llx, Tag: %lx\n",
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700242 range_entry_base(r), range_entry_size(r), range_entry_tag(r));
243 }
244}
245
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700246static void update_constraints(struct memranges *ranges, const struct device *dev,
247 const struct resource *res)
248{
249 if (!res->size)
250 return;
251
Furquan Shaikhc3568612020-05-16 15:18:23 -0700252 printk(BIOS_DEBUG, " %s: %s %02lx base %08llx limit %08llx %s (fixed)\n",
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700253 __func__, dev_path(dev), res->index, res->base,
254 res->base + res->size - 1, resource2str(res));
255
256 memranges_create_hole(ranges, res->base, res->size);
257}
258
259/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200260 * Scan the entire tree to identify any fixed resources allocated by
261 * any device to ensure that the address map for domain resources are
262 * appropriately updated.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700263 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200264 * Domains can typically provide a memrange for entire address space.
265 * So, this function punches holes in the address space for all fixed
266 * resources that are already defined. Both I/O and normal memory
267 * resources are added as fixed. Both need to be removed from address
268 * space where dynamic resource allocations are sourced.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700269 */
270static void avoid_fixed_resources(struct memranges *ranges, const struct device *dev,
271 unsigned long mask_match)
272{
273 const struct resource *res;
274 const struct device *child;
275 const struct bus *bus;
276
277 for (res = dev->resource_list; res != NULL; res = res->next) {
278 if ((res->flags & mask_match) != mask_match)
279 continue;
280 update_constraints(ranges, dev, res);
281 }
282
283 bus = dev->link_list;
284 if (bus == NULL)
285 return;
286
287 for (child = bus->children; child != NULL; child = child->sibling)
288 avoid_fixed_resources(ranges, child, mask_match);
289}
290
291static void constrain_domain_resources(const struct device *domain, struct memranges *ranges,
292 unsigned long type)
293{
294 unsigned long mask_match = type | IORESOURCE_FIXED;
295
296 if (type == IORESOURCE_IO) {
297 /*
Nico Huber9d7728a2020-05-23 18:00:10 +0200298 * Don't allow allocations in the VGA I/O range. PCI has special
299 * cases for that.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700300 */
Furquan Shaikh563e6142020-05-26 12:04:35 -0700301 memranges_create_hole(ranges, 0x3b0, 0x3df - 0x3b0 + 1);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700302
303 /*
Nico Huber9d7728a2020-05-23 18:00:10 +0200304 * Resource allocator no longer supports the legacy behavior where
305 * I/O resource allocation is guaranteed to avoid aliases over legacy
306 * PCI expansion card addresses.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700307 */
308 }
309
310 avoid_fixed_resources(ranges, domain, mask_match);
311}
312
313/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200314 * This function creates a list of memranges of given type using the
Nico Huber9260ea62020-05-23 23:20:13 +0200315 * resource that is provided. It applies additional constraints to
316 * ensure that the memranges do not overlap any of the fixed resources
317 * under the domain. The domain typically provides a memrange for the
318 * entire address space. Thus, it is up to the chipset to add DRAM and
319 * all other windows which cannot be used for resource allocation as
320 * fixed resources.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700321 */
Nico Huber9260ea62020-05-23 23:20:13 +0200322static void setup_resource_ranges(const struct device *const domain,
323 const unsigned long type,
324 struct memranges *const ranges)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700325{
Nico Huber9260ea62020-05-23 23:20:13 +0200326 const unsigned long type_mask = IORESOURCE_TYPE_MASK | IORESOURCE_FIXED;
Nico Huber52263012020-05-23 19:15:36 +0200327 const unsigned char alignment = get_alignment_by_resource_type(type);
328
329 memranges_init_empty_with_alignment(ranges, NULL, 0, alignment);
330
Nico Huber9260ea62020-05-23 23:20:13 +0200331 for (struct resource *res = domain->resource_list; res != NULL; res = res->next) {
332 if ((res->flags & type_mask) != type)
Nico Huber52263012020-05-23 19:15:36 +0200333 continue;
334
335 printk(BIOS_DEBUG, "%s %s: base: %llx size: %llx align: %u gran: %u limit: %llx\n",
Nico Huber9260ea62020-05-23 23:20:13 +0200336 dev_path(domain), resource2str(res), res->base, res->size, res->align,
Nico Huber52263012020-05-23 19:15:36 +0200337 res->gran, res->limit);
338
339 memranges_insert(ranges, res->base, res->limit - res->base + 1, type);
Nico Huber38aafa32022-09-04 22:20:21 +0200340 }
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700341
Nico Huber9260ea62020-05-23 23:20:13 +0200342 constrain_domain_resources(domain, ranges, type);
Nico Huber52263012020-05-23 19:15:36 +0200343
Nico Huber9260ea62020-05-23 23:20:13 +0200344 print_resource_ranges(domain, ranges);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700345}
346
Arthur Heymans68b2b8f2022-12-19 15:04:50 +0100347static void print_resource_done(const struct device *dev, const struct resource *res)
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700348{
Arthur Heymansd436b162023-05-23 22:47:05 +0200349 printk(BIOS_DEBUG, "%s %s: base: %llx size: %llx align: %u gran: %u limit: %llx done\n",
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700350 dev_path(dev), resource2str(res), res->base, res->size, res->align,
351 res->gran, res->limit);
352}
353
Arthur Heymans68b2b8f2022-12-19 15:04:50 +0100354static void cleanup_domain_resource_ranges(const struct device *dev, struct memranges *ranges,
355 unsigned long type)
356{
357 memranges_teardown(ranges);
358 for (struct resource *res = dev->resource_list; res != NULL; res = res->next) {
Arthur Heymans68b2b8f2022-12-19 15:04:50 +0100359 if (res->flags & IORESOURCE_FIXED)
360 continue;
361 if ((res->flags & IORESOURCE_TYPE_MASK) != type)
362 continue;
363 print_resource_done(dev, res);
364 }
365}
366
Nico Huber9260ea62020-05-23 23:20:13 +0200367static void assign_resource(struct resource *const res, const resource_t base,
368 const struct device *const dev)
369{
370 res->base = base;
371 res->limit = res->base + res->size - 1;
372 res->flags |= IORESOURCE_ASSIGNED;
373 res->flags &= ~IORESOURCE_STORED;
374
375 printk(BIOS_DEBUG, " %s %02lx * [0x%llx - 0x%llx] limit: %llx %s\n",
376 dev_path(dev), res->index, res->base, res->limit, res->limit, resource2str(res));
377}
378
379/*
380 * This is where the actual allocation of resources happens during
381 * pass 2. We construct a list of memory ranges corresponding to the
382 * resource of a given type, then look for the biggest unallocated
383 * resource on the downstream bus. This continues in a descending order
384 * until all resources of a given type have space allocated within the
385 * domain's resource window.
386 */
387static void allocate_toplevel_resources(const struct device *const domain,
388 const unsigned long type)
389{
390 const unsigned long type_mask = IORESOURCE_TYPE_MASK;
391 struct resource *res = NULL;
392 const struct device *dev;
393 struct memranges ranges;
394 resource_t base;
395
396 if (!dev_has_children(domain))
397 return;
398
399 setup_resource_ranges(domain, type, &ranges);
400
401 while ((dev = largest_resource(domain->link_list, &res, type_mask, type))) {
402
403 if (!res->size)
404 continue;
405
406 if (!memranges_steal(&ranges, res->limit, res->size, res->align, type, &base,
407 CONFIG(RESOURCE_ALLOCATION_TOP_DOWN))) {
408 printk(BIOS_ERR, "Resource didn't fit!!! ");
409 printk(BIOS_DEBUG, " %s %02lx * size: 0x%llx limit: %llx %s\n",
410 dev_path(dev), res->index, res->size,
411 res->limit, resource2str(res));
412 continue;
413 }
414
415 assign_resource(res, base, dev);
416 }
417
418 cleanup_domain_resource_ranges(domain, &ranges, type);
419}
420
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700421/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200422 * Pass 2 of the resource allocator at the bridge level loops through
Nico Huber9260ea62020-05-23 23:20:13 +0200423 * all the resources for the bridge and assigns all the base addresses
424 * of its children's resources of the same type. update_bridge_resource()
425 * of pass 1 pre-calculated the offsets of these bases inside the bridge
426 * resource. Now that the bridge resource is allocated, all we have to
427 * do is to add its final base to these offsets.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700428 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200429 * Once allocation at the current bridge is complete, resource allocator
430 * continues walking down the downstream bridges until it hits the leaf
431 * devices.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700432 */
Nico Huber9260ea62020-05-23 23:20:13 +0200433static void assign_resource_cb(void *param, struct device *dev, struct resource *res)
434{
435 /* We have to filter the same resources as update_bridge_resource(). */
436 if (!res->size || !res->limit)
437 return;
438
439 assign_resource(res, *(const resource_t *)param + res->base, dev);
440}
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700441static void allocate_bridge_resources(const struct device *bridge)
442{
Nico Huber9260ea62020-05-23 23:20:13 +0200443 const unsigned long type_mask =
444 IORESOURCE_TYPE_MASK | IORESOURCE_PREFETCH | IORESOURCE_FIXED;
445 struct bus *const bus = bridge->link_list;
446 struct resource *res;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700447 struct device *child;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700448
Nico Huber9260ea62020-05-23 23:20:13 +0200449 for (res = bridge->resource_list; res != NULL; res = res->next) {
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700450 if (!res->size)
451 continue;
452
453 if (!(res->flags & IORESOURCE_BRIDGE))
454 continue;
455
Nico Huber9260ea62020-05-23 23:20:13 +0200456 if (!(res->flags & IORESOURCE_ASSIGNED))
457 continue;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700458
Nico Huber9260ea62020-05-23 23:20:13 +0200459 /* Run assign_resource_cb() for all downstream resources of the same type. */
460 search_bus_resources(bus, type_mask, res->flags & type_mask,
461 assign_resource_cb, &res->base);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700462 }
463
Nico Huber9260ea62020-05-23 23:20:13 +0200464 for (child = bus->children; child != NULL; child = child->sibling) {
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700465 if (!dev_has_children(child))
466 continue;
467
468 allocate_bridge_resources(child);
469 }
470}
471
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700472/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200473 * Pass 2 of resource allocator begins at the domain level. Every domain
474 * has two types of resources - io and mem. For each of these resources,
475 * this function creates a list of memory ranges that can be used for
476 * downstream resource allocation. This list is constrained to remove
477 * any fixed resources in the domain sub-tree of the given resource
478 * type. It then uses the memory ranges to apply best fit on the
479 * resource requirements of the downstream devices.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700480 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200481 * Once resources are allocated to all downstream devices of the domain,
Nico Huber9260ea62020-05-23 23:20:13 +0200482 * it walks down each downstream bridge to finish resource assignment
483 * of its children resources within its own window.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700484 */
485static void allocate_domain_resources(const struct device *domain)
486{
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700487 /* Resource type I/O */
Nico Huber9260ea62020-05-23 23:20:13 +0200488 allocate_toplevel_resources(domain, IORESOURCE_IO);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700489
490 /*
491 * Resource type Mem:
Nico Huber9d7728a2020-05-23 18:00:10 +0200492 * Domain does not distinguish between mem and prefmem resources. Thus,
493 * the resource allocation at domain level considers mem and prefmem
494 * together when finding the best fit based on the biggest resource
495 * requirement.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700496 */
Nico Huber9260ea62020-05-23 23:20:13 +0200497 allocate_toplevel_resources(domain, IORESOURCE_MEM);
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700498
Nico Huber9260ea62020-05-23 23:20:13 +0200499 struct device *child;
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700500 for (child = domain->link_list->children; child; child = child->sibling) {
501 if (!dev_has_children(child))
502 continue;
503
504 /* Continue allocation for all downstream bridges. */
505 allocate_bridge_resources(child);
506 }
507}
508
509/*
Nico Huber9d7728a2020-05-23 18:00:10 +0200510 * This function forms the guts of the resource allocator. It walks
511 * through the entire device tree for each domain two times.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700512 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200513 * Every domain has a fixed set of ranges. These ranges cannot be
514 * relaxed based on the requirements of the downstream devices. They
515 * represent the available windows from which resources can be allocated
516 * to the different devices under the domain.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700517 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200518 * In order to identify the requirements of downstream devices, resource
519 * allocator walks in a DFS fashion. It gathers the requirements from
520 * leaf devices and propagates those back up to their upstream bridges
521 * until the requirements for all the downstream devices of the domain
522 * are gathered. This is referred to as pass 1 of the resource allocator.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700523 *
Nico Huber9d7728a2020-05-23 18:00:10 +0200524 * Once the requirements for all the devices under the domain are
525 * gathered, the resource allocator walks a second time to allocate
526 * resources to downstream devices as per the requirements. It always
527 * picks the biggest resource request as per the type (i/o and mem) to
528 * allocate space from its fixed window to the immediate downstream
529 * device of the domain. In order to accomplish best fit for the
530 * resources, a list of ranges is maintained by each resource type (i/o
531 * and mem). At the domain level we don't differentiate between mem and
532 * prefmem. Since they are allocated space from the same window, the
533 * resource allocator at the domain level ensures that the biggest
534 * requirement is selected independent of the prefetch type. Once the
535 * resource allocation for all immediate downstream devices is complete
536 * at the domain level, the resource allocator walks down the subtree
537 * for each downstream bridge to continue the allocation process at the
Nico Huber9260ea62020-05-23 23:20:13 +0200538 * bridge level. Since bridges have either their whole window allocated
539 * or nothing, we only need to place downstream resources inside these
540 * windows by re-using offsets that were pre-calculated in pass 1. This
541 * continues until resource allocation is realized for all downstream
542 * bridges in the domain sub-tree. This is referred to as pass 2 of the
543 * resource allocator.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700544 *
545 * Some rules that are followed by the resource allocator:
Nico Huber9d7728a2020-05-23 18:00:10 +0200546 * - Allocate resource locations for every device as long as
547 * the requirements can be satisfied.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700548 * - Don't overlap with resources in fixed locations.
Nico Huber9d7728a2020-05-23 18:00:10 +0200549 * - Don't overlap and follow the rules of bridges -- downstream
550 * devices of bridges should use parts of the address space
551 * allocated to the bridge.
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700552 */
553void allocate_resources(const struct device *root)
554{
555 const struct device *child;
556
557 if ((root == NULL) || (root->link_list == NULL))
558 return;
559
560 for (child = root->link_list->children; child; child = child->sibling) {
561
562 if (child->path.type != DEVICE_PATH_DOMAIN)
563 continue;
564
565 post_log_path(child);
566
Nico Huber9260ea62020-05-23 23:20:13 +0200567 /* Pass 1 - Relative placement. */
568 printk(BIOS_INFO, "=== Resource allocator: %s - Pass 1 (relative placement) ===\n",
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700569 dev_path(child));
570 compute_domain_resources(child);
571
572 /* Pass 2 - Allocate resources as per gathered requirements. */
Furquan Shaikhc3568612020-05-16 15:18:23 -0700573 printk(BIOS_INFO, "=== Resource allocator: %s - Pass 2 (allocating resources) ===\n",
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700574 dev_path(child));
575 allocate_domain_resources(child);
Furquan Shaikhc3568612020-05-16 15:18:23 -0700576
577 printk(BIOS_INFO, "=== Resource allocator: %s - resource allocation complete ===\n",
578 dev_path(child));
Furquan Shaikhf4bc9eb2020-05-15 16:04:28 -0700579 }
580}