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Simon Glass38d875f2018-04-30 14:08:31 -06001/*
Simon Glass38d875f2018-04-30 14:08:31 -06002 * This file is part of the coreboot project.
3 *
Simon Glass38d875f2018-04-30 14:08:31 -06004 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
Martin Rothcddd6002019-09-23 17:38:27 -060014/* Driver for BayHub Technology BH720 PCI to eMMC 5.0 HS200 bridge */
15
Simon Glass38d875f2018-04-30 14:08:31 -060016#include <console/console.h>
17#include <device/device.h>
18#include <device/path.h>
19#include <device/pci.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +020020#include <device/pci_ops.h>
Simon Glass38d875f2018-04-30 14:08:31 -060021#include <device/pci_ids.h>
22#include "chip.h"
Kevin Chiu089b6852018-08-03 18:52:18 +080023#include "bh720.h"
Simon Glass38d875f2018-04-30 14:08:31 -060024
Kevin Chiu328ff7d2018-08-27 11:44:46 +080025__attribute__((weak)) void board_bh720(struct device *dev)
Kevin Chiu089b6852018-08-03 18:52:18 +080026{
27}
Simon Glass38d875f2018-04-30 14:08:31 -060028
29static void bh720_init(struct device *dev)
30{
31 struct drivers_generic_bayhub_config *config = dev->chip_info;
32
33 pci_dev_init(dev);
34
35 if (config && config->power_saving) {
36 /*
37 * This procedure for enabling power-saving mode is from the
38 * BayHub BIOS Implementation Guideline document.
39 */
Simon Glass4f160492018-05-23 15:34:04 -060040 pci_write_config32(dev, BH720_PROTECT,
41 BH720_PROTECT_OFF | BH720_PROTECT_LOCK_OFF);
Simon Glass38d875f2018-04-30 14:08:31 -060042 pci_or_config32(dev, BH720_RTD3_L1, BH720_RTD3_L1_DISABLE_L1);
43 pci_or_config32(dev, BH720_LINK_CTRL,
44 BH720_LINK_CTRL_L0_ENABLE |
45 BH720_LINK_CTRL_L1_ENABLE);
46 pci_or_config32(dev, BH720_LINK_CTRL, BH720_LINK_CTRL_CLKREQ);
Simon Glass4f160492018-05-23 15:34:04 -060047 pci_update_config32(dev, BH720_MISC2, ~BH720_MISC2_ASPM_DISABLE,
48 BH720_MISC2_APSM_CLKREQ_L1 |
49 BH720_MISC2_APSM_PHY_L1);
50 pci_write_config32(dev, BH720_PROTECT,
51 BH720_PROTECT_ON | BH720_PROTECT_LOCK_ON);
52
Simon Glass38d875f2018-04-30 14:08:31 -060053 printk(BIOS_INFO, "BayHub BH720: Power-saving enabled (link_ctrl=%#x)\n",
54 pci_read_config32(dev, BH720_LINK_CTRL));
55 }
Kevin Chiu089b6852018-08-03 18:52:18 +080056
Kevin Chiu328ff7d2018-08-27 11:44:46 +080057 board_bh720(dev);
Simon Glass38d875f2018-04-30 14:08:31 -060058}
59
60static struct pci_operations pci_ops = {
61 .set_subsystem = pci_dev_set_subsystem,
62};
63
64static struct device_operations bh720_ops = {
65 .read_resources = pci_dev_read_resources,
66 .set_resources = pci_dev_set_resources,
67 .enable_resources = pci_dev_enable_resources,
68 .ops_pci = &pci_ops,
69 .init = bh720_init,
70};
71
72static const unsigned short pci_device_ids[] = {
73 PCI_DEVICE_ID_O2_BH720,
74 0
75};
76
77static const struct pci_driver bayhub_bh720 __pci_driver = {
78 .ops = &bh720_ops,
79 .vendor = PCI_VENDOR_ID_O2,
80 .devices = pci_device_ids,
81};
82
Kyösti Mälkki08c76e12019-08-25 13:05:46 +030083struct chip_operations drivers_generic_bayhub_ops = {
Simon Glass38d875f2018-04-30 14:08:31 -060084 CHIP_NAME("BayHub Technology BH720 PCI to eMMC 5.0 HS200 bridge")
Simon Glass38d875f2018-04-30 14:08:31 -060085};