blob: b365132f06da370935f54623aba8f8939e8028e0 [file] [log] [blame]
Simon Glass38d875f2018-04-30 14:08:31 -06001/*
2 * Driver for BayHub Technology BH720 PCI to eMMC 5.0 HS200 bridge
3 *
4 * This file is part of the coreboot project.
5 *
Patrick Georgi5b2a2d02018-09-26 20:46:04 +02006 * Copyright 2018 Google LLC
Simon Glass38d875f2018-04-30 14:08:31 -06007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <console/console.h>
19#include <device/device.h>
20#include <device/path.h>
21#include <device/pci.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +020022#include <device/pci_ops.h>
Simon Glass38d875f2018-04-30 14:08:31 -060023#include <device/pci_ids.h>
24#include "chip.h"
Kevin Chiu089b6852018-08-03 18:52:18 +080025#include "bh720.h"
Simon Glass38d875f2018-04-30 14:08:31 -060026
Kevin Chiu328ff7d2018-08-27 11:44:46 +080027__attribute__((weak)) void board_bh720(struct device *dev)
Kevin Chiu089b6852018-08-03 18:52:18 +080028{
29}
Simon Glass38d875f2018-04-30 14:08:31 -060030
31static void bh720_init(struct device *dev)
32{
33 struct drivers_generic_bayhub_config *config = dev->chip_info;
34
35 pci_dev_init(dev);
36
37 if (config && config->power_saving) {
38 /*
39 * This procedure for enabling power-saving mode is from the
40 * BayHub BIOS Implementation Guideline document.
41 */
Simon Glass4f160492018-05-23 15:34:04 -060042 pci_write_config32(dev, BH720_PROTECT,
43 BH720_PROTECT_OFF | BH720_PROTECT_LOCK_OFF);
Simon Glass38d875f2018-04-30 14:08:31 -060044 pci_or_config32(dev, BH720_RTD3_L1, BH720_RTD3_L1_DISABLE_L1);
45 pci_or_config32(dev, BH720_LINK_CTRL,
46 BH720_LINK_CTRL_L0_ENABLE |
47 BH720_LINK_CTRL_L1_ENABLE);
48 pci_or_config32(dev, BH720_LINK_CTRL, BH720_LINK_CTRL_CLKREQ);
Simon Glass4f160492018-05-23 15:34:04 -060049 pci_update_config32(dev, BH720_MISC2, ~BH720_MISC2_ASPM_DISABLE,
50 BH720_MISC2_APSM_CLKREQ_L1 |
51 BH720_MISC2_APSM_PHY_L1);
52 pci_write_config32(dev, BH720_PROTECT,
53 BH720_PROTECT_ON | BH720_PROTECT_LOCK_ON);
54
Simon Glass38d875f2018-04-30 14:08:31 -060055 printk(BIOS_INFO, "BayHub BH720: Power-saving enabled (link_ctrl=%#x)\n",
56 pci_read_config32(dev, BH720_LINK_CTRL));
57 }
Kevin Chiu089b6852018-08-03 18:52:18 +080058
Kevin Chiu328ff7d2018-08-27 11:44:46 +080059 board_bh720(dev);
Simon Glass38d875f2018-04-30 14:08:31 -060060}
61
62static struct pci_operations pci_ops = {
63 .set_subsystem = pci_dev_set_subsystem,
64};
65
66static struct device_operations bh720_ops = {
67 .read_resources = pci_dev_read_resources,
68 .set_resources = pci_dev_set_resources,
69 .enable_resources = pci_dev_enable_resources,
70 .ops_pci = &pci_ops,
71 .init = bh720_init,
72};
73
74static const unsigned short pci_device_ids[] = {
75 PCI_DEVICE_ID_O2_BH720,
76 0
77};
78
79static const struct pci_driver bayhub_bh720 __pci_driver = {
80 .ops = &bh720_ops,
81 .vendor = PCI_VENDOR_ID_O2,
82 .devices = pci_device_ids,
83};
84
Kyösti Mälkki08c76e12019-08-25 13:05:46 +030085struct chip_operations drivers_generic_bayhub_ops = {
Simon Glass38d875f2018-04-30 14:08:31 -060086 CHIP_NAME("BayHub Technology BH720 PCI to eMMC 5.0 HS200 bridge")
Simon Glass38d875f2018-04-30 14:08:31 -060087};