Patrick Georgi | 7333a11 | 2020-05-08 20:48:04 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 2 | |
| 3 | #include "superiotool.h" |
| 4 | |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 5 | #define DEVICE_ID_BYTE1_REG 0x20 |
| 6 | #define DEVICE_ID_BYTE2_REG 0x21 |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 7 | |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 8 | #define VENDOR_ID_BYTE1_REG 0x23 |
| 9 | #define VENDOR_ID_BYTE2_REG 0x24 |
| 10 | |
Uwe Hermann | 6b4ad43 | 2007-09-23 13:17:29 +0000 | [diff] [blame] | 11 | #define FINTEK_VENDOR_ID 0x3419 |
| 12 | |
Uwe Hermann | 246be7d | 2007-10-31 22:22:11 +0000 | [diff] [blame] | 13 | static const struct superio_registers reg_table[] = { |
Uwe Hermann | ebb73f2 | 2008-11-12 19:08:58 +0000 | [diff] [blame] | 14 | {0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */ |
Arjan Koers | 78fdd60 | 2009-06-26 15:16:21 +0000 | [diff] [blame] | 15 | /* We assume reserved bits are read as 0. */ |
| 16 | {NOLDN, NULL, |
| 17 | {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a, |
| 18 | 0x2b,0x2c,0x2d,EOT}, |
| 19 | {0x06,0x01,0x19,0x34,0x00,0x00,MISC,0x00,0x00,0x00, |
| 20 | 0x00,0x00,0x08,EOT}}, |
Uwe Hermann | 4bdd643 | 2010-05-14 16:40:55 +0000 | [diff] [blame] | 21 | {0x0, "Floppy", |
Arjan Koers | 78fdd60 | 2009-06-26 15:16:21 +0000 | [diff] [blame] | 22 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 23 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
Uwe Hermann | 4bdd643 | 2010-05-14 16:40:55 +0000 | [diff] [blame] | 24 | {0x1, "COM1", |
Arjan Koers | 78fdd60 | 2009-06-26 15:16:21 +0000 | [diff] [blame] | 25 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 26 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
Uwe Hermann | 4bdd643 | 2010-05-14 16:40:55 +0000 | [diff] [blame] | 27 | {0x2, "COM2", |
Arjan Koers | 78fdd60 | 2009-06-26 15:16:21 +0000 | [diff] [blame] | 28 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 29 | {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}}, |
| 30 | {0x3, "Parallel port", |
| 31 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 32 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 33 | {0x4, "Hardware monitor", |
| 34 | {0x30,0x60,0x61,0x70,EOT}, |
| 35 | {0x01,0x02,0x95,0x00,EOT}}, |
| 36 | {0x5, "Keyboard", |
| 37 | {0x30,0x60,0x61,0x70,0x72,EOT}, |
| 38 | {0x01,0x00,0x60,0x00,0x00,EOT}}, |
| 39 | {0x6, "GPIO", |
| 40 | {0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1, |
| 41 | 0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3, |
| 42 | EOT}, |
| 43 | {0x00,0x0f,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff, |
| 44 | NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0x3f,NANA,0x00, |
| 45 | EOT}}, |
| 46 | {0x7, "VID", |
| 47 | {0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6, |
| 48 | 0xf7,EOT}, |
| 49 | {0x00,0x00,0x00, 0x00,0x00,MISC,0x00,NANA,0x00,0x00, |
| 50 | 0x00,EOT}}, |
| 51 | {0x8, "SPI", |
| 52 | {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa, |
| 53 | 0xfb,0xfc,0xfd,0xfe,0xff,EOT}, |
| 54 | {0x10,0x04,0x01,NANA,0x00,0x00,0x00,NANA,0x00,0x00, |
| 55 | 0x00,0x00,0x00,0x00,0x00,EOT}}, |
| 56 | {0xa, "PME, ACPI", |
| 57 | {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT}, |
| 58 | {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}}, |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 59 | {EOT}}}, |
Nicola Corna | 4fbd1aa | 2017-02-28 23:45:42 +0100 | [diff] [blame] | 60 | {0x0110, "F71808A", { |
| 61 | /* We assume reserved bits are read as 0. */ |
| 62 | {NOLDN, NULL, |
| 63 | {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28, |
| 64 | 0x29,0x2a,0x2b,0x2c,0x2d,EOT}, |
| 65 | {0x00,0x00,0x10,0x01,0x19,0x34,0x00,0x00,MISC,0x00, |
| 66 | 0xc0,0x21,0x2f,0x5c,0x27,EOT}}, |
| 67 | {0x1, "COM1", |
| 68 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 69 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 70 | {0x4, "Hardware monitor", |
| 71 | {0x30,0x60,0x61,0x70,EOT}, |
| 72 | {0x01,0x02,0x95,0x00,EOT}}, |
| 73 | {0x5, "Keyboard", |
| 74 | {0x30,0x60,0x61,0x70,0x72,0xfe,0xff,EOT}, |
| 75 | {0x01,0x00,0x60,0x01,0x0c,0x01,0x29,EOT}}, |
| 76 | {0x6, "GPIO", |
| 77 | {0x70,0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xcb,0xcc, |
| 78 | 0xcd,0xce,0xcf,0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6, |
| 79 | 0xd7,0xd8,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,0xf3, |
| 80 | EOT}, |
| 81 | {0x00,0x00,0x3f,NANA,0x00,0x00,0x00,0x00,0x00,0x00, |
| 82 | 0x00,0xe0,0x40,0x00,0x00,NANA,0x00,0x00,0x00,0x00, |
| 83 | 0x00,0x00,0x00,0x1f,NANA,0x00,0x00,0xff,NANA,0x00, |
| 84 | EOT}}, |
| 85 | {0x7, "WDT", |
| 86 | {0x30,0x60,0x61,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7, |
| 87 | EOT}, |
| 88 | {0x00,0x00,0x00,0x03,NANA,NANA,NANA,0x00,0x0a,0x00, |
| 89 | EOT}}, |
| 90 | {0x8, "CIR", |
| 91 | {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb, |
| 92 | 0xfc,0xfd,0xfe,EOT}, |
| 93 | {0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b, |
| 94 | 0x00,0x00,0x00,EOT}}, |
| 95 | {0xa, "PME, ACPI, and EUP Power Saving", |
| 96 | {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, |
| 97 | 0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5, |
| 98 | 0xf6,0xf7,0xf8,0xf9,0xfa,0xfd,EOT}, |
| 99 | {0x00,0x10,0xcc,0x0c,0x13,0x09,0xc7,0x09,0x63,0x00, |
| 100 | 0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x3c, |
| 101 | 0x1f,0x00,0x00,0x00,0x00,NANA,EOT}}, |
| 102 | {EOT}}}, |
Wilbert Duijvenvoorde | ffdf2e1 | 2014-03-24 10:02:42 +0100 | [diff] [blame] | 103 | {0x0710, "F71869A/AD", { |
Edward O'Callaghan | 5b5f834 | 2014-01-26 00:19:58 +1100 | [diff] [blame] | 104 | /* We assume reserved bits are read as 0. */ |
| 105 | {NOLDN, NULL, |
Wilbert Duijvenvoorde | ffdf2e1 | 2014-03-24 10:02:42 +0100 | [diff] [blame] | 106 | {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28, |
| 107 | 0x29,0x29,0x2a,0x2a,0x2b,0x2b,0x2c,0x2c,0x2d,EOT}, |
| 108 | {0x00,0x00,0x10,0x07,0x19,0x34,0x00,0x00,NANA,0x38, |
| 109 | 0x6f,0x03,0x0f,0xe7,0x0f,NANA,0x00,NANA,0x28,EOT}}, |
Edward O'Callaghan | 5b5f834 | 2014-01-26 00:19:58 +1100 | [diff] [blame] | 110 | {0x0, "Floppy", |
| 111 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 112 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 113 | {0x1, "COM1", |
| 114 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 115 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 116 | {0x2, "COM2", |
| 117 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 118 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 119 | {0x3, "Parallel port", |
| 120 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 121 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 122 | {0x4, "Hardware monitor", |
| 123 | {0x30,0x60,0x61,0x70,EOT}, |
| 124 | {0x01,0x02,0x95,0x00,EOT}}, |
| 125 | {0x5, "Keyboard", |
| 126 | {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT}, |
| 127 | {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}}, |
| 128 | {0x6, "GPIO", |
| 129 | {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1, |
| 130 | 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0, |
Wilbert Duijvenvoorde | ffdf2e1 | 2014-03-24 10:02:42 +0100 | [diff] [blame] | 131 | 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xa0, |
| 132 | 0xa1,0xa2,0xa4,0xa5,0xa6,0xa9,0xab,0xac,0xad,0xae, |
| 133 | 0xaf,0x90,0x91,0x92,0x80,0x81,0x82,0x83,EOT}, |
Edward O'Callaghan | 5b5f834 | 2014-01-26 00:19:58 +1100 | [diff] [blame] | 134 | {0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff, |
| 135 | NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00, |
Wilbert Duijvenvoorde | ffdf2e1 | 2014-03-24 10:02:42 +0100 | [diff] [blame] | 136 | 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x00,0x00,0x00, |
| 137 | 0x1f,NANA,0x00,0x00,0x00,0x00,0x00,0xe0,0x00,0x00, |
| 138 | 0x40,0x00,0xff,NANA,0x00,0xff,NANA,0x00,EOT}}, |
| 139 | {0x7, "WDT", |
| 140 | {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT}, |
| 141 | {0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}}, |
| 142 | {0x8, "CIR", |
| 143 | {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb, |
| 144 | 0xfc,0xfd,0xfe,EOT}, |
| 145 | {0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b, |
| 146 | 0x00,0x00,0x00,EOT}}, |
| 147 | {0xa, "PME, ACPI, and ERP Power Saving", |
| 148 | {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, |
| 149 | 0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5, |
| 150 | 0xf6,0xf7,0xf8,0xf9,0xfa,0xfc,0xfe,EOT}, |
| 151 | {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08, |
| 152 | 0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x1c, |
| 153 | 0x1f,0x86,0x00,0x00,0x00,0x07,0x00,EOT}}, |
Wilbert Duijvenvoorde | 2164831 | 2014-03-12 11:19:31 +0100 | [diff] [blame] | 154 | {EOT}}}, |
| 155 | {0x1408, "F71869E/ED", { |
| 156 | /* We assume reserved bits are read as 0. */ |
| 157 | {NOLDN, NULL, |
| 158 | {0x02,0x07,0x20,0x21,0x23,0x24,0x26,0x27,0x28,0x29, |
| 159 | 0x2a,0x2b,0x2d,EOT}, |
| 160 | {0x00,0x00,0x08,0x14,0x19,0x34,0x00,NANA,0x38,0x6f, |
| 161 | 0x07,0x0f,0x28,EOT}}, |
| 162 | {0x00, "FDC", |
| 163 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 164 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 165 | {0x01, "UART1", |
| 166 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 167 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 168 | {0x02, "UART2", |
| 169 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 170 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 171 | {0x03, "Parallel port", |
| 172 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 173 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 174 | {0x04, "Hardware Monitor", |
| 175 | {0x30,0x60,0x61,0x70,EOT}, |
| 176 | {0x01,0x02,0x95,0x00,EOT}}, |
| 177 | {0x05, "KBC", |
| 178 | {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT}, |
| 179 | {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}}, |
| 180 | {0x06, "GPIO", |
| 181 | {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1, |
| 182 | 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0, |
| 183 | 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3, |
| 184 | 0x90,0x91,0x92,0x93,EOT}, |
| 185 | {0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff, |
| 186 | NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00, |
| 187 | 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x1f,NANA,0x00, |
| 188 | 0x00,0x3f,NANA,0x00,EOT}}, |
| 189 | {0x07, "WDT", |
| 190 | {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT}, |
| 191 | {0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}}, |
| 192 | {0x0a, "PME, ACPI, and EUP Power Saving", |
| 193 | {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, |
| 194 | 0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7, |
| 195 | 0xf8,0xf9,0xfe,EOT}, |
| 196 | {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08, |
| 197 | 0x00,0x00,0x00,0x00,0x00,NANA,0x06,0x1c,0x1f,0x86, |
| 198 | 0x00,0x00,0x00,EOT}}, |
| 199 | {EOT}}}, |
David Hendricks | b97030d | 2010-11-29 11:56:39 +0000 | [diff] [blame] | 200 | {0x2307, "F71889", { |
| 201 | /* We assume reserved bits are read as 0. */ |
| 202 | {NOLDN, NULL, |
| 203 | {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b, |
| 204 | 0x2c,0x2d,EOT}, |
| 205 | {0x07,0x23,0x19,0x34,0x00,0x00,0x00,0x00,0xf0,0x30, |
| 206 | 0x00,0x08,EOT}}, |
| 207 | {0x0, "Floppy", |
| 208 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 209 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 210 | {0x1, "COM1", |
| 211 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 212 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 213 | {0x2, "COM2", |
| 214 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 215 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 216 | {0x3, "Parallel port", |
| 217 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 218 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 219 | {0x4, "Hardware monitor", |
| 220 | {0x30,0x60,0x61,0x70,EOT}, |
| 221 | {0x01,0x02,0x95,0x00,EOT}}, |
| 222 | {0x5, "Keyboard", |
| 223 | {0x30,0x60,0x61,0x70,0x72,0xfe,EOT}, |
| 224 | {0x01,0x00,0x60,0x01,0x0c,0x81,EOT}}, |
| 225 | {0x6, "GPIO", |
| 226 | {0x80,0x81,0x82,0x83,0x90,0x91,0x92,0x93,0xa0,0xa1, |
| 227 | 0xa2,0xa3,0xb0,0xb1,0xb2,0xc0,0xc1,0xc2,0xc3,0xd0, |
| 228 | 0xd1,0xd2,0xd3,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2, |
| 229 | 0xf3,0xfe,0xff,EOT}, |
| 230 | {0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0x1f, |
| 231 | NANA,0x00,0x00,0xff,NANA,0x00,0xff,NANA,0x00,0x00, |
| 232 | 0xff,NANA,0x00,0x00,0x7f,NANA,0x00,0x00,0x7f,NANA, |
| 233 | 0x00,0x00,0x00,EOT}}, |
| 234 | {0x7, "VID", |
| 235 | {0x30,0x60,0x61,EOT}, |
| 236 | {0x00,0x00,0x00,EOT}}, |
| 237 | {0x8, "SPI", |
| 238 | {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa, |
| 239 | 0xfb,0xfc,0xfd,0xfe,0xff,EOT}, |
| 240 | {0x00,RSVD,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 241 | 0x00,0x00,0x00,0x00,0x00,EOT}}, |
| 242 | {0xa, "PME, ACPI", |
| 243 | {0x30,0xf0,0xf1,0xf4,0xf5,0xf6,EOT}, |
| 244 | {0x00,0x00,0x00,0x26,0x1c,0x07,EOT}}, |
| 245 | {0xb, "VREF", |
| 246 | {0xf0,0xf1,0xf2,0xf3,0xff,EOT}, |
| 247 | {0x64,0x64,0x64,0x00,0x00,EOT}}, |
| 248 | {EOT}}}, |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 249 | {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */ |
Jonathan Kollasch | d74c774 | 2010-10-24 12:43:41 +0000 | [diff] [blame] | 250 | {NOLDN, NULL, |
| 251 | {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, |
| 252 | 0x29,0x2a,0x2b,0x2c,0x2d,EOT}, |
| 253 | {0x03,0x41,RSVD,0x19,0x34,0x00,0x00,MISC,0x66, |
| 254 | 0x80,0x00,0x00,0x00,0x04,EOT}}, |
| 255 | {0x0, "Floppy", |
| 256 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 257 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 258 | {0x1, "COM1", |
| 259 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 260 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 261 | {0x2, "COM2", |
| 262 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 263 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 264 | {0x3, "Parallel port", |
| 265 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 266 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 267 | {0x4, "Hardware monitor", |
| 268 | {0x30,0x60,0x61,0x70,EOT}, |
| 269 | {0x00,0x02,0x95,0x00,EOT}}, |
Uwe Hermann | 7015989 | 2010-10-24 14:19:09 +0000 | [diff] [blame] | 270 | {0x5, "Keyboard", /* Only documented on F71872F/FG. */ |
Jonathan Kollasch | d74c774 | 2010-10-24 12:43:41 +0000 | [diff] [blame] | 271 | {0x30,0x60,0x61,0x70,0x72,0xf0,0xf1,EOT}, |
| 272 | {0x01,0x00,0x60,0x00,0x00,0x83,0x00,EOT}}, |
| 273 | {0x6, "GPIO", |
| 274 | {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, |
| 275 | 0xe9,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8, |
| 276 | EOT}, |
| 277 | {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00, |
| 278 | 0x7f,0x00,0x7f,NANA,0x00,0xff,NANA,0x00,0x03,NANA, |
| 279 | EOT}}, |
| 280 | {0x7, "VID", |
| 281 | {0x30,0x60,0x61,EOT}, |
| 282 | {0x00,0x00,0x00,EOT}}, |
| 283 | {0xa, "PME, ACPI", |
| 284 | {0x30,0xf0,0xf1,0xf4,0xf5,EOT}, |
| 285 | {0x00,0x00,0x61,0x06,0x3c,EOT}}, |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 286 | {EOT}}}, |
| 287 | {0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */ |
Uwe Hermann | 0323a2b | 2008-10-09 23:56:11 +0000 | [diff] [blame] | 288 | /* We assume reserved bits are read as 0. */ |
| 289 | {NOLDN, NULL, |
| 290 | {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a, |
| 291 | 0x2b,0x2c,0x2d,EOT}, |
| 292 | {0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00, |
| 293 | 0x00,0x08,0x08,EOT}}, |
| 294 | {0x0, "Floppy", |
| 295 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 296 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 297 | {0x1, "COM1", |
| 298 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 299 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 300 | {0x2, "COM2", |
| 301 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 302 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 303 | {0x3, "Parallel port", |
| 304 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 305 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 306 | {0x4, "Hardware monitor", |
| 307 | {0x30,0x60,0x61,0x70,EOT}, |
| 308 | {0x01,0x02,0x95,0x00,EOT}}, |
| 309 | {0x5, "Keyboard", |
| 310 | {0x30,0x60,0x61,0x70,0x72,0xf0,EOT}, |
| 311 | {0x01,0x00,0x60,0x00,0x00,0x83,EOT}}, |
| 312 | {0x6, "GPIO", |
| 313 | {0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0, |
| 314 | 0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2, |
| 315 | 0xf3,EOT}, |
| 316 | {0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00, |
| 317 | 0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA, |
| 318 | 0x00,EOT}}, |
| 319 | {0x7, "VID", |
| 320 | {0x30,0x60,0x61,EOT}, |
| 321 | {0x00,0x00,0x00,EOT}}, |
| 322 | {0x7, "SPI", |
| 323 | {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa, |
| 324 | 0xfb,0xfc,0xfd,0xfe,0xff,EOT}, |
| 325 | {0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 326 | 0x00,0x00,0x00,0x00,0x00,EOT}}, |
| 327 | {0xa, "PME, ACPI", |
| 328 | {0x30,0xf0,0xf1,0xf4,0xf5,EOT}, |
| 329 | {0x00,0x00,0x01,0x06,0x1c,EOT}}, |
Uwe Hermann | 945045b | 2007-09-28 15:39:10 +0000 | [diff] [blame] | 330 | {EOT}}}, |
| 331 | {0x0604, "F71805F/FG", { |
Uwe Hermann | e0ffaa1 | 2007-09-26 15:48:09 +0000 | [diff] [blame] | 332 | /* We assume reserved bits are read as 0. */ |
| 333 | {NOLDN, NULL, |
Uwe Hermann | b0ae976 | 2008-10-14 16:34:38 +0000 | [diff] [blame] | 334 | {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT}, |
| 335 | {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}}, |
Uwe Hermann | e0ffaa1 | 2007-09-26 15:48:09 +0000 | [diff] [blame] | 336 | {0x0, "Floppy", |
| 337 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 338 | {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, |
| 339 | {0x1, "COM1", |
| 340 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 341 | {0x01,0x03,0xf8,0x04,0x00,EOT}}, |
| 342 | {0x2, "COM2", |
| 343 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 344 | {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, |
| 345 | {0x3, "Parallel port", |
| 346 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 347 | {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, |
| 348 | {0x4, "Hardware monitor", |
| 349 | {0x30,0x60,0x61,0x70,EOT}, |
| 350 | {0x00,0x02,0x95,0x00,EOT}}, |
| 351 | {0x6, "GPIO", |
| 352 | {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, |
| 353 | 0xe9,0xf0,0xf1,0xf3,0xf4,EOT}, |
| 354 | {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00, |
| 355 | 0x00,0x00,NANA,0x00,NANA,EOT}}, |
| 356 | {0xa, "PME", |
| 357 | {0x30,0xf0,0xf1,EOT}, |
| 358 | {0x00,0x00,0x00,EOT}}, |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 359 | {EOT}}}, |
Uwe Hermann | cfb6ac7 | 2008-10-01 20:16:58 +0000 | [diff] [blame] | 360 | {0x0581, "F8000", { /* Fintek/ASUS F8000 */ |
| 361 | {EOT}}}, |
Stefan Reinauer | e7b7ae2 | 2010-08-17 08:24:01 +0000 | [diff] [blame] | 362 | {0x0802, "F81216D/DG", { |
| 363 | {NOLDN, NULL, |
| 364 | {0x25,0x2f,EOT}, |
| 365 | {0x00,RSVD,EOT}}, |
| 366 | {0x0, "UART1", |
| 367 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 368 | {NANA,NANA,NANA,NANA,0x00,0x40,EOT}}, |
| 369 | {0x1, "UART2", |
| 370 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 371 | {NANA,NANA,NANA,NANA,0x00,EOT}}, |
| 372 | {0x2, "UART3", |
| 373 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 374 | {NANA,NANA,NANA,NANA,0x00,EOT}}, |
| 375 | {0x3, "UART4", |
| 376 | {0x30,0x60,0x61,0x70,0xf0,EOT}, |
| 377 | {NANA,NANA,NANA,NANA,0x00,EOT}}, |
| 378 | {0x8, "WDT", |
| 379 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 380 | {0x00,NANA,NANA,NANA,NANA,NANA,EOT}}, |
| 381 | {EOT}}}, |
| 382 | {0x1602, "F81216AD", { |
| 383 | {NOLDN, NULL, |
| 384 | {0x25,0x27,EOT}, |
| 385 | {0x00,NANA,EOT}}, |
| 386 | {0x0, "UART1", |
| 387 | {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf5,EOT}, |
| 388 | {NANA,NANA,NANA,NANA,0x00,0x40,0x00,0x00,EOT}}, |
| 389 | {0x1, "UART2", |
| 390 | {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT}, |
| 391 | {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}}, |
| 392 | {0x2, "UART3", |
| 393 | {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT}, |
| 394 | {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}}, |
| 395 | {0x3, "UART4", |
| 396 | {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT}, |
| 397 | {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}}, |
| 398 | {0x8, "WDT", |
| 399 | {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, |
| 400 | {0x00,NANA,NANA,NANA,NANA,NANA,EOT}}, |
| 401 | {EOT}}}, |
Zheng Bao | 0e40e6b | 2010-11-05 00:34:12 +0000 | [diff] [blame] | 402 | {0x0407, "F81865F/F-I", { |
Stefan Tauner | e54995a | 2012-09-06 10:38:49 +0200 | [diff] [blame] | 403 | {NOLDN, NULL, |
Wilbert Duijvenvoorde | 3b55602 | 2014-03-24 09:50:25 +0100 | [diff] [blame] | 404 | {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2a,0x2b,0x2c,0x2d,EOT}, |
Stefan Tauner | e54995a | 2012-09-06 10:38:49 +0200 | [diff] [blame] | 405 | {NANA,0x00,0x07,0x04,0x19,0x34,NANA,NANA,NANA,0x00,0x00,0x00,0x00,0x1f,0x00,0x08,EOT}}, |
| 406 | {0x00, "FDC", |
| 407 | {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, |
| 408 | {NANA,0x03,0xf0,NANA,NANA,NANA,NANA,NANA,EOT}}, |
| 409 | {0x03, "LPT", |
| 410 | {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, |
| 411 | {NANA,0x03,0x78,NANA,NANA,NANA,EOT}}, |
| 412 | {0x04, "HWMON", |
| 413 | {0x30,0x60,0x61,0x70,EOT}, |
| 414 | {NANA,0x02,0x95,NANA,EOT}}, |
| 415 | {0x05, "KBC", |
| 416 | {0x30,0x60,0x61,0x70,0x72,0xfe,0xf0,EOT}, |
| 417 | {NANA,0x00,0x60,NANA,NANA,NANA,0x71,EOT}}, |
| 418 | {0x06, "GPIO", |
| 419 | {0x30,0x60,0x61,0x70,0xf1,0xf2,0xf3,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xe0,0xe1,0xe2,0xe3,0xef,0xd0,0xd1,0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,0x90,0x91,0x92,0x93,EOT}, |
| 420 | {NANA,0x00,0x60,NANA,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,NANA,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,NANA,NANA,NANA,NANA,EOT}}, |
| 421 | {0x07, "WDT", |
| 422 | {0x30,0x60,0x61,0xf5,0xf6,0xfa,EOT}, |
| 423 | {NANA,0x00,0x00,0x00,0x00,NANA,EOT}}, |
| 424 | {0x08, "SPI", |
| 425 | {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,EOT}, |
| 426 | {0x10,0x04,NANA,NANA,0x00,0x00,NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, |
| 427 | {0x0a, "PME & ACPI", |
| 428 | {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT}, |
| 429 | {NANA,NANA,NANA,NANA,NANA,0x06,NANA,0x00,EOT}}, |
| 430 | {0x0b, "RTC", |
| 431 | {0x30,0x60,0x61,0x70,EOT}, |
| 432 | {NANA,0x00,0x00,NANA,EOT}}, |
| 433 | {0x10, "UART1", |
| 434 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 435 | {NANA,0x03,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}}, |
| 436 | {0x11, "UART2", |
| 437 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 438 | {NANA,0x02,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}}, |
| 439 | {0x12, "UART3", |
| 440 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 441 | {NANA,0x03,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}}, |
| 442 | {0x13, "UART4", |
| 443 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 444 | {NANA,0x02,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}}, |
| 445 | {0x14, "UART5", |
| 446 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 447 | {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}}, |
| 448 | {0x15, "UART6", |
| 449 | {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT}, |
| 450 | {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}}, |
Zheng Bao | 0e40e6b | 2010-11-05 00:34:12 +0000 | [diff] [blame] | 451 | {EOT}}}, |
Kyle Stevenson | 769c309 | 2019-01-23 10:55:33 -0500 | [diff] [blame] | 452 | {0x1010, "F81866", { |
| 453 | {EOT}}}, |
| 454 | {0x0215, "F81962/F81964/F81966/F81967", { |
| 455 | {EOT}}}, |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 456 | {EOT} |
| 457 | }; |
| 458 | |
Nicola Corna | 4fbd1aa | 2017-02-28 23:45:42 +0100 | [diff] [blame] | 459 | static const struct superio_registers hwm_table[] = { |
| 460 | {0x0110, "F71808A", { |
| 461 | {NOLDN, NULL, |
| 462 | {0x01, 0x02, 0x03, 0x08, 0x0a, 0x0b, 0x0c, 0x0d, |
| 463 | 0x0f, |
| 464 | 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, |
| 465 | 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, |
| 466 | /* 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, |
| 467 | 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, */ |
| 468 | 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, |
| 469 | 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, |
| 470 | 0x60, 0x61, 0x62, 0x63, 0x64, 0x66, 0x6b, 0x6c, |
| 471 | 0x6d, 0x6f, 0x7f, |
| 472 | 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, |
| 473 | 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, |
| 474 | 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, |
| 475 | 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, |
| 476 | 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x98, |
| 477 | 0x9b, 0x9c, 0x9e, 0x9f, |
| 478 | 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, |
| 479 | 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, |
| 480 | 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, |
| 481 | 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, |
| 482 | 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, |
| 483 | 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, |
| 484 | 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xec, 0xed, 0xee, |
| 485 | 0xef, EOT}, |
| 486 | {0x03, 0x00, 0x01, 0x4c, 0x00, 0x00, 0x55, 0x00, |
| 487 | 0x20, |
| 488 | NANA, NANA, NANA, NANA, RSVD, RSVD, RSVD, NANA, |
| 489 | NANA, RSVD, RSVD, RSVD, RSVD, NANA, NANA, NANA, |
| 490 | /* RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, |
| 491 | RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, */ |
| 492 | 0x44, 0x00, NANA, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 493 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 494 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x40, |
| 495 | 0x04, 0x00, 0x00, |
| 496 | RSVD, RSVD, NANA, RSVD, NANA, RSVD, RSVD, RSVD, |
| 497 | NANA, NANA, NANA, NANA, NANA, RSVD, RSVD, |
| 498 | RSVD, RSVD, NANA, NANA, NANA, NANA, RSVD, RSVD, |
| 499 | RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, |
| 500 | 0x00, NANA, NANA, 0x00, 0x2e, 0xff, 0x05, 0x44, |
| 501 | 0x05, 0x55, 0x66, 0x00, |
| 502 | 0x03, 0xff, 0x00, 0x83, 0x03, 0xff, 0x3c, 0x32, |
| 503 | 0x28, 0x1e, 0xff, 0xd9, 0xb2, 0x99, 0x80, 0x1d, |
| 504 | 0x0c, 0x25, 0x00, 0x80, 0x03, 0xff, 0x3c, 0x32, |
| 505 | 0x28, 0x1e, 0xff, 0xd9, 0xb2, 0x99, 0x80, 0x1e, |
| 506 | 0x0f, 0xff, RSVD, 0x7f, RSVD, RSVD, RSVD, RSVD, |
| 507 | RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, 0x00, |
| 508 | NANA, NANA, NANA, NANA, NANA, 0x00, 0x01, 0x01, |
| 509 | 0x00, EOT}}, |
| 510 | {EOT}}}, |
| 511 | {EOT} |
| 512 | }; |
| 513 | |
Uwe Hermann | 25a6c0f | 2007-09-19 00:48:42 +0000 | [diff] [blame] | 514 | void probe_idregs_fintek(uint16_t port) |
| 515 | { |
Nicola Corna | 4fbd1aa | 2017-02-28 23:45:42 +0100 | [diff] [blame] | 516 | uint16_t vid, did, hwmport; |
Uwe Hermann | 25a6c0f | 2007-09-19 00:48:42 +0000 | [diff] [blame] | 517 | |
Uwe Hermann | 8b8d039 | 2007-10-04 15:23:38 +0000 | [diff] [blame] | 518 | probing_for("Fintek", "", port); |
| 519 | |
Uwe Hermann | b4db220 | 2007-09-20 23:37:56 +0000 | [diff] [blame] | 520 | enter_conf_mode_winbond_fintek_ite_8787(port); |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 521 | |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 522 | did = regval(port, DEVICE_ID_BYTE1_REG); |
| 523 | did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8); |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 524 | |
| 525 | vid = regval(port, VENDOR_ID_BYTE1_REG); |
| 526 | vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8); |
| 527 | |
Uwe Hermann | 6b4ad43 | 2007-09-23 13:17:29 +0000 | [diff] [blame] | 528 | if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) { |
Uwe Hermann | 8b8d039 | 2007-10-04 15:23:38 +0000 | [diff] [blame] | 529 | if (verbose) |
| 530 | printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did); |
Uwe Hermann | b4db220 | 2007-09-20 23:37:56 +0000 | [diff] [blame] | 531 | exit_conf_mode_winbond_fintek_ite_8787(port); |
Uwe Hermann | 0702469 | 2007-09-20 22:13:48 +0000 | [diff] [blame] | 532 | return; |
| 533 | } |
| 534 | |
Uwe Hermann | 8b8d039 | 2007-10-04 15:23:38 +0000 | [diff] [blame] | 535 | printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n", |
Wilbert Duijvenvoorde | 2164831 | 2014-03-12 11:19:31 +0100 | [diff] [blame] | 536 | get_superio_name(reg_table, did), vid, did, port); |
Uwe Hermann | e9d4616 | 2007-10-07 20:01:23 +0000 | [diff] [blame] | 537 | chip_found = 1; |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 538 | |
Stefan Reinauer | 7a51e50 | 2008-12-01 14:18:57 +0000 | [diff] [blame] | 539 | dump_superio("Fintek", reg_table, port, did, LDN_SEL); |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 540 | |
Nicola Corna | 4fbd1aa | 2017-02-28 23:45:42 +0100 | [diff] [blame] | 541 | if (extra_dump) { |
| 542 | regwrite(port, LDN_SEL, 0x04); /* Select LDN 4 (HWM). */ |
| 543 | |
| 544 | /* Get HWM base address (stored in LDN 4, index 0x60/0x61). */ |
| 545 | hwmport = regval(port, 0x60) << 8; |
| 546 | hwmport |= regval(port, 0x61); |
| 547 | |
Ravi Mistry | d92745b | 2022-02-16 23:03:25 +0000 | [diff] [blame] | 548 | /* HWM address register = HWM base address + 5. */ |
| 549 | hwmport += 5; |
| 550 | |
Nicola Corna | 4fbd1aa | 2017-02-28 23:45:42 +0100 | [diff] [blame] | 551 | printf("Hardware monitor (0x%04x)\n", hwmport); |
| 552 | dump_superio("Fintek-HWM", hwm_table, hwmport, did, LDN_SEL); |
| 553 | } |
| 554 | |
Uwe Hermann | b4db220 | 2007-09-20 23:37:56 +0000 | [diff] [blame] | 555 | exit_conf_mode_winbond_fintek_ite_8787(port); |
Uwe Hermann | 0120e1a | 2007-09-16 18:11:03 +0000 | [diff] [blame] | 556 | } |
Robinson P. Tryon | 552cfb7 | 2008-01-15 22:30:55 +0000 | [diff] [blame] | 557 | |
Stefan Reinauer | e7b7ae2 | 2010-08-17 08:24:01 +0000 | [diff] [blame] | 558 | |
| 559 | void probe_idregs_fintek_alternative(uint16_t port) |
| 560 | { |
| 561 | uint16_t vid, did; |
| 562 | |
| 563 | probing_for("Fintek", "", port); |
| 564 | |
| 565 | enter_conf_mode_fintek_7777(port); |
| 566 | |
| 567 | did = regval(port, DEVICE_ID_BYTE1_REG); |
| 568 | did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8); |
| 569 | |
| 570 | vid = regval(port, VENDOR_ID_BYTE1_REG); |
| 571 | vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8); |
| 572 | |
| 573 | if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) { |
| 574 | if (verbose) |
| 575 | printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did); |
| 576 | exit_conf_mode_fintek_7777(port); |
| 577 | return; |
| 578 | } |
| 579 | |
| 580 | printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n", |
Wilbert Duijvenvoorde | 2164831 | 2014-03-12 11:19:31 +0100 | [diff] [blame] | 581 | get_superio_name(reg_table, did), vid, did, port); |
Stefan Reinauer | e7b7ae2 | 2010-08-17 08:24:01 +0000 | [diff] [blame] | 582 | chip_found = 1; |
| 583 | |
| 584 | dump_superio("Fintek", reg_table, port, did, LDN_SEL); |
| 585 | |
| 586 | exit_conf_mode_fintek_7777(port); |
| 587 | } |
| 588 | |
Robinson P. Tryon | 552cfb7 | 2008-01-15 22:30:55 +0000 | [diff] [blame] | 589 | void print_fintek_chips(void) |
| 590 | { |
| 591 | print_vendor_chips("Fintek", reg_table); |
| 592 | } |